2008-09-27 21:31:21 +07:00
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/*
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* File: sound/soc/blackfin/bf5xx-ad73311.c
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* Author: Cliff Cai <Cliff.Cai@analog.com>
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*
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* Created: Thur Sep 25 2008
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* Description: Board driver for ad73311 sound chip
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*
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* Modified:
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* Copyright 2008 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/pcm_params.h>
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#include <asm/blackfin.h>
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#include <asm/cacheflush.h>
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#include <asm/irq.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#include "../codecs/ad73311.h"
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#include "bf5xx-sport.h"
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#include "bf5xx-i2s-pcm.h"
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#include "bf5xx-i2s.h"
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#if CONFIG_SND_BF5XX_SPORT_NUM == 0
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#define bfin_write_SPORT_TCR1 bfin_write_SPORT0_TCR1
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#define bfin_read_SPORT_TCR1 bfin_read_SPORT0_TCR1
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#define bfin_write_SPORT_TCR2 bfin_write_SPORT0_TCR2
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#define bfin_write_SPORT_TX16 bfin_write_SPORT0_TX16
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#define bfin_read_SPORT_STAT bfin_read_SPORT0_STAT
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#else
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#define bfin_write_SPORT_TCR1 bfin_write_SPORT1_TCR1
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#define bfin_read_SPORT_TCR1 bfin_read_SPORT1_TCR1
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#define bfin_write_SPORT_TCR2 bfin_write_SPORT1_TCR2
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#define bfin_write_SPORT_TX16 bfin_write_SPORT1_TX16
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#define bfin_read_SPORT_STAT bfin_read_SPORT1_STAT
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#endif
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#define GPIO_SE CONFIG_SND_BFIN_AD73311_SE
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2008-11-19 03:50:34 +07:00
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static struct snd_soc_card bf5xx_ad73311;
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2008-09-27 21:31:21 +07:00
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static int snd_ad73311_startup(void)
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{
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pr_debug("%s enter\n", __func__);
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/* Pull up SE pin on AD73311L */
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gpio_set_value(GPIO_SE, 1);
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return 0;
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}
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static int snd_ad73311_configure(void)
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{
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unsigned short ctrl_regs[6];
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unsigned short status = 0;
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int count = 0;
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/* DMCLK = MCLK = 16.384 MHz
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* SCLK = DMCLK/8 = 2.048 MHz
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* Sample Rate = DMCLK/2048 = 8 KHz
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*/
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ctrl_regs[0] = AD_CONTROL | AD_WRITE | CTRL_REG_B | REGB_MCDIV(0) | \
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REGB_SCDIV(0) | REGB_DIRATE(0);
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ctrl_regs[1] = AD_CONTROL | AD_WRITE | CTRL_REG_C | REGC_PUDEV | \
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REGC_PUADC | REGC_PUDAC | REGC_PUREF | REGC_REFUSE ;
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ctrl_regs[2] = AD_CONTROL | AD_WRITE | CTRL_REG_D | REGD_OGS(2) | \
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REGD_IGS(2);
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ctrl_regs[3] = AD_CONTROL | AD_WRITE | CTRL_REG_E | REGE_DA(0x1f);
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ctrl_regs[4] = AD_CONTROL | AD_WRITE | CTRL_REG_F | REGF_SEEN ;
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ctrl_regs[5] = AD_CONTROL | AD_WRITE | CTRL_REG_A | REGA_MODE_DATA;
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local_irq_disable();
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snd_ad73311_startup();
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udelay(1);
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bfin_write_SPORT_TCR1(TFSR);
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bfin_write_SPORT_TCR2(0xF);
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SSYNC();
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/* SPORT Tx Register is a 8 x 16 FIFO, all the data can be put to
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* FIFO before enable SPORT to transfer the data
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*/
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for (count = 0; count < 6; count++)
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bfin_write_SPORT_TX16(ctrl_regs[count]);
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SSYNC();
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bfin_write_SPORT_TCR1(bfin_read_SPORT_TCR1() | TSPEN);
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SSYNC();
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/* When TUVF is set, the data is already send out */
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2009-02-09 00:17:37 +07:00
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while (!(status & TUVF) && ++count < 10000) {
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2008-09-27 21:31:21 +07:00
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udelay(1);
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status = bfin_read_SPORT_STAT();
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SSYNC();
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}
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bfin_write_SPORT_TCR1(bfin_read_SPORT_TCR1() & ~TSPEN);
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SSYNC();
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local_irq_enable();
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2009-02-09 00:17:37 +07:00
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if (count >= 10000) {
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2008-09-27 21:31:21 +07:00
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printk(KERN_ERR "ad73311: failed to configure codec\n");
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return -1;
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}
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return 0;
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}
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static int bf5xx_probe(struct platform_device *pdev)
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{
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int err;
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if (gpio_request(GPIO_SE, "AD73311_SE")) {
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printk(KERN_ERR "%s: Failed ro request GPIO_%d\n", __func__, GPIO_SE);
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return -EBUSY;
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}
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gpio_direction_output(GPIO_SE, 0);
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err = snd_ad73311_configure();
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if (err < 0)
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return -EFAULT;
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return 0;
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}
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static int bf5xx_ad73311_startup(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
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pr_debug("%s enter\n", __func__);
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cpu_dai->private_data = sport_handle;
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return 0;
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}
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static int bf5xx_ad73311_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
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int ret = 0;
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pr_debug("%s rate %d format %x\n", __func__, params_rate(params),
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params_format(params));
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/* set cpu DAI configuration */
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2008-11-19 05:17:49 +07:00
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ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_A |
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2008-09-27 21:31:21 +07:00
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SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
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if (ret < 0)
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return ret;
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return 0;
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}
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static struct snd_soc_ops bf5xx_ad73311_ops = {
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.startup = bf5xx_ad73311_startup,
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.hw_params = bf5xx_ad73311_hw_params,
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};
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static struct snd_soc_dai_link bf5xx_ad73311_dai = {
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.name = "ad73311",
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.stream_name = "AD73311",
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.cpu_dai = &bf5xx_i2s_dai,
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.codec_dai = &ad73311_dai,
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.ops = &bf5xx_ad73311_ops,
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};
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2008-11-19 03:50:34 +07:00
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static struct snd_soc_card bf5xx_ad73311 = {
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2008-09-27 21:31:21 +07:00
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.name = "bf5xx_ad73311",
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2008-12-02 23:01:14 +07:00
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.platform = &bf5xx_i2s_soc_platform,
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2008-09-27 21:31:21 +07:00
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.probe = bf5xx_probe,
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.dai_link = &bf5xx_ad73311_dai,
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.num_links = 1,
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};
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static struct snd_soc_device bf5xx_ad73311_snd_devdata = {
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2008-11-19 03:50:34 +07:00
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.card = &bf5xx_ad73311,
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2008-09-27 21:31:21 +07:00
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.codec_dev = &soc_codec_dev_ad73311,
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};
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2009-06-20 22:29:56 +07:00
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static struct platform_device *bf5xx_ad73311_snd_device;
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2008-09-27 21:31:21 +07:00
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static int __init bf5xx_ad73311_init(void)
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{
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int ret;
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pr_debug("%s enter\n", __func__);
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2009-06-20 22:29:56 +07:00
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bf5xx_ad73311_snd_device = platform_device_alloc("soc-audio", -1);
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if (!bf5xx_ad73311_snd_device)
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2008-09-27 21:31:21 +07:00
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return -ENOMEM;
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2009-06-20 22:29:56 +07:00
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platform_set_drvdata(bf5xx_ad73311_snd_device, &bf5xx_ad73311_snd_devdata);
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bf5xx_ad73311_snd_devdata.dev = &bf5xx_ad73311_snd_device->dev;
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ret = platform_device_add(bf5xx_ad73311_snd_device);
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2008-09-27 21:31:21 +07:00
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if (ret)
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2009-06-20 22:29:56 +07:00
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platform_device_put(bf5xx_ad73311_snd_device);
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2008-09-27 21:31:21 +07:00
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return ret;
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}
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static void __exit bf5xx_ad73311_exit(void)
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{
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pr_debug("%s enter\n", __func__);
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2009-06-20 22:29:56 +07:00
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platform_device_unregister(bf5xx_ad73311_snd_device);
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2008-09-27 21:31:21 +07:00
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}
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module_init(bf5xx_ad73311_init);
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module_exit(bf5xx_ad73311_exit);
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/* Module information */
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MODULE_AUTHOR("Cliff Cai");
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MODULE_DESCRIPTION("ALSA SoC AD73311 Blackfin");
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MODULE_LICENSE("GPL");
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