AuxXxilium/linux_dsm_epyc7002
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linux_dsm_epyc7002/arch/arm/boot/dts/at91sam9g25.dtsi

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arm: at91: dt: at91sam9 add serial pinctrl support Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-07-05 15:56:09 +07:00
/*
* at91sam9g25.dtsi - Device Tree Include file for AT91SAM9G25 SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* Licensed under GPLv2.
*/
ARM: at91: dt: use #include for all device trees to prepare the switch to the macro. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-05-15 00:21:50 +07:00
#include "at91sam9x5.dtsi"
ARM: at91: at91sam9x5/dts: add ISI dt support, include isi node, pinctrls Add a new file: at91sam9x5_isi.dtsi, which includes ISI node and pinctrls. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-02-12 15:06:23 +07:00
#include "at91sam9x5_isi.dtsi"
ARM: at91/dt: split sam9x5 peripheral definitions This patch splits the sam9x5 peripheral definitions into: - a common base for all sam9x5 SoCs (at91sam9x5.dtsi) - several optional peripheral definitions which will be included by specific sam9x5 SoCs (at91sam9x5_'periph name'.dtsi) This provides a better representation of the real hardware (drop unneeded dt nodes) and avoids future peripheral id conflict (lcdc and isi both use peripheral id 25). Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-07 17:14:26 +07:00
#include "at91sam9x5_usart3.dtsi"
#include "at91sam9x5_macb0.dtsi"
arm: at91: dt: at91sam9 add serial pinctrl support Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-07-05 15:56:09 +07:00
/ {
model = "Atmel AT91SAM9G25 SoC";
ARM: at91/trivial: typos in compatible property - unneeded whitespace - missing double quote Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
2013-03-22 00:01:42 +07:00
compatible = "atmel,at91sam9g25", "atmel,at91sam9x5";
arm: at91: dt: at91sam9 add serial pinctrl support Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-07-05 15:56:09 +07:00
ahb {
apb {
pinctrl@fffff400 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xffe0399f 0xc000001c /* pioA */
ARM: dts: at91: at91sam9g25: fix mux-mask pinctrl property There are only 19 PIOB pins having primary names PB0-PB18. Not all of them have a 'C' function. So the pinctrl property mask ends up being the same as the other SoC of the at91sam9x5 series. Reported-by: Marek Sieranski <marek.sieranski@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: <stable@vger.kernel.org> # v3.8+ Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-03-13 22:20:05 +07:00
0x0007ffff 0x00047e3f 0x00000000 /* pioB */
arm: at91: dt: at91sam9 add serial pinctrl support Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-07-05 15:56:09 +07:00
0x80000000 0x07c0ffff 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
};
ARM: dts: at91: at91sam9x5: switch to new clock bindings Switch at91sam9x5 boards to the new PMC clock bindings. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2018-07-16 16:24:17 +07:00
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
arm: at91: dt: at91sam9 add serial pinctrl support Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-07-05 15:56:09 +07:00
};
};
};
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