mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 10:35:08 +07:00
188 lines
12 KiB
C
188 lines
12 KiB
C
|
/*
|
||
|
* Copyright 2008 Advanced Micro Devices, Inc.
|
||
|
* Copyright 2008 Red Hat Inc.
|
||
|
* Copyright 2009 Jerome Glisse.
|
||
|
*
|
||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||
|
* copy of this software and associated documentation files (the "Software"),
|
||
|
* to deal in the Software without restriction, including without limitation
|
||
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||
|
* Software is furnished to do so, subject to the following conditions:
|
||
|
*
|
||
|
* The above copyright notice and this permission notice shall be included in
|
||
|
* all copies or substantial portions of the Software.
|
||
|
*
|
||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||
|
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||
|
*
|
||
|
* Authors: Dave Airlie
|
||
|
* Alex Deucher
|
||
|
* Jerome Glisse
|
||
|
*/
|
||
|
#ifndef __R520D_H__
|
||
|
#define __R520D_H__
|
||
|
|
||
|
/* Registers */
|
||
|
#define R_0000F8_CONFIG_MEMSIZE 0x0000F8
|
||
|
#define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0)
|
||
|
#define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF)
|
||
|
#define C_0000F8_CONFIG_MEMSIZE 0x00000000
|
||
|
#define R_000134_HDP_FB_LOCATION 0x000134
|
||
|
#define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0)
|
||
|
#define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF)
|
||
|
#define C_000134_HDP_FB_START 0xFFFF0000
|
||
|
#define R_0007C0_CP_STAT 0x0007C0
|
||
|
#define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0)
|
||
|
#define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1)
|
||
|
#define C_0007C0_MRU_BUSY 0xFFFFFFFE
|
||
|
#define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1)
|
||
|
#define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1)
|
||
|
#define C_0007C0_MWU_BUSY 0xFFFFFFFD
|
||
|
#define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2)
|
||
|
#define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1)
|
||
|
#define C_0007C0_RSIU_BUSY 0xFFFFFFFB
|
||
|
#define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3)
|
||
|
#define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1)
|
||
|
#define C_0007C0_RCIU_BUSY 0xFFFFFFF7
|
||
|
#define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9)
|
||
|
#define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1)
|
||
|
#define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF
|
||
|
#define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10)
|
||
|
#define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1)
|
||
|
#define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF
|
||
|
#define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11)
|
||
|
#define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1)
|
||
|
#define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF
|
||
|
#define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12)
|
||
|
#define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1)
|
||
|
#define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF
|
||
|
#define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13)
|
||
|
#define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1)
|
||
|
#define C_0007C0_CSI_BUSY 0xFFFFDFFF
|
||
|
#define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14)
|
||
|
#define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1)
|
||
|
#define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF
|
||
|
#define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15)
|
||
|
#define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1)
|
||
|
#define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF
|
||
|
#define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28)
|
||
|
#define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1)
|
||
|
#define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF
|
||
|
#define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29)
|
||
|
#define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1)
|
||
|
#define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF
|
||
|
#define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30)
|
||
|
#define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1)
|
||
|
#define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF
|
||
|
#define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31)
|
||
|
#define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1)
|
||
|
#define C_0007C0_CP_BUSY 0x7FFFFFFF
|
||
|
#define R_000E40_RBBM_STATUS 0x000E40
|
||
|
#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
|
||
|
#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
|
||
|
#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
|
||
|
#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
|
||
|
#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
|
||
|
#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
|
||
|
#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
|
||
|
#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
|
||
|
#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
|
||
|
#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
|
||
|
#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
|
||
|
#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
|
||
|
#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
|
||
|
#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
|
||
|
#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
|
||
|
#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
|
||
|
#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
|
||
|
#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
|
||
|
#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
|
||
|
#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
|
||
|
#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
|
||
|
#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
|
||
|
#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
|
||
|
#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
|
||
|
#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
|
||
|
#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
|
||
|
#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
|
||
|
#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
|
||
|
#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
|
||
|
#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
|
||
|
#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
|
||
|
#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
|
||
|
#define C_000E40_E2_BUSY 0xFFFDFFFF
|
||
|
#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
|
||
|
#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
|
||
|
#define C_000E40_RB2D_BUSY 0xFFFBFFFF
|
||
|
#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
|
||
|
#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
|
||
|
#define C_000E40_RB3D_BUSY 0xFFF7FFFF
|
||
|
#define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20)
|
||
|
#define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1)
|
||
|
#define C_000E40_VAP_BUSY 0xFFEFFFFF
|
||
|
#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
|
||
|
#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
|
||
|
#define C_000E40_RE_BUSY 0xFFDFFFFF
|
||
|
#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
|
||
|
#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
|
||
|
#define C_000E40_TAM_BUSY 0xFFBFFFFF
|
||
|
#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
|
||
|
#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
|
||
|
#define C_000E40_TDM_BUSY 0xFF7FFFFF
|
||
|
#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
|
||
|
#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
|
||
|
#define C_000E40_PB_BUSY 0xFEFFFFFF
|
||
|
#define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25)
|
||
|
#define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1)
|
||
|
#define C_000E40_TIM_BUSY 0xFDFFFFFF
|
||
|
#define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26)
|
||
|
#define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1)
|
||
|
#define C_000E40_GA_BUSY 0xFBFFFFFF
|
||
|
#define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27)
|
||
|
#define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1)
|
||
|
#define C_000E40_CBA2D_BUSY 0xF7FFFFFF
|
||
|
#define S_000E40_RBBM_HIBUSY(x) (((x) & 0x1) << 28)
|
||
|
#define G_000E40_RBBM_HIBUSY(x) (((x) >> 28) & 0x1)
|
||
|
#define C_000E40_RBBM_HIBUSY 0xEFFFFFFF
|
||
|
#define S_000E40_SKID_CFBUSY(x) (((x) & 0x1) << 29)
|
||
|
#define G_000E40_SKID_CFBUSY(x) (((x) >> 29) & 0x1)
|
||
|
#define C_000E40_SKID_CFBUSY 0xDFFFFFFF
|
||
|
#define S_000E40_VAP_VF_BUSY(x) (((x) & 0x1) << 30)
|
||
|
#define G_000E40_VAP_VF_BUSY(x) (((x) >> 30) & 0x1)
|
||
|
#define C_000E40_VAP_VF_BUSY 0xBFFFFFFF
|
||
|
#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
|
||
|
#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
|
||
|
#define C_000E40_GUI_ACTIVE 0x7FFFFFFF
|
||
|
|
||
|
|
||
|
#define R_000004_MC_FB_LOCATION 0x000004
|
||
|
#define S_000004_MC_FB_START(x) (((x) & 0xFFFF) << 0)
|
||
|
#define G_000004_MC_FB_START(x) (((x) >> 0) & 0xFFFF)
|
||
|
#define C_000004_MC_FB_START 0xFFFF0000
|
||
|
#define S_000004_MC_FB_TOP(x) (((x) & 0xFFFF) << 16)
|
||
|
#define G_000004_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF)
|
||
|
#define C_000004_MC_FB_TOP 0x0000FFFF
|
||
|
#define R_000005_MC_AGP_LOCATION 0x000005
|
||
|
#define S_000005_MC_AGP_START(x) (((x) & 0xFFFF) << 0)
|
||
|
#define G_000005_MC_AGP_START(x) (((x) >> 0) & 0xFFFF)
|
||
|
#define C_000005_MC_AGP_START 0xFFFF0000
|
||
|
#define S_000005_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16)
|
||
|
#define G_000005_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF)
|
||
|
#define C_000005_MC_AGP_TOP 0x0000FFFF
|
||
|
#define R_000006_AGP_BASE 0x000006
|
||
|
#define S_000006_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0)
|
||
|
#define G_000006_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF)
|
||
|
#define C_000006_AGP_BASE_ADDR 0x00000000
|
||
|
#define R_000007_AGP_BASE_2 0x000007
|
||
|
#define S_000007_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0)
|
||
|
#define G_000007_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF)
|
||
|
#define C_000007_AGP_BASE_ADDR_2 0xFFFFFFF0
|
||
|
|
||
|
#endif
|