2005-04-17 05:20:36 +07:00
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/*
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* sma cpu5 watchdog driver
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*
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* Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/miscdevice.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/timer.h>
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2006-01-10 06:59:26 +07:00
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#include <linux/completion.h>
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2005-10-31 06:03:48 +07:00
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#include <linux/jiffies.h>
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2008-05-19 20:05:24 +07:00
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#include <linux/io.h>
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#include <linux/uaccess.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/watchdog.h>
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/* adjustable parameters */
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2008-05-19 20:05:24 +07:00
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static int verbose;
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2005-04-17 05:20:36 +07:00
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static int port = 0x91;
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static int ticks = 10000;
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2008-05-19 20:05:24 +07:00
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static spinlock_t cpu5wdt_lock;
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2005-04-17 05:20:36 +07:00
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#define PFX "cpu5wdt: "
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#define CPU5WDT_EXTENT 0x0A
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#define CPU5WDT_STATUS_REG 0x00
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#define CPU5WDT_TIME_A_REG 0x02
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#define CPU5WDT_TIME_B_REG 0x03
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#define CPU5WDT_MODE_REG 0x04
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#define CPU5WDT_TRIGGER_REG 0x07
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#define CPU5WDT_ENABLE_REG 0x08
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#define CPU5WDT_RESET_REG 0x09
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#define CPU5WDT_INTERVAL (HZ/10+1)
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/* some device data */
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static struct {
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2006-01-10 06:59:26 +07:00
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struct completion stop;
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2008-02-25 19:39:57 +07:00
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int running;
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2005-04-17 05:20:36 +07:00
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struct timer_list timer;
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2008-02-25 19:39:57 +07:00
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int queue;
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2005-04-17 05:20:36 +07:00
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int default_ticks;
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unsigned long inuse;
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} cpu5wdt_device;
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/* generic helper functions */
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static void cpu5wdt_trigger(unsigned long unused)
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{
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2008-05-19 20:05:24 +07:00
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if (verbose > 2)
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2005-04-17 05:20:36 +07:00
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printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks);
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2008-05-19 20:05:24 +07:00
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if (cpu5wdt_device.running)
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2005-04-17 05:20:36 +07:00
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ticks--;
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2008-05-19 20:05:24 +07:00
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spin_lock(&cpu5wdt_lock);
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2005-04-17 05:20:36 +07:00
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/* keep watchdog alive */
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outb(1, port + CPU5WDT_TRIGGER_REG);
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/* requeue?? */
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2007-02-09 00:39:36 +07:00
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if (cpu5wdt_device.queue && ticks)
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mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
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2005-04-17 05:20:36 +07:00
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else {
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/* ticks doesn't matter anyway */
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2006-01-10 06:59:26 +07:00
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complete(&cpu5wdt_device.stop);
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2005-04-17 05:20:36 +07:00
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}
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2008-05-19 20:05:24 +07:00
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spin_unlock(&cpu5wdt_lock);
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2005-04-17 05:20:36 +07:00
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}
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static void cpu5wdt_reset(void)
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{
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ticks = cpu5wdt_device.default_ticks;
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2008-05-19 20:05:24 +07:00
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if (verbose)
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2005-04-17 05:20:36 +07:00
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printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks);
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}
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static void cpu5wdt_start(void)
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{
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2008-05-19 20:05:24 +07:00
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unsigned long flags;
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spin_lock_irqsave(&cpu5wdt_lock, flags);
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if (!cpu5wdt_device.queue) {
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2005-04-17 05:20:36 +07:00
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cpu5wdt_device.queue = 1;
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outb(0, port + CPU5WDT_TIME_A_REG);
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outb(0, port + CPU5WDT_TIME_B_REG);
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outb(1, port + CPU5WDT_MODE_REG);
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outb(0, port + CPU5WDT_RESET_REG);
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outb(0, port + CPU5WDT_ENABLE_REG);
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2007-02-09 00:39:36 +07:00
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mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
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2005-04-17 05:20:36 +07:00
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}
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/* if process dies, counter is not decremented */
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cpu5wdt_device.running++;
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2008-05-19 20:05:24 +07:00
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spin_unlock_irqrestore(&cpu5wdt_lock, flags);
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2005-04-17 05:20:36 +07:00
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}
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static int cpu5wdt_stop(void)
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{
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2008-05-19 20:05:24 +07:00
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unsigned long flags;
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2005-04-17 05:20:36 +07:00
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2008-05-19 20:05:24 +07:00
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spin_lock_irqsave(&cpu5wdt_lock, flags);
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if (cpu5wdt_device.running)
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cpu5wdt_device.running = 0;
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2005-04-17 05:20:36 +07:00
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ticks = cpu5wdt_device.default_ticks;
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2008-05-19 20:05:24 +07:00
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spin_unlock_irqrestore(&cpu5wdt_lock, flags);
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if (verbose)
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2005-04-17 05:20:36 +07:00
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printk(KERN_CRIT PFX "stop not possible\n");
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return -EIO;
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}
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/* filesystem operations */
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static int cpu5wdt_open(struct inode *inode, struct file *file)
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{
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2008-05-19 20:05:24 +07:00
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if (test_and_set_bit(0, &cpu5wdt_device.inuse))
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2005-04-17 05:20:36 +07:00
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return -EBUSY;
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return nonseekable_open(inode, file);
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}
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static int cpu5wdt_release(struct inode *inode, struct file *file)
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{
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clear_bit(0, &cpu5wdt_device.inuse);
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return 0;
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}
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2008-05-19 20:05:24 +07:00
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static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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2005-04-17 05:20:36 +07:00
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{
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void __user *argp = (void __user *)arg;
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2008-05-19 20:05:24 +07:00
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int __user *p = argp;
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2005-04-17 05:20:36 +07:00
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unsigned int value;
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2009-12-27 01:55:22 +07:00
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static const struct watchdog_info ident = {
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2005-04-17 05:20:36 +07:00
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.options = WDIOF_CARDRESET,
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.identity = "CPU5 WDT",
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};
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2008-05-19 20:05:24 +07:00
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switch (cmd) {
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2008-07-18 18:41:17 +07:00
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case WDIOC_GETSUPPORT:
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if (copy_to_user(argp, &ident, sizeof(ident)))
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return -EFAULT;
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2008-05-19 20:05:24 +07:00
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break;
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case WDIOC_GETSTATUS:
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value = inb(port + CPU5WDT_STATUS_REG);
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value = (value >> 2) & 1;
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return put_user(value, p);
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, p);
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case WDIOC_SETOPTIONS:
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if (get_user(value, p))
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return -EFAULT;
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if (value & WDIOS_ENABLECARD)
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cpu5wdt_start();
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if (value & WDIOS_DISABLECARD)
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cpu5wdt_stop();
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break;
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2008-07-18 18:41:17 +07:00
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case WDIOC_KEEPALIVE:
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cpu5wdt_reset();
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break;
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2008-05-19 20:05:24 +07:00
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default:
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return -ENOTTY;
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2005-04-17 05:20:36 +07:00
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}
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return 0;
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}
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2008-05-19 20:05:24 +07:00
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static ssize_t cpu5wdt_write(struct file *file, const char __user *buf,
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size_t count, loff_t *ppos)
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2005-04-17 05:20:36 +07:00
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{
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2008-05-19 20:05:24 +07:00
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if (!count)
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2005-04-17 05:20:36 +07:00
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return -EIO;
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cpu5wdt_reset();
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return count;
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}
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2006-07-03 14:24:21 +07:00
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static const struct file_operations cpu5wdt_fops = {
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2005-04-17 05:20:36 +07:00
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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2008-05-19 20:05:24 +07:00
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.unlocked_ioctl = cpu5wdt_ioctl,
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2005-04-17 05:20:36 +07:00
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.open = cpu5wdt_open,
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.write = cpu5wdt_write,
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.release = cpu5wdt_release,
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};
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static struct miscdevice cpu5wdt_misc = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &cpu5wdt_fops,
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};
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/* init/exit function */
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static int __devinit cpu5wdt_init(void)
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{
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unsigned int val;
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int err;
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2008-05-19 20:05:24 +07:00
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if (verbose)
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printk(KERN_DEBUG PFX
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"port=0x%x, verbose=%i\n", port, verbose);
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2005-04-17 05:20:36 +07:00
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2008-05-19 20:05:24 +07:00
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init_completion(&cpu5wdt_device.stop);
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spin_lock_init(&cpu5wdt_lock);
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cpu5wdt_device.queue = 0;
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setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
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cpu5wdt_device.default_ticks = ticks;
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if (!request_region(port, CPU5WDT_EXTENT, PFX)) {
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2005-04-17 05:20:36 +07:00
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printk(KERN_ERR PFX "request_region failed\n");
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err = -EBUSY;
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goto no_port;
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}
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/* watchdog reboot? */
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val = inb(port + CPU5WDT_STATUS_REG);
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val = (val >> 2) & 1;
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2008-05-19 20:05:24 +07:00
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if (!val)
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2005-04-17 05:20:36 +07:00
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printk(KERN_INFO PFX "sorry, was my fault\n");
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2008-05-19 20:05:24 +07:00
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err = misc_register(&cpu5wdt_misc);
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if (err < 0) {
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printk(KERN_ERR PFX "misc_register failed\n");
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goto no_misc;
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}
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2005-04-17 05:20:36 +07:00
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printk(KERN_INFO PFX "init success\n");
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return 0;
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no_misc:
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2007-03-24 19:58:12 +07:00
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release_region(port, CPU5WDT_EXTENT);
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no_port:
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2005-04-17 05:20:36 +07:00
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return err;
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}
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static int __devinit cpu5wdt_init_module(void)
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{
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return cpu5wdt_init();
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}
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static void __devexit cpu5wdt_exit(void)
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{
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2008-05-19 20:05:24 +07:00
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if (cpu5wdt_device.queue) {
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2005-04-17 05:20:36 +07:00
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cpu5wdt_device.queue = 0;
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2006-01-10 06:59:26 +07:00
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wait_for_completion(&cpu5wdt_device.stop);
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2005-04-17 05:20:36 +07:00
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}
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misc_deregister(&cpu5wdt_misc);
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release_region(port, CPU5WDT_EXTENT);
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}
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static void __devexit cpu5wdt_exit_module(void)
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{
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cpu5wdt_exit();
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}
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/* module entry points */
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module_init(cpu5wdt_init_module);
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module_exit(cpu5wdt_exit_module);
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MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
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MODULE_DESCRIPTION("sma cpu5 watchdog driver");
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MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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module_param(port, int, 0);
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MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
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module_param(verbose, int, 0);
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MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
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module_param(ticks, int, 0);
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MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");
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