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linux_dsm_epyc7002/include/linux/aer.h

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PCI-Express AER implemetation: AER core and aerdriver Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-07-31 14:21:33 +07:00
/*
* Copyright (C) 2006 Intel Corp.
* Tom Long Nguyen (tom.l.nguyen@intel.com)
* Zhang Yanmin (yanmin.zhang@intel.com)
*/
#ifndef _AER_H_
#define _AER_H_
PCI/AER: include header file We are having build failure with sparc allmodconfig with the error: drivers/nvme/host/pci.c:15:0: include/linux/aer.h: In function 'pci_enable_pcie_error_reporting': include/linux/aer.h:49:10: error: 'EINVAL' undeclared (first use in this function) The file aer.h is using the error values but they are defined in errno.h. Include errno.h so that we have the definitions of the error codes. Fixes: a0a3408ee614 ("NVMe: Add pci error handlers") Cc: Keith Busch <keith.busch@intel.com> Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Signed-off-by: Jens Axboe <axboe@fb.com>
2015-12-23 22:35:26 +07:00
#include <linux/errno.h>
PCI/AER: Make <linux/aer.h> standalone includable The header file references u16 and u32 types, but they are not defined in the header nor does the header pull in the necessary includes for them. This causes build breakage when the file is included without any of the dependencies being satisfied from somewhere else. Fix this by including linux/types.h (for u16 and u32). [bhelgaas: removed pci_dev declaration (already added by 5ccb8225abf2)] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-08-05 19:08:55 +07:00
#include <linux/types.h>
PCI/AER: Move AER severity defines to aer.h The function aer_recover_queue() is a public interface and the severity argument uses #defines that are in the private header pci/pcie/aer/aerdrv.h. This patch moves the #defines from pci/pcie/aer/aerdrv.h to include/linux/aer.h. [bhelgaas: split "remove 'extern' from declarations" to another patch] Signed-off-by: Betty Dall <betty.dall@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-06-07 01:10:49 +07:00
#define AER_NONFATAL 0
#define AER_FATAL 1
#define AER_CORRECTABLE 2
x86/ras: Fix build warnings in <linux/aer.h> Fix build warning due to a missing forward declaration in <linux/aer.h>. We need struct pci_dev to be forward declared so we can define pointers to it, but we don't need to pull in the whole definition. build log: In file included from include/ras/ras_event.h:11:0, from drivers/ras/ras.c:13: include/linux/aer.h:42:129: warning: ‘struct pci_dev’ declared inside parameter list [enabled by default] include/linux/aer.h:42:129: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] include/linux/aer.h:46:130: warning: ‘struct pci_dev’ declared inside parameter list [enabled by default] include/linux/aer.h:50:136: warning: ‘struct pci_dev’ declared inside parameter list [enabled by default] include/linux/aer.h:57:14: warning: ‘struct pci_dev’ declared inside parameter list [enabled by default] Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com> Link: http://lkml.kernel.org/r/53d7dea511471321bb@agluck-desk.sc.intel.com Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-07-30 00:49:25 +07:00
struct pci_dev;
ACPI, APEI, Add PCIe AER error information printing support The AER error information printing support is implemented in drivers/pci/pcie/aer/aer_print.c. So some string constants, functions and macros definitions can be re-used without being exported. The original PCIe AER error information printing function is not re-used directly because the overall format is quite different. And changing the original printing format may make some original users' scripts broken. Signed-off-by: Huang Ying <ying.huang@intel.com> CC: Jesse Barnes <jbarnes@virtuousgeek.org> CC: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-02-21 12:54:43 +07:00
struct aer_header_log_regs {
unsigned int dw0;
unsigned int dw1;
unsigned int dw2;
unsigned int dw3;
};
struct aer_capability_regs {
u32 header;
u32 uncor_status;
u32 uncor_mask;
u32 uncor_severity;
u32 cor_status;
u32 cor_mask;
u32 cap_control;
struct aer_header_log_regs header_log;
u32 root_command;
u32 root_status;
u16 cor_err_source;
u16 uncor_err_source;
};
PCI-Express AER implemetation: AER core and aerdriver Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-07-31 14:21:33 +07:00
#if defined(CONFIG_PCIEAER)
/* pci-e port driver needs this function to enable aer */
PCI/AER: Remove "extern" from function declarations We had an inconsistent mix of using and omitting the "extern" keyword on function declarations in header files. This removes them all. [bhelgaas: split out from "move AER severity defines" patch] Signed-off-by: Betty Dall <betty.dall@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-06-07 03:35:35 +07:00
int pci_enable_pcie_error_reporting(struct pci_dev *dev);
int pci_disable_pcie_error_reporting(struct pci_dev *dev);
int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
PCI/AER: Clear error status registers during enumeration and restore AER errors might be recorded when powering-on devices. These errors can be ignored, so firmware usually clears them before the OS enumerates devices. However, firmware is not involved when devices are added via hotplug, so the OS may discover power-up errors that should be ignored. The same may happen when powering up devices when resuming after suspend. Clear the AER error status registers during enumeration and resume. [bhelgaas: changelog, remove repetitive comments] Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-09-17 22:09:37 +07:00
int pci_cleanup_aer_error_status_regs(struct pci_dev *dev);
PCI-Express AER implemetation: AER core and aerdriver Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-07-31 14:21:33 +07:00
#else
PCI AER: fix warnings when PCIEAER=n Fix warnings when CONFIG_PCIEAER=n: drivers/pci/pcie/portdrv_pci.c:105: warning: statement with no effect drivers/pci/pcie/portdrv_pci.c:226: warning: statement with no effect drivers/scsi/arcmsr/arcmsr_hba.c:352: warning: statement with no effect Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Acked-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-08-24 00:37:53 +07:00
static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
{
return -EINVAL;
}
static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev)
{
return -EINVAL;
}
static inline int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
{
return -EINVAL;
}
PCI/AER: Clear error status registers during enumeration and restore AER errors might be recorded when powering-on devices. These errors can be ignored, so firmware usually clears them before the OS enumerates devices. However, firmware is not involved when devices are added via hotplug, so the OS may discover power-up errors that should be ignored. The same may happen when powering up devices when resuming after suspend. Clear the AER error status registers during enumeration and resume. [bhelgaas: changelog, remove repetitive comments] Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-09-17 22:09:37 +07:00
static inline int pci_cleanup_aer_error_status_regs(struct pci_dev *dev)
{
return -EINVAL;
}
PCI-Express AER implemetation: AER core and aerdriver Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-07-31 14:21:33 +07:00
#endif
PCI changes for the v3.11 merge window: PCI device hotplug - Add pci_alloc_dev() interface (Gu Zheng) - Add pci_bus_get()/put() for reference counting (Jiang Liu) - Fix SR-IOV reference count issues (Jiang Liu) - Remove unused acpi_pci_roots list (Jiang Liu) MSI - Conserve interrupt resources on x86 (Alexander Gordeev) AER - Force fatal severity when component has been reset (Betty Dall) - Reset link below Root Port as well as Downstream Port (Betty Dall) - Fix "Firmware first" flag setting (Bjorn Helgaas) - Don't parse HEST for non-PCIe devices (Bjorn Helgaas) ASPM - Warn when we can't disable ASPM as driver requests (Bjorn Helgaas) Miscellaneous - Add CircuitCo PCI IDs (Darren Hart) - Add AMD CZ SATA and SMBus PCI IDs (Shane Huang) - Work around Ivytown NTB BAR size issue (Jon Mason) - Detect invalid initial BAR values (Kevin Hao) - Add pcibios_release_device() (Sebastian Ott) - Fix powerpc & sparc PCI_UNKNOWN power state usage (Bjorn Helgaas) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJR0dhDAAoJEFmIoMA60/r8AUoP/RrKOXC2GGZCqUIKjUyxaCU+ NXwaNhjfRuge5lZHE8fUAnYVveFTv0iNo8if/md866/pS4il3vxaMWRhZrBddXqe juyxPUGaOb5NmI2C+g5ebQ1xHhnOU6kWrgQ5kQk5GmJdm6BpiWDCFaalyioYj27v FoN/25IG+5EtJjP6kRdQGFZq+RYOqlBfQp4fdFmY5bDsQiCLREH6YWHeNSkH+t1I Eh84WESqGzgaZyCb9QKM2AcU/HMKLux4VXAYp9idVr3tH1j9b/klQI7xNW7sPnkY LIzKTcfF89iXkhxc7zrF0O/n5rC5Cp7LQpiFMV6yCT3w25yWpq9itOwqcZ/nfCv6 fje8P1B2lwGrizkwKKLcosTzWkJewvfLkVye90WS3g0i3zlijF4pfEiw3a2ujA91 MP9/JmX+ZZ5QeGyPuFmYJyMlInH4vtSdegl9jtaeuX4cOnuMP+Ouxnxc+mH2bOfl Z5/K1OSCYLfb27uWM7od2lgb+GFHLMP+RMy073h0ZMpDvM6EnZy5iu1zU9+yJO4S 8/aRhBz4h+YEBinnXOJvHzMfu3wQQ7UvXZqEspgsug2Z5xHvxhMLhrJQgpVUSdsW Nrdm1dNdACV/cvt/lWzUE7SmUaOua/r/cVmViF2ryeRET7t65in+5NHXmXP8ET+r 1WA7pbykfegC9uY84PaK =X3Lo -----END PGP SIGNATURE----- Merge tag 'pci-v3.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: "PCI device hotplug - Add pci_alloc_dev() interface (Gu Zheng) - Add pci_bus_get()/put() for reference counting (Jiang Liu) - Fix SR-IOV reference count issues (Jiang Liu) - Remove unused acpi_pci_roots list (Jiang Liu) MSI - Conserve interrupt resources on x86 (Alexander Gordeev) AER - Force fatal severity when component has been reset (Betty Dall) - Reset link below Root Port as well as Downstream Port (Betty Dall) - Fix "Firmware first" flag setting (Bjorn Helgaas) - Don't parse HEST for non-PCIe devices (Bjorn Helgaas) ASPM - Warn when we can't disable ASPM as driver requests (Bjorn Helgaas) Miscellaneous - Add CircuitCo PCI IDs (Darren Hart) - Add AMD CZ SATA and SMBus PCI IDs (Shane Huang) - Work around Ivytown NTB BAR size issue (Jon Mason) - Detect invalid initial BAR values (Kevin Hao) - Add pcibios_release_device() (Sebastian Ott) - Fix powerpc & sparc PCI_UNKNOWN power state usage (Bjorn Helgaas)" * tag 'pci-v3.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (51 commits) MAINTAINERS: Add ACPI folks for ACPI-related things under drivers/pci PCI: Add CircuitCo vendor ID and subsystem ID PCI: Use pdev->pm_cap instead of pci_find_capability(..,PCI_CAP_ID_PM) PCI: Return early on allocation failures to unindent mainline code PCI: Simplify IOV implementation and fix reference count races PCI: Drop redundant setting of bus->is_added in virtfn_add_bus() unicore32/PCI: Remove redundant call of pci_bus_add_devices() m68k/PCI: Remove redundant call of pci_bus_add_devices() PCI / ACPI / PM: Use correct power state strings in messages PCI: Fix comment typo for pcie_pme_remove() PCI: Rename pci_release_bus_bridge_dev() to pci_release_host_bridge_dev() PCI: Fix refcount issue in pci_create_root_bus() error recovery path ia64/PCI: Clean up pci_scan_root_bus() usage PCI/AER: Reset link for devices below Root Port or Downstream Port ACPI / APEI: Force fatal AER severity when component has been reset PCI/AER: Remove "extern" from function declarations PCI/AER: Move AER severity defines to aer.h PCI/AER: Set dev->__aer_firmware_first only for matching devices PCI/AER: Factor out HEST device type matching PCI/AER: Don't parse HEST table for non-PCIe devices ...
2013-07-04 06:31:35 +07:00
void cper_print_aer(struct pci_dev *dev, int cper_severity,
PCI/AER: Remove "extern" from function declarations We had an inconsistent mix of using and omitting the "extern" keyword on function declarations in header files. This removes them all. [bhelgaas: split out from "move AER severity defines" patch] Signed-off-by: Betty Dall <betty.dall@hp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-06-07 03:35:35 +07:00
struct aer_capability_regs *aer);
int cper_severity_to_aer(int cper_severity);
void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
PCI changes for the v3.11 merge window: PCI device hotplug - Add pci_alloc_dev() interface (Gu Zheng) - Add pci_bus_get()/put() for reference counting (Jiang Liu) - Fix SR-IOV reference count issues (Jiang Liu) - Remove unused acpi_pci_roots list (Jiang Liu) MSI - Conserve interrupt resources on x86 (Alexander Gordeev) AER - Force fatal severity when component has been reset (Betty Dall) - Reset link below Root Port as well as Downstream Port (Betty Dall) - Fix "Firmware first" flag setting (Bjorn Helgaas) - Don't parse HEST for non-PCIe devices (Bjorn Helgaas) ASPM - Warn when we can't disable ASPM as driver requests (Bjorn Helgaas) Miscellaneous - Add CircuitCo PCI IDs (Darren Hart) - Add AMD CZ SATA and SMBus PCI IDs (Shane Huang) - Work around Ivytown NTB BAR size issue (Jon Mason) - Detect invalid initial BAR values (Kevin Hao) - Add pcibios_release_device() (Sebastian Ott) - Fix powerpc & sparc PCI_UNKNOWN power state usage (Bjorn Helgaas) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJR0dhDAAoJEFmIoMA60/r8AUoP/RrKOXC2GGZCqUIKjUyxaCU+ NXwaNhjfRuge5lZHE8fUAnYVveFTv0iNo8if/md866/pS4il3vxaMWRhZrBddXqe juyxPUGaOb5NmI2C+g5ebQ1xHhnOU6kWrgQ5kQk5GmJdm6BpiWDCFaalyioYj27v FoN/25IG+5EtJjP6kRdQGFZq+RYOqlBfQp4fdFmY5bDsQiCLREH6YWHeNSkH+t1I Eh84WESqGzgaZyCb9QKM2AcU/HMKLux4VXAYp9idVr3tH1j9b/klQI7xNW7sPnkY LIzKTcfF89iXkhxc7zrF0O/n5rC5Cp7LQpiFMV6yCT3w25yWpq9itOwqcZ/nfCv6 fje8P1B2lwGrizkwKKLcosTzWkJewvfLkVye90WS3g0i3zlijF4pfEiw3a2ujA91 MP9/JmX+ZZ5QeGyPuFmYJyMlInH4vtSdegl9jtaeuX4cOnuMP+Ouxnxc+mH2bOfl Z5/K1OSCYLfb27uWM7od2lgb+GFHLMP+RMy073h0ZMpDvM6EnZy5iu1zU9+yJO4S 8/aRhBz4h+YEBinnXOJvHzMfu3wQQ7UvXZqEspgsug2Z5xHvxhMLhrJQgpVUSdsW Nrdm1dNdACV/cvt/lWzUE7SmUaOua/r/cVmViF2ryeRET7t65in+5NHXmXP8ET+r 1WA7pbykfegC9uY84PaK =X3Lo -----END PGP SIGNATURE----- Merge tag 'pci-v3.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: "PCI device hotplug - Add pci_alloc_dev() interface (Gu Zheng) - Add pci_bus_get()/put() for reference counting (Jiang Liu) - Fix SR-IOV reference count issues (Jiang Liu) - Remove unused acpi_pci_roots list (Jiang Liu) MSI - Conserve interrupt resources on x86 (Alexander Gordeev) AER - Force fatal severity when component has been reset (Betty Dall) - Reset link below Root Port as well as Downstream Port (Betty Dall) - Fix "Firmware first" flag setting (Bjorn Helgaas) - Don't parse HEST for non-PCIe devices (Bjorn Helgaas) ASPM - Warn when we can't disable ASPM as driver requests (Bjorn Helgaas) Miscellaneous - Add CircuitCo PCI IDs (Darren Hart) - Add AMD CZ SATA and SMBus PCI IDs (Shane Huang) - Work around Ivytown NTB BAR size issue (Jon Mason) - Detect invalid initial BAR values (Kevin Hao) - Add pcibios_release_device() (Sebastian Ott) - Fix powerpc & sparc PCI_UNKNOWN power state usage (Bjorn Helgaas)" * tag 'pci-v3.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (51 commits) MAINTAINERS: Add ACPI folks for ACPI-related things under drivers/pci PCI: Add CircuitCo vendor ID and subsystem ID PCI: Use pdev->pm_cap instead of pci_find_capability(..,PCI_CAP_ID_PM) PCI: Return early on allocation failures to unindent mainline code PCI: Simplify IOV implementation and fix reference count races PCI: Drop redundant setting of bus->is_added in virtfn_add_bus() unicore32/PCI: Remove redundant call of pci_bus_add_devices() m68k/PCI: Remove redundant call of pci_bus_add_devices() PCI / ACPI / PM: Use correct power state strings in messages PCI: Fix comment typo for pcie_pme_remove() PCI: Rename pci_release_bus_bridge_dev() to pci_release_host_bridge_dev() PCI: Fix refcount issue in pci_create_root_bus() error recovery path ia64/PCI: Clean up pci_scan_root_bus() usage PCI/AER: Reset link for devices below Root Port or Downstream Port ACPI / APEI: Force fatal AER severity when component has been reset PCI/AER: Remove "extern" from function declarations PCI/AER: Move AER severity defines to aer.h PCI/AER: Set dev->__aer_firmware_first only for matching devices PCI/AER: Factor out HEST device type matching PCI/AER: Don't parse HEST table for non-PCIe devices ...
2013-07-04 06:31:35 +07:00
int severity,
struct aer_capability_regs *aer_regs);
PCI-Express AER implemetation: AER core and aerdriver Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-07-31 14:21:33 +07:00
#endif //_AER_H_
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