2007-05-12 02:49:56 +07:00
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/*
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* arch/arm/mach-at91/at91sam9rl.c
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*
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* Copyright (C) 2005 SAN People
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* Copyright (C) 2007 Atmel Corporation
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/module.h>
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2011-08-02 21:21:36 +07:00
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#include <asm/proc-fns.h>
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[ARM] fix AT91, davinci, h720x, ks8695, msm, mx2, mx3, netx, omap1, omap2, pxa, s3c
arch/arm/mach-at91/at91cap9.c:337: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91rm9200.c:301: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9260.c:351: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9261.c:287: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9263.c:312: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-at91/at91sam9rl.c:304: error: 'NR_AIC_IRQS' undeclared here (not in a function)
arch/arm/mach-h720x/h7202-eval.c:38: error: implicit declaration of function 'IRQ_CHAINED_GPIOB'
arch/arm/mach-ks8695/devices.c:46: error: 'KS8695_IRQ_WAN_RX_STATUS' undeclared here (not in a function)
arch/arm/mach-msm/devices.c:28: error: 'INT_UART1' undeclared here (not in a function)
arch/arm/mach-mx2/devices.c:233: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-mx3/devices.c:128: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:140: error: 'INT_730_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:165: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap1/mcbsp.c:200: error: 'INT_McBSP1RX' undeclared here (not in a function)
arch/arm/mach-omap2/board-apollon.c:286: error: implicit declaration of function 'omap_set_gpio_direction'
arch/arm/mach-omap2/mcbsp.c:154: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-omap2/mcbsp.c:181: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function)
arch/arm/mach-pxa/e350.c:36: error: 'IRQ_BOARD_START' undeclared here (not in a function)
arch/arm/plat-s3c/dev-i2c0.c:32: error: 'IRQ_IIC' undeclared here (not in a function)
...
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-08 17:01:47 +07:00
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#include <asm/irq.h>
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2007-05-12 02:49:56 +07:00
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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2012-03-29 00:30:01 +07:00
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#include <asm/system_misc.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/cpu.h>
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2011-04-23 21:12:57 +07:00
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#include <mach/at91_dbgu.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/at91sam9rl.h>
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#include <mach/at91_pmc.h>
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#include <mach/at91_rstc.h>
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2007-05-12 02:49:56 +07:00
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2011-04-23 14:28:34 +07:00
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#include "soc.h"
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2007-05-12 02:49:56 +07:00
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#include "generic.h"
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#include "clock.h"
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2011-10-14 00:37:09 +07:00
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#include "sam9_smc.h"
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2007-05-12 02:49:56 +07:00
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/* --------------------------------------------------------------------
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* Clocks
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* -------------------------------------------------------------------- */
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/*
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* The peripheral clocks.
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*/
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static struct clk pioA_clk = {
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.name = "pioA_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_PIOA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioB_clk = {
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.name = "pioB_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_PIOB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioC_clk = {
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.name = "pioC_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_PIOC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioD_clk = {
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.name = "pioD_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_PIOD,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart0_clk = {
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.name = "usart0_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_US0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart1_clk = {
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.name = "usart1_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_US1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart2_clk = {
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.name = "usart2_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_US2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart3_clk = {
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.name = "usart3_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_US3,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc_clk = {
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.name = "mci_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_MCI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twi0_clk = {
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.name = "twi0_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_TWI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twi1_clk = {
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.name = "twi1_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_TWI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi_clk = {
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.name = "spi_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_SPI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc0_clk = {
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.name = "tc0_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_TC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc1_clk = {
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.name = "tc1_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_TC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc2_clk = {
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.name = "tc2_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_TC2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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2008-09-19 01:42:37 +07:00
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static struct clk pwm_clk = {
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.name = "pwm_clk",
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2007-05-12 02:49:56 +07:00
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.pmc_mask = 1 << AT91SAM9RL_ID_PWMC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tsc_clk = {
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.name = "tsc_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_TSC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk dma_clk = {
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.name = "dma_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_DMA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk udphs_clk = {
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.name = "udphs_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_UDPHS,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk lcdc_clk = {
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.name = "lcdc_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_LCDC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ac97_clk = {
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.name = "ac97_clk",
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.pmc_mask = 1 << AT91SAM9RL_ID_AC97C,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk *periph_clocks[] __initdata = {
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&pioA_clk,
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&pioB_clk,
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&pioC_clk,
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&pioD_clk,
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&usart0_clk,
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&usart1_clk,
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&usart2_clk,
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&usart3_clk,
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&mmc_clk,
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&twi0_clk,
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&twi1_clk,
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&spi_clk,
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&ssc0_clk,
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&ssc1_clk,
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&tc0_clk,
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&tc1_clk,
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&tc2_clk,
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2008-09-19 01:42:37 +07:00
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&pwm_clk,
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2007-05-12 02:49:56 +07:00
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&tsc_clk,
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&dma_clk,
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&udphs_clk,
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&lcdc_clk,
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&ac97_clk,
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// irq0
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};
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2011-02-02 13:27:07 +07:00
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static struct clk_lookup periph_clocks_lookups[] = {
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2011-06-21 13:24:33 +07:00
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CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
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CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
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2011-02-02 13:27:07 +07:00
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CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
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CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
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CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
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CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
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CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
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2011-11-13 12:00:58 +07:00
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CLKDEV_CON_ID("pioA", &pioA_clk),
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CLKDEV_CON_ID("pioB", &pioB_clk),
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CLKDEV_CON_ID("pioC", &pioC_clk),
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CLKDEV_CON_ID("pioD", &pioD_clk),
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2011-02-02 13:27:07 +07:00
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};
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static struct clk_lookup usart_clocks_lookups[] = {
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
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CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
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};
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2007-05-12 02:49:56 +07:00
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/*
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* The two programmable clocks.
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* You must configure pin multiplexing to bring these signals out.
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*/
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static struct clk pck0 = {
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.name = "pck0",
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.pmc_mask = AT91_PMC_PCK0,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 0,
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};
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static struct clk pck1 = {
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.name = "pck1",
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.pmc_mask = AT91_PMC_PCK1,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 1,
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};
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static void __init at91sam9rl_register_clocks(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
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clk_register(periph_clocks[i]);
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2011-02-02 13:27:07 +07:00
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clkdev_add_table(periph_clocks_lookups,
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ARRAY_SIZE(periph_clocks_lookups));
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clkdev_add_table(usart_clocks_lookups,
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ARRAY_SIZE(usart_clocks_lookups));
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2007-05-12 02:49:56 +07:00
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clk_register(&pck0);
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clk_register(&pck1);
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}
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2011-02-02 13:27:07 +07:00
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static struct clk_lookup console_clock_lookup;
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void __init at91sam9rl_set_console_clock(int id)
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{
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if (id >= ARRAY_SIZE(usart_clocks_lookups))
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return;
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console_clock_lookup.con_id = "usart";
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console_clock_lookup.clk = usart_clocks_lookups[id].clk;
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clkdev_add(&console_clock_lookup);
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}
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2007-05-12 02:49:56 +07:00
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/* --------------------------------------------------------------------
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* GPIO
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* -------------------------------------------------------------------- */
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2011-10-17 13:28:38 +07:00
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static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = {
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2007-05-12 02:49:56 +07:00
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{
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.id = AT91SAM9RL_ID_PIOA,
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2011-09-16 22:37:50 +07:00
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.regbase = AT91SAM9RL_BASE_PIOA,
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2007-05-12 02:49:56 +07:00
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}, {
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.id = AT91SAM9RL_ID_PIOB,
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2011-09-16 22:37:50 +07:00
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.regbase = AT91SAM9RL_BASE_PIOB,
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2007-05-12 02:49:56 +07:00
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}, {
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.id = AT91SAM9RL_ID_PIOC,
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2011-09-16 22:37:50 +07:00
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.regbase = AT91SAM9RL_BASE_PIOC,
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2007-05-12 02:49:56 +07:00
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}, {
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.id = AT91SAM9RL_ID_PIOD,
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2011-09-16 22:37:50 +07:00
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.regbase = AT91SAM9RL_BASE_PIOD,
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2007-05-12 02:49:56 +07:00
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}
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};
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/* --------------------------------------------------------------------
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* AT91SAM9RL processor initialization
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* -------------------------------------------------------------------- */
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2011-04-23 14:28:34 +07:00
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static void __init at91sam9rl_map_io(void)
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2007-05-12 02:49:56 +07:00
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{
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2011-04-23 21:12:57 +07:00
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unsigned long sram_size;
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2007-05-12 02:49:56 +07:00
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2011-04-23 21:12:57 +07:00
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switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
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2007-05-12 02:49:56 +07:00
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case AT91_CIDR_SRAMSIZ_32K:
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sram_size = 2 * SZ_16K;
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break;
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case AT91_CIDR_SRAMSIZ_16K:
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default:
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sram_size = SZ_16K;
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}
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|
|
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/* Map SRAM */
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2011-05-10 02:20:09 +07:00
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|
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at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
|
2011-04-28 19:19:32 +07:00
|
|
|
}
|
2007-05-12 02:49:56 +07:00
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|
|
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2011-10-14 00:17:18 +07:00
|
|
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static void __init at91sam9rl_ioremap_registers(void)
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|
|
|
{
|
2011-11-01 00:23:20 +07:00
|
|
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at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
|
2011-11-18 00:25:52 +07:00
|
|
|
at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
|
2012-02-13 11:58:53 +07:00
|
|
|
at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512);
|
2011-09-18 21:29:50 +07:00
|
|
|
at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
|
2011-10-14 00:37:09 +07:00
|
|
|
at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
|
2011-11-27 22:15:50 +07:00
|
|
|
at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX);
|
2011-10-14 00:17:18 +07:00
|
|
|
}
|
|
|
|
|
2011-04-24 17:20:28 +07:00
|
|
|
static void __init at91sam9rl_initialize(void)
|
2011-04-28 19:19:32 +07:00
|
|
|
{
|
2012-02-05 19:25:32 +07:00
|
|
|
arm_pm_idle = at91sam9_idle;
|
2011-11-03 16:53:29 +07:00
|
|
|
arm_pm_restart = at91sam9_alt_restart;
|
2007-05-12 02:49:56 +07:00
|
|
|
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
|
|
|
|
|
|
|
|
/* Register GPIO subsystem */
|
|
|
|
at91_gpio_init(at91sam9rl_gpio, 4);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* --------------------------------------------------------------------
|
|
|
|
* Interrupt initialization
|
|
|
|
* -------------------------------------------------------------------- */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The default interrupt priority levels (0 = lowest, 7 = highest).
|
|
|
|
*/
|
|
|
|
static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
|
|
|
|
7, /* Advanced Interrupt Controller */
|
|
|
|
7, /* System Peripherals */
|
|
|
|
1, /* Parallel IO Controller A */
|
|
|
|
1, /* Parallel IO Controller B */
|
|
|
|
1, /* Parallel IO Controller C */
|
|
|
|
1, /* Parallel IO Controller D */
|
|
|
|
5, /* USART 0 */
|
|
|
|
5, /* USART 1 */
|
|
|
|
5, /* USART 2 */
|
|
|
|
5, /* USART 3 */
|
|
|
|
0, /* Multimedia Card Interface */
|
|
|
|
6, /* Two-Wire Interface 0 */
|
|
|
|
6, /* Two-Wire Interface 1 */
|
|
|
|
5, /* Serial Peripheral Interface */
|
|
|
|
4, /* Serial Synchronous Controller 0 */
|
|
|
|
4, /* Serial Synchronous Controller 1 */
|
|
|
|
0, /* Timer Counter 0 */
|
|
|
|
0, /* Timer Counter 1 */
|
|
|
|
0, /* Timer Counter 2 */
|
|
|
|
0,
|
|
|
|
0, /* Touch Screen Controller */
|
|
|
|
0, /* DMA Controller */
|
|
|
|
2, /* USB Device High speed port */
|
|
|
|
2, /* LCD Controller */
|
|
|
|
6, /* AC97 Controller */
|
|
|
|
0,
|
|
|
|
0,
|
|
|
|
0,
|
|
|
|
0,
|
|
|
|
0,
|
|
|
|
0,
|
|
|
|
0, /* Advanced Interrupt Controller */
|
|
|
|
};
|
|
|
|
|
2011-04-23 21:12:57 +07:00
|
|
|
struct at91_init_soc __initdata at91sam9rl_soc = {
|
2011-04-23 14:28:34 +07:00
|
|
|
.map_io = at91sam9rl_map_io,
|
2011-04-23 14:28:34 +07:00
|
|
|
.default_irq_priority = at91sam9rl_default_irq_priority,
|
2011-10-14 00:17:18 +07:00
|
|
|
.ioremap_registers = at91sam9rl_ioremap_registers,
|
2011-04-24 17:15:34 +07:00
|
|
|
.register_clocks = at91sam9rl_register_clocks,
|
2011-04-23 14:28:34 +07:00
|
|
|
.init = at91sam9rl_initialize,
|
|
|
|
};
|