2005-04-17 05:20:36 +07:00
|
|
|
/*
|
2007-10-19 09:11:03 +07:00
|
|
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* Driver for Marvell Discovery (MV643XX) and Marvell Orion ethernet ports
|
2005-04-17 05:20:36 +07:00
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|
|
* Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
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*
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* Based on the 64360 driver from:
|
2008-03-19 01:40:14 +07:00
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* Copyright (C) 2002 Rabeeh Khoury <rabeeh@galileo.co.il>
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* Rabeeh Khoury <rabeeh@marvell.com>
|
2005-04-17 05:20:36 +07:00
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*
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* Copyright (C) 2003 PMC-Sierra, Inc.,
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2006-01-06 13:45:45 +07:00
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* written by Manish Lachwani
|
2005-04-17 05:20:36 +07:00
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*
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* Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
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*
|
2006-03-04 00:02:05 +07:00
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* Copyright (C) 2004-2006 MontaVista Software, Inc.
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2005-04-17 05:20:36 +07:00
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* Dale Farnsworth <dale@farnsworth.org>
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*
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* Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
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* <sjhill@realitydiluted.com>
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*
|
2008-03-19 01:40:14 +07:00
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|
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* Copyright (C) 2007-2008 Marvell Semiconductor
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* Lennert Buytenhek <buytenh@marvell.com>
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*
|
2005-04-17 05:20:36 +07:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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|
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
|
2008-06-01 05:54:05 +07:00
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|
2005-04-17 05:20:36 +07:00
|
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|
#include <linux/init.h>
|
|
|
|
#include <linux/dma-mapping.h>
|
2006-01-19 07:35:54 +07:00
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|
#include <linux/in.h>
|
2008-10-02 07:52:39 +07:00
|
|
|
#include <linux/ip.h>
|
2005-04-17 05:20:36 +07:00
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|
|
#include <linux/tcp.h>
|
|
|
|
#include <linux/udp.h>
|
|
|
|
#include <linux/etherdevice.h>
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|
|
|
#include <linux/delay.h>
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|
|
|
#include <linux/ethtool.h>
|
2005-10-30 01:07:23 +07:00
|
|
|
#include <linux/platform_device.h>
|
2007-10-19 21:03:46 +07:00
|
|
|
#include <linux/module.h>
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|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/spinlock.h>
|
|
|
|
#include <linux/workqueue.h>
|
2008-08-26 18:34:19 +07:00
|
|
|
#include <linux/phy.h>
|
2007-10-19 21:03:46 +07:00
|
|
|
#include <linux/mv643xx_eth.h>
|
2008-11-20 18:57:16 +07:00
|
|
|
#include <linux/io.h>
|
|
|
|
#include <linux/types.h>
|
2009-02-12 21:08:39 +07:00
|
|
|
#include <linux/inet_lro.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 15:04:11 +07:00
|
|
|
#include <linux/slab.h>
|
2005-04-17 05:20:36 +07:00
|
|
|
#include <asm/system.h>
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static char mv643xx_eth_driver_name[] = "mv643xx_eth";
|
2008-08-24 14:01:57 +07:00
|
|
|
static char mv643xx_eth_driver_version[] = "1.4";
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2007-10-19 21:03:46 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Registers shared between all ports.
|
|
|
|
*/
|
2008-06-01 06:03:23 +07:00
|
|
|
#define PHY_ADDR 0x0000
|
|
|
|
#define SMI_REG 0x0004
|
2008-08-26 09:42:59 +07:00
|
|
|
#define SMI_BUSY 0x10000000
|
|
|
|
#define SMI_READ_VALID 0x08000000
|
|
|
|
#define SMI_OPCODE_READ 0x04000000
|
|
|
|
#define SMI_OPCODE_WRITE 0x00000000
|
|
|
|
#define ERR_INT_CAUSE 0x0080
|
|
|
|
#define ERR_INT_SMI_DONE 0x00000010
|
|
|
|
#define ERR_INT_MASK 0x0084
|
2008-06-01 06:03:23 +07:00
|
|
|
#define WINDOW_BASE(w) (0x0200 + ((w) << 3))
|
|
|
|
#define WINDOW_SIZE(w) (0x0204 + ((w) << 3))
|
|
|
|
#define WINDOW_REMAP_HIGH(w) (0x0280 + ((w) << 2))
|
|
|
|
#define WINDOW_BAR_ENABLE 0x0290
|
|
|
|
#define WINDOW_PROTECT(w) (0x0294 + ((w) << 4))
|
2007-10-19 21:03:46 +07:00
|
|
|
|
|
|
|
/*
|
2008-11-20 18:57:36 +07:00
|
|
|
* Main per-port registers. These live at offset 0x0400 for
|
|
|
|
* port #0, 0x0800 for port #1, and 0x0c00 for port #2.
|
2007-10-19 21:03:46 +07:00
|
|
|
*/
|
2008-11-20 18:57:36 +07:00
|
|
|
#define PORT_CONFIG 0x0000
|
2008-06-01 06:22:06 +07:00
|
|
|
#define UNICAST_PROMISCUOUS_MODE 0x00000001
|
2008-11-20 18:57:36 +07:00
|
|
|
#define PORT_CONFIG_EXT 0x0004
|
|
|
|
#define MAC_ADDR_LOW 0x0014
|
|
|
|
#define MAC_ADDR_HIGH 0x0018
|
|
|
|
#define SDMA_CONFIG 0x001c
|
2009-05-06 10:01:17 +07:00
|
|
|
#define TX_BURST_SIZE_16_64BIT 0x01000000
|
|
|
|
#define TX_BURST_SIZE_4_64BIT 0x00800000
|
|
|
|
#define BLM_TX_NO_SWAP 0x00000020
|
|
|
|
#define BLM_RX_NO_SWAP 0x00000010
|
|
|
|
#define RX_BURST_SIZE_16_64BIT 0x00000008
|
|
|
|
#define RX_BURST_SIZE_4_64BIT 0x00000004
|
2008-11-20 18:57:36 +07:00
|
|
|
#define PORT_SERIAL_CONTROL 0x003c
|
2009-05-06 10:01:17 +07:00
|
|
|
#define SET_MII_SPEED_TO_100 0x01000000
|
|
|
|
#define SET_GMII_SPEED_TO_1000 0x00800000
|
|
|
|
#define SET_FULL_DUPLEX_MODE 0x00200000
|
|
|
|
#define MAX_RX_PACKET_9700BYTE 0x000a0000
|
|
|
|
#define DISABLE_AUTO_NEG_SPEED_GMII 0x00002000
|
|
|
|
#define DO_NOT_FORCE_LINK_FAIL 0x00000400
|
|
|
|
#define SERIAL_PORT_CONTROL_RESERVED 0x00000200
|
|
|
|
#define DISABLE_AUTO_NEG_FOR_FLOW_CTRL 0x00000008
|
|
|
|
#define DISABLE_AUTO_NEG_FOR_DUPLEX 0x00000004
|
|
|
|
#define FORCE_LINK_PASS 0x00000002
|
|
|
|
#define SERIAL_PORT_ENABLE 0x00000001
|
2008-11-20 18:57:36 +07:00
|
|
|
#define PORT_STATUS 0x0044
|
2008-06-01 06:30:42 +07:00
|
|
|
#define TX_FIFO_EMPTY 0x00000400
|
2008-07-15 07:15:24 +07:00
|
|
|
#define TX_IN_PROGRESS 0x00000080
|
2008-07-24 11:22:59 +07:00
|
|
|
#define PORT_SPEED_MASK 0x00000030
|
|
|
|
#define PORT_SPEED_1000 0x00000010
|
|
|
|
#define PORT_SPEED_100 0x00000020
|
|
|
|
#define PORT_SPEED_10 0x00000000
|
|
|
|
#define FLOW_CONTROL_ENABLED 0x00000008
|
|
|
|
#define FULL_DUPLEX 0x00000004
|
2008-07-14 19:29:40 +07:00
|
|
|
#define LINK_UP 0x00000002
|
2008-11-20 18:57:36 +07:00
|
|
|
#define TXQ_COMMAND 0x0048
|
|
|
|
#define TXQ_FIX_PRIO_CONF 0x004c
|
|
|
|
#define TX_BW_RATE 0x0050
|
|
|
|
#define TX_BW_MTU 0x0058
|
|
|
|
#define TX_BW_BURST 0x005c
|
|
|
|
#define INT_CAUSE 0x0060
|
2008-06-02 06:47:21 +07:00
|
|
|
#define INT_TX_END 0x07f80000
|
2009-05-06 10:02:01 +07:00
|
|
|
#define INT_TX_END_0 0x00080000
|
2008-08-28 11:10:04 +07:00
|
|
|
#define INT_RX 0x000003fc
|
2009-05-06 10:02:01 +07:00
|
|
|
#define INT_RX_0 0x00000004
|
2008-06-01 07:00:31 +07:00
|
|
|
#define INT_EXT 0x00000002
|
2008-11-20 18:57:36 +07:00
|
|
|
#define INT_CAUSE_EXT 0x0064
|
2008-08-28 11:10:04 +07:00
|
|
|
#define INT_EXT_LINK_PHY 0x00110000
|
|
|
|
#define INT_EXT_TX 0x000000ff
|
2008-11-20 18:57:36 +07:00
|
|
|
#define INT_MASK 0x0068
|
|
|
|
#define INT_MASK_EXT 0x006c
|
|
|
|
#define TX_FIFO_URGENT_THRESHOLD 0x0074
|
|
|
|
#define TXQ_FIX_PRIO_CONF_MOVED 0x00dc
|
|
|
|
#define TX_BW_RATE_MOVED 0x00e0
|
|
|
|
#define TX_BW_MTU_MOVED 0x00e8
|
|
|
|
#define TX_BW_BURST_MOVED 0x00ec
|
|
|
|
#define RXQ_CURRENT_DESC_PTR(q) (0x020c + ((q) << 4))
|
|
|
|
#define RXQ_COMMAND 0x0280
|
|
|
|
#define TXQ_CURRENT_DESC_PTR(q) (0x02c0 + ((q) << 2))
|
|
|
|
#define TXQ_BW_TOKENS(q) (0x0300 + ((q) << 4))
|
|
|
|
#define TXQ_BW_CONF(q) (0x0304 + ((q) << 4))
|
|
|
|
#define TXQ_BW_WRR_CONF(q) (0x0308 + ((q) << 4))
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Misc per-port registers.
|
|
|
|
*/
|
2008-06-01 06:03:23 +07:00
|
|
|
#define MIB_COUNTERS(p) (0x1000 + ((p) << 7))
|
|
|
|
#define SPECIAL_MCAST_TABLE(p) (0x1400 + ((p) << 10))
|
|
|
|
#define OTHER_MCAST_TABLE(p) (0x1500 + ((p) << 10))
|
|
|
|
#define UNICAST_TABLE(p) (0x1600 + ((p) << 10))
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-06-01 06:18:58 +07:00
|
|
|
|
|
|
|
/*
|
2009-05-06 10:01:17 +07:00
|
|
|
* SDMA configuration register default value.
|
2008-06-01 06:18:58 +07:00
|
|
|
*/
|
2007-10-19 21:03:46 +07:00
|
|
|
#if defined(__BIG_ENDIAN)
|
|
|
|
#define PORT_SDMA_CONFIG_DEFAULT_VALUE \
|
2009-01-20 08:16:00 +07:00
|
|
|
(RX_BURST_SIZE_4_64BIT | \
|
|
|
|
TX_BURST_SIZE_4_64BIT)
|
2007-10-19 21:03:46 +07:00
|
|
|
#elif defined(__LITTLE_ENDIAN)
|
|
|
|
#define PORT_SDMA_CONFIG_DEFAULT_VALUE \
|
2009-01-20 08:16:00 +07:00
|
|
|
(RX_BURST_SIZE_4_64BIT | \
|
|
|
|
BLM_RX_NO_SWAP | \
|
|
|
|
BLM_TX_NO_SWAP | \
|
|
|
|
TX_BURST_SIZE_4_64BIT)
|
2007-10-19 21:03:46 +07:00
|
|
|
#else
|
|
|
|
#error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
|
|
|
|
#endif
|
|
|
|
|
2008-06-01 06:22:37 +07:00
|
|
|
|
|
|
|
/*
|
2009-05-06 10:01:17 +07:00
|
|
|
* Misc definitions.
|
2008-06-01 06:22:37 +07:00
|
|
|
*/
|
2009-05-06 10:01:17 +07:00
|
|
|
#define DEFAULT_RX_QUEUE_SIZE 128
|
|
|
|
#define DEFAULT_TX_QUEUE_SIZE 256
|
2009-05-06 10:01:22 +07:00
|
|
|
#define SKB_DMA_REALIGN ((PAGE_SIZE - NET_SKB_PAD) % SMP_CACHE_BYTES)
|
2007-10-19 21:03:46 +07:00
|
|
|
|
|
|
|
|
2008-06-01 06:41:29 +07:00
|
|
|
/*
|
|
|
|
* RX/TX descriptors.
|
2007-10-19 21:03:46 +07:00
|
|
|
*/
|
|
|
|
#if defined(__BIG_ENDIAN)
|
2008-06-01 07:10:27 +07:00
|
|
|
struct rx_desc {
|
2007-10-19 21:03:46 +07:00
|
|
|
u16 byte_cnt; /* Descriptor buffer byte count */
|
|
|
|
u16 buf_size; /* Buffer size */
|
|
|
|
u32 cmd_sts; /* Descriptor command status */
|
|
|
|
u32 next_desc_ptr; /* Next descriptor pointer */
|
|
|
|
u32 buf_ptr; /* Descriptor buffer pointer */
|
|
|
|
};
|
|
|
|
|
2008-06-01 07:10:27 +07:00
|
|
|
struct tx_desc {
|
2007-10-19 21:03:46 +07:00
|
|
|
u16 byte_cnt; /* buffer byte count */
|
|
|
|
u16 l4i_chk; /* CPU provided TCP checksum */
|
|
|
|
u32 cmd_sts; /* Command/status field */
|
|
|
|
u32 next_desc_ptr; /* Pointer to next descriptor */
|
|
|
|
u32 buf_ptr; /* pointer to buffer for this descriptor*/
|
|
|
|
};
|
|
|
|
#elif defined(__LITTLE_ENDIAN)
|
2008-06-01 07:10:27 +07:00
|
|
|
struct rx_desc {
|
2007-10-19 21:03:46 +07:00
|
|
|
u32 cmd_sts; /* Descriptor command status */
|
|
|
|
u16 buf_size; /* Buffer size */
|
|
|
|
u16 byte_cnt; /* Descriptor buffer byte count */
|
|
|
|
u32 buf_ptr; /* Descriptor buffer pointer */
|
|
|
|
u32 next_desc_ptr; /* Next descriptor pointer */
|
|
|
|
};
|
|
|
|
|
2008-06-01 07:10:27 +07:00
|
|
|
struct tx_desc {
|
2007-10-19 21:03:46 +07:00
|
|
|
u32 cmd_sts; /* Command/status field */
|
|
|
|
u16 l4i_chk; /* CPU provided TCP checksum */
|
|
|
|
u16 byte_cnt; /* buffer byte count */
|
|
|
|
u32 buf_ptr; /* pointer to buffer for this descriptor*/
|
|
|
|
u32 next_desc_ptr; /* Pointer to next descriptor */
|
|
|
|
};
|
|
|
|
#else
|
|
|
|
#error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
|
|
|
|
#endif
|
|
|
|
|
2008-06-01 06:41:29 +07:00
|
|
|
/* RX & TX descriptor command */
|
2008-06-01 07:10:27 +07:00
|
|
|
#define BUFFER_OWNED_BY_DMA 0x80000000
|
2008-06-01 06:41:29 +07:00
|
|
|
|
|
|
|
/* RX & TX descriptor status */
|
2008-06-01 07:10:27 +07:00
|
|
|
#define ERROR_SUMMARY 0x00000001
|
2008-06-01 06:41:29 +07:00
|
|
|
|
|
|
|
/* RX descriptor status */
|
2008-06-01 07:10:27 +07:00
|
|
|
#define LAYER_4_CHECKSUM_OK 0x40000000
|
|
|
|
#define RX_ENABLE_INTERRUPT 0x20000000
|
|
|
|
#define RX_FIRST_DESC 0x08000000
|
|
|
|
#define RX_LAST_DESC 0x04000000
|
2009-02-12 21:08:39 +07:00
|
|
|
#define RX_IP_HDR_OK 0x02000000
|
|
|
|
#define RX_PKT_IS_IPV4 0x01000000
|
|
|
|
#define RX_PKT_IS_ETHERNETV2 0x00800000
|
|
|
|
#define RX_PKT_LAYER4_TYPE_MASK 0x00600000
|
|
|
|
#define RX_PKT_LAYER4_TYPE_TCP_IPV4 0x00000000
|
|
|
|
#define RX_PKT_IS_VLAN_TAGGED 0x00080000
|
2008-06-01 06:41:29 +07:00
|
|
|
|
|
|
|
/* TX descriptor command */
|
2008-06-01 07:10:27 +07:00
|
|
|
#define TX_ENABLE_INTERRUPT 0x00800000
|
|
|
|
#define GEN_CRC 0x00400000
|
|
|
|
#define TX_FIRST_DESC 0x00200000
|
|
|
|
#define TX_LAST_DESC 0x00100000
|
|
|
|
#define ZERO_PADDING 0x00080000
|
|
|
|
#define GEN_IP_V4_CHECKSUM 0x00040000
|
|
|
|
#define GEN_TCP_UDP_CHECKSUM 0x00020000
|
|
|
|
#define UDP_FRAME 0x00010000
|
2008-07-24 11:22:59 +07:00
|
|
|
#define MAC_HDR_EXTRA_4_BYTES 0x00008000
|
|
|
|
#define MAC_HDR_EXTRA_8_BYTES 0x00000200
|
2008-06-01 06:41:29 +07:00
|
|
|
|
2008-06-01 07:10:27 +07:00
|
|
|
#define TX_IHL_SHIFT 11
|
2008-06-01 06:41:29 +07:00
|
|
|
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* global *******************************************************************/
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_shared_private {
|
2008-06-02 05:28:40 +07:00
|
|
|
/*
|
|
|
|
* Ethernet controller base address.
|
|
|
|
*/
|
2008-06-01 07:10:27 +07:00
|
|
|
void __iomem *base;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-26 17:56:56 +07:00
|
|
|
/*
|
|
|
|
* Points at the right SMI instance to use.
|
|
|
|
*/
|
|
|
|
struct mv643xx_eth_shared_private *smi;
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
/*
|
2008-08-26 18:34:19 +07:00
|
|
|
* Provides access to local SMI interface.
|
2008-06-02 05:28:40 +07:00
|
|
|
*/
|
2008-10-09 06:29:57 +07:00
|
|
|
struct mii_bus *smi_bus;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-26 09:42:59 +07:00
|
|
|
/*
|
|
|
|
* If we have access to the error interrupt pin (which is
|
|
|
|
* somewhat misnamed as it not only reflects internal errors
|
|
|
|
* but also reflects SMI completion), use that to wait for
|
|
|
|
* SMI access completion instead of polling the SMI busy bit.
|
|
|
|
*/
|
|
|
|
int err_interrupt;
|
|
|
|
wait_queue_head_t smi_busy_wait;
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
/*
|
|
|
|
* Per-port MBUS window access register value.
|
|
|
|
*/
|
2008-06-01 05:48:39 +07:00
|
|
|
u32 win_protect;
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
/*
|
|
|
|
* Hardware-specific parameters.
|
|
|
|
*/
|
2008-06-01 05:48:39 +07:00
|
|
|
unsigned int t_clk;
|
2008-06-02 06:54:16 +07:00
|
|
|
int extended_rx_coal_limit;
|
2008-09-04 17:22:34 +07:00
|
|
|
int tx_bw_control;
|
2008-06-01 05:48:39 +07:00
|
|
|
};
|
|
|
|
|
2008-09-04 17:22:34 +07:00
|
|
|
#define TX_BW_CONTROL_ABSENT 0
|
|
|
|
#define TX_BW_CONTROL_OLD_LAYOUT 1
|
|
|
|
#define TX_BW_CONTROL_NEW_LAYOUT 2
|
|
|
|
|
2009-02-12 21:07:37 +07:00
|
|
|
static int mv643xx_eth_open(struct net_device *dev);
|
|
|
|
static int mv643xx_eth_stop(struct net_device *dev);
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
|
|
|
|
/* per-port *****************************************************************/
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mib_counters {
|
2007-10-19 21:03:46 +07:00
|
|
|
u64 good_octets_received;
|
|
|
|
u32 bad_octets_received;
|
|
|
|
u32 internal_mac_transmit_err;
|
|
|
|
u32 good_frames_received;
|
|
|
|
u32 bad_frames_received;
|
|
|
|
u32 broadcast_frames_received;
|
|
|
|
u32 multicast_frames_received;
|
|
|
|
u32 frames_64_octets;
|
|
|
|
u32 frames_65_to_127_octets;
|
|
|
|
u32 frames_128_to_255_octets;
|
|
|
|
u32 frames_256_to_511_octets;
|
|
|
|
u32 frames_512_to_1023_octets;
|
|
|
|
u32 frames_1024_to_max_octets;
|
|
|
|
u64 good_octets_sent;
|
|
|
|
u32 good_frames_sent;
|
|
|
|
u32 excessive_collision;
|
|
|
|
u32 multicast_frames_sent;
|
|
|
|
u32 broadcast_frames_sent;
|
|
|
|
u32 unrec_mac_control_received;
|
|
|
|
u32 fc_sent;
|
|
|
|
u32 good_fc_received;
|
|
|
|
u32 bad_fc_received;
|
|
|
|
u32 undersize_received;
|
|
|
|
u32 fragments_received;
|
|
|
|
u32 oversize_received;
|
|
|
|
u32 jabber_received;
|
|
|
|
u32 mac_receive_error;
|
|
|
|
u32 bad_crc_event;
|
|
|
|
u32 collision;
|
|
|
|
u32 late_collision;
|
|
|
|
};
|
|
|
|
|
2009-02-12 21:08:39 +07:00
|
|
|
struct lro_counters {
|
|
|
|
u32 lro_aggregated;
|
|
|
|
u32 lro_flushed;
|
|
|
|
u32 lro_no_desc;
|
|
|
|
};
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
struct rx_queue {
|
2008-06-02 06:01:26 +07:00
|
|
|
int index;
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
int rx_ring_size;
|
|
|
|
|
|
|
|
int rx_desc_count;
|
|
|
|
int rx_curr_desc;
|
|
|
|
int rx_used_desc;
|
|
|
|
|
|
|
|
struct rx_desc *rx_desc_area;
|
|
|
|
dma_addr_t rx_desc_dma;
|
|
|
|
int rx_desc_area_size;
|
|
|
|
struct sk_buff **rx_skb;
|
2009-02-12 21:08:39 +07:00
|
|
|
|
|
|
|
struct net_lro_mgr lro_mgr;
|
|
|
|
struct net_lro_desc lro_arr[8];
|
2008-06-01 23:09:35 +07:00
|
|
|
};
|
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
struct tx_queue {
|
2008-06-02 06:28:22 +07:00
|
|
|
int index;
|
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
int tx_ring_size;
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
int tx_desc_count;
|
|
|
|
int tx_curr_desc;
|
|
|
|
int tx_used_desc;
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-06-01 07:52:41 +07:00
|
|
|
struct tx_desc *tx_desc_area;
|
2007-10-19 21:03:46 +07:00
|
|
|
dma_addr_t tx_desc_dma;
|
|
|
|
int tx_desc_area_size;
|
2008-08-28 10:53:18 +07:00
|
|
|
|
|
|
|
struct sk_buff_head tx_skb;
|
2008-08-28 13:26:28 +07:00
|
|
|
|
|
|
|
unsigned long tx_packets;
|
|
|
|
unsigned long tx_bytes;
|
|
|
|
unsigned long tx_dropped;
|
2008-06-02 01:51:22 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
struct mv643xx_eth_private {
|
|
|
|
struct mv643xx_eth_shared_private *shared;
|
2008-11-20 18:57:36 +07:00
|
|
|
void __iomem *base;
|
2008-06-02 05:28:40 +07:00
|
|
|
int port_num;
|
2008-06-02 01:51:22 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
struct net_device *dev;
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
struct phy_device *phy;
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-09-19 10:04:57 +07:00
|
|
|
struct timer_list mib_counters_timer;
|
|
|
|
spinlock_t mib_counters_lock;
|
2008-06-02 05:28:40 +07:00
|
|
|
struct mib_counters mib_counters;
|
2008-09-19 10:04:57 +07:00
|
|
|
|
2009-02-12 21:08:39 +07:00
|
|
|
struct lro_counters lro_counters;
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
struct work_struct tx_timeout_task;
|
2008-06-01 23:09:35 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
struct napi_struct napi;
|
2009-05-06 10:02:01 +07:00
|
|
|
u32 int_mask;
|
2009-04-29 18:57:34 +07:00
|
|
|
u8 oom;
|
2008-08-28 13:09:10 +07:00
|
|
|
u8 work_link;
|
|
|
|
u8 work_tx;
|
|
|
|
u8 work_tx_end;
|
|
|
|
u8 work_rx;
|
|
|
|
u8 work_rx_refill;
|
|
|
|
|
2008-10-01 16:33:57 +07:00
|
|
|
int skb_size;
|
|
|
|
struct sk_buff_head rx_recycle;
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
/*
|
|
|
|
* RX state.
|
|
|
|
*/
|
2009-02-12 21:07:37 +07:00
|
|
|
int rx_ring_size;
|
2008-06-01 23:09:35 +07:00
|
|
|
unsigned long rx_desc_sram_addr;
|
|
|
|
int rx_desc_sram_size;
|
2008-08-26 15:23:22 +07:00
|
|
|
int rxq_count;
|
2008-08-24 09:33:36 +07:00
|
|
|
struct timer_list rx_oom;
|
2008-06-02 06:01:26 +07:00
|
|
|
struct rx_queue rxq[8];
|
2008-06-02 01:51:22 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* TX state.
|
|
|
|
*/
|
2009-02-12 21:07:37 +07:00
|
|
|
int tx_ring_size;
|
2008-06-02 01:51:22 +07:00
|
|
|
unsigned long tx_desc_sram_addr;
|
|
|
|
int tx_desc_sram_size;
|
2008-08-26 15:23:22 +07:00
|
|
|
int txq_count;
|
2008-06-02 06:28:22 +07:00
|
|
|
struct tx_queue txq[8];
|
2007-10-19 21:03:46 +07:00
|
|
|
};
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* port register accessors **************************************************/
|
2008-06-01 07:18:13 +07:00
|
|
|
static inline u32 rdl(struct mv643xx_eth_private *mp, int offset)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-01 07:10:27 +07:00
|
|
|
return readl(mp->shared->base + offset);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
static inline u32 rdlp(struct mv643xx_eth_private *mp, int offset)
|
|
|
|
{
|
|
|
|
return readl(mp->base + offset);
|
|
|
|
}
|
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static inline void wrl(struct mv643xx_eth_private *mp, int offset, u32 data)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-01 07:10:27 +07:00
|
|
|
writel(data, mp->shared->base + offset);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
static inline void wrlp(struct mv643xx_eth_private *mp, int offset, u32 data)
|
|
|
|
{
|
|
|
|
writel(data, mp->base + offset);
|
|
|
|
}
|
|
|
|
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* rxq/txq helper functions *************************************************/
|
2008-06-01 23:09:35 +07:00
|
|
|
static struct mv643xx_eth_private *rxq_to_mp(struct rx_queue *rxq)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-02 06:01:26 +07:00
|
|
|
return container_of(rxq, struct mv643xx_eth_private, rxq[rxq->index]);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2007-10-19 21:03:46 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
static struct mv643xx_eth_private *txq_to_mp(struct tx_queue *txq)
|
|
|
|
{
|
2008-06-02 06:28:22 +07:00
|
|
|
return container_of(txq, struct mv643xx_eth_private, txq[txq->index]);
|
2008-06-02 01:51:22 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
static void rxq_enable(struct rx_queue *rxq)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-01 23:09:35 +07:00
|
|
|
struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, RXQ_COMMAND, 1 << rxq->index);
|
2008-06-01 23:09:35 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
static void rxq_disable(struct rx_queue *rxq)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
|
2008-06-02 06:01:26 +07:00
|
|
|
u8 mask = 1 << rxq->index;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, RXQ_COMMAND, mask << 8);
|
|
|
|
while (rdlp(mp, RXQ_COMMAND) & mask)
|
2008-06-01 23:09:35 +07:00
|
|
|
udelay(10);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
|
|
|
|
2008-07-12 00:38:34 +07:00
|
|
|
static void txq_reset_hw_ptr(struct tx_queue *txq)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
|
|
|
u32 addr;
|
|
|
|
|
|
|
|
addr = (u32)txq->tx_desc_dma;
|
|
|
|
addr += txq->tx_curr_desc * sizeof(struct tx_desc);
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, TXQ_CURRENT_DESC_PTR(txq->index), addr);
|
2008-07-12 00:38:34 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
static void txq_enable(struct tx_queue *txq)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 01:51:22 +07:00
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, TXQ_COMMAND, 1 << txq->index);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
static void txq_disable(struct tx_queue *txq)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 01:51:22 +07:00
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-06-02 06:28:22 +07:00
|
|
|
u8 mask = 1 << txq->index;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, TXQ_COMMAND, mask << 8);
|
|
|
|
while (rdlp(mp, TXQ_COMMAND) & mask)
|
2008-06-02 01:51:22 +07:00
|
|
|
udelay(10);
|
|
|
|
}
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
static void txq_maybe_wake(struct tx_queue *txq)
|
2008-06-02 01:51:22 +07:00
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-08-28 11:26:23 +07:00
|
|
|
struct netdev_queue *nq = netdev_get_tx_queue(mp->dev, txq->index);
|
2008-06-02 06:28:22 +07:00
|
|
|
|
2008-08-28 13:26:28 +07:00
|
|
|
if (netif_tx_queue_stopped(nq)) {
|
|
|
|
__netif_tx_lock(nq, smp_processor_id());
|
|
|
|
if (txq->tx_ring_size - txq->tx_desc_count >= MAX_SKB_FRAGS + 1)
|
|
|
|
netif_tx_wake_queue(nq);
|
|
|
|
__netif_tx_unlock(nq);
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
/* rx napi ******************************************************************/
|
2009-02-12 21:08:39 +07:00
|
|
|
static int
|
|
|
|
mv643xx_get_skb_header(struct sk_buff *skb, void **iphdr, void **tcph,
|
|
|
|
u64 *hdr_flags, void *priv)
|
|
|
|
{
|
|
|
|
unsigned long cmd_sts = (unsigned long)priv;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure that this packet is Ethernet II, is not VLAN
|
|
|
|
* tagged, is IPv4, has a valid IP header, and is TCP.
|
|
|
|
*/
|
|
|
|
if ((cmd_sts & (RX_IP_HDR_OK | RX_PKT_IS_IPV4 |
|
|
|
|
RX_PKT_IS_ETHERNETV2 | RX_PKT_LAYER4_TYPE_MASK |
|
|
|
|
RX_PKT_IS_VLAN_TAGGED)) !=
|
|
|
|
(RX_IP_HDR_OK | RX_PKT_IS_IPV4 |
|
|
|
|
RX_PKT_IS_ETHERNETV2 | RX_PKT_LAYER4_TYPE_TCP_IPV4))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
skb_reset_network_header(skb);
|
|
|
|
skb_set_transport_header(skb, ip_hdrlen(skb));
|
|
|
|
*iphdr = ip_hdr(skb);
|
|
|
|
*tcph = tcp_hdr(skb);
|
|
|
|
*hdr_flags = LRO_IPV4 | LRO_TCP;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
static int rxq_process(struct rx_queue *rxq, int budget)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 23:09:35 +07:00
|
|
|
struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
|
|
|
|
struct net_device_stats *stats = &mp->dev->stats;
|
2009-02-12 21:08:39 +07:00
|
|
|
int lro_flush_needed;
|
2008-06-01 23:09:35 +07:00
|
|
|
int rx;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-02-12 21:08:39 +07:00
|
|
|
lro_flush_needed = 0;
|
2008-06-01 23:09:35 +07:00
|
|
|
rx = 0;
|
2008-08-24 07:33:47 +07:00
|
|
|
while (rx < budget && rxq->rx_desc_count) {
|
2008-06-02 05:28:40 +07:00
|
|
|
struct rx_desc *rx_desc;
|
2008-06-01 15:31:56 +07:00
|
|
|
unsigned int cmd_sts;
|
2008-06-02 05:28:40 +07:00
|
|
|
struct sk_buff *skb;
|
2008-09-14 20:50:32 +07:00
|
|
|
u16 byte_cnt;
|
2006-03-04 00:02:51 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
rx_desc = &rxq->rx_desc_area[rxq->rx_curr_desc];
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 15:31:56 +07:00
|
|
|
cmd_sts = rx_desc->cmd_sts;
|
2008-08-24 09:33:36 +07:00
|
|
|
if (cmd_sts & BUFFER_OWNED_BY_DMA)
|
2008-06-01 15:31:56 +07:00
|
|
|
break;
|
|
|
|
rmb();
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
skb = rxq->rx_skb[rxq->rx_curr_desc];
|
|
|
|
rxq->rx_skb[rxq->rx_curr_desc] = NULL;
|
2006-03-04 00:02:51 +07:00
|
|
|
|
2008-08-24 04:45:28 +07:00
|
|
|
rxq->rx_curr_desc++;
|
|
|
|
if (rxq->rx_curr_desc == rxq->rx_ring_size)
|
|
|
|
rxq->rx_curr_desc = 0;
|
2006-03-04 00:02:51 +07:00
|
|
|
|
2009-05-18 11:16:47 +07:00
|
|
|
dma_unmap_single(mp->dev->dev.parent, rx_desc->buf_ptr,
|
2008-08-24 08:00:20 +07:00
|
|
|
rx_desc->buf_size, DMA_FROM_DEVICE);
|
2008-06-01 23:09:35 +07:00
|
|
|
rxq->rx_desc_count--;
|
|
|
|
rx++;
|
2005-09-01 23:59:23 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
mp->work_rx_refill |= 1 << rxq->index;
|
|
|
|
|
2008-09-14 20:50:32 +07:00
|
|
|
byte_cnt = rx_desc->byte_cnt;
|
|
|
|
|
2006-03-04 00:04:39 +07:00
|
|
|
/*
|
|
|
|
* Update statistics.
|
2008-06-02 05:28:40 +07:00
|
|
|
*
|
|
|
|
* Note that the descriptor byte count includes 2 dummy
|
|
|
|
* bytes automatically inserted by the hardware at the
|
|
|
|
* start of the packet (which we don't count), and a 4
|
|
|
|
* byte CRC at the end of the packet (which we do count).
|
2006-03-04 00:04:39 +07:00
|
|
|
*/
|
2005-04-17 05:20:36 +07:00
|
|
|
stats->rx_packets++;
|
2008-09-14 20:50:32 +07:00
|
|
|
stats->rx_bytes += byte_cnt - 2;
|
2008-06-01 15:31:56 +07:00
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/*
|
2008-06-02 05:28:40 +07:00
|
|
|
* In case we received a packet without first / last bits
|
|
|
|
* on, or the error summary bit is set, the packet needs
|
|
|
|
* to be dropped.
|
2005-04-17 05:20:36 +07:00
|
|
|
*/
|
2008-11-20 18:58:46 +07:00
|
|
|
if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC | ERROR_SUMMARY))
|
|
|
|
!= (RX_FIRST_DESC | RX_LAST_DESC))
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The -4 is for the CRC in the trailer of the
|
|
|
|
* received packet
|
|
|
|
*/
|
|
|
|
skb_put(skb, byte_cnt - 2 - 4);
|
|
|
|
|
|
|
|
if (cmd_sts & LAYER_4_CHECKSUM_OK)
|
|
|
|
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
|
|
|
skb->protocol = eth_type_trans(skb, mp->dev);
|
2009-02-12 21:08:39 +07:00
|
|
|
|
|
|
|
if (skb->dev->features & NETIF_F_LRO &&
|
|
|
|
skb->ip_summed == CHECKSUM_UNNECESSARY) {
|
|
|
|
lro_receive_skb(&rxq->lro_mgr, skb, (void *)cmd_sts);
|
|
|
|
lro_flush_needed = 1;
|
|
|
|
} else
|
|
|
|
netif_receive_skb(skb);
|
2008-11-20 18:58:46 +07:00
|
|
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
err:
|
|
|
|
stats->rx_dropped++;
|
|
|
|
|
|
|
|
if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) !=
|
|
|
|
(RX_FIRST_DESC | RX_LAST_DESC)) {
|
|
|
|
if (net_ratelimit())
|
|
|
|
dev_printk(KERN_ERR, &mp->dev->dev,
|
|
|
|
"received packet spanning "
|
|
|
|
"multiple descriptors\n");
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
2008-11-20 18:58:46 +07:00
|
|
|
|
|
|
|
if (cmd_sts & ERROR_SUMMARY)
|
|
|
|
stats->rx_errors++;
|
|
|
|
|
|
|
|
dev_kfree_skb(skb);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2009-02-12 21:08:39 +07:00
|
|
|
if (lro_flush_needed)
|
|
|
|
lro_flush_all(&rxq->lro_mgr);
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
if (rx < budget)
|
|
|
|
mp->work_rx &= ~(1 << rxq->index);
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
return rx;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
static int rxq_refill(struct rx_queue *rxq, int budget)
|
2006-01-27 15:15:30 +07:00
|
|
|
{
|
2008-08-28 13:09:10 +07:00
|
|
|
struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
|
|
|
|
int refilled;
|
2008-06-01 23:09:35 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
refilled = 0;
|
|
|
|
while (refilled < budget && rxq->rx_desc_count < rxq->rx_ring_size) {
|
|
|
|
struct sk_buff *skb;
|
|
|
|
int rx;
|
2008-11-20 18:59:04 +07:00
|
|
|
struct rx_desc *rx_desc;
|
2010-01-05 16:15:32 +07:00
|
|
|
int size;
|
2006-01-27 15:15:30 +07:00
|
|
|
|
2008-10-01 16:33:57 +07:00
|
|
|
skb = __skb_dequeue(&mp->rx_recycle);
|
|
|
|
if (skb == NULL)
|
2009-05-06 10:01:22 +07:00
|
|
|
skb = dev_alloc_skb(mp->skb_size);
|
2008-10-01 16:33:57 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
if (skb == NULL) {
|
2009-04-29 18:57:34 +07:00
|
|
|
mp->oom = 1;
|
2008-08-28 13:09:10 +07:00
|
|
|
goto oom;
|
|
|
|
}
|
2006-01-27 15:15:30 +07:00
|
|
|
|
2009-05-06 10:01:22 +07:00
|
|
|
if (SKB_DMA_REALIGN)
|
|
|
|
skb_reserve(skb, SKB_DMA_REALIGN);
|
2008-08-24 09:33:36 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
refilled++;
|
|
|
|
rxq->rx_desc_count++;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
rx = rxq->rx_used_desc++;
|
|
|
|
if (rxq->rx_used_desc == rxq->rx_ring_size)
|
|
|
|
rxq->rx_used_desc = 0;
|
2008-08-24 09:33:36 +07:00
|
|
|
|
2008-11-20 18:59:04 +07:00
|
|
|
rx_desc = rxq->rx_desc_area + rx;
|
|
|
|
|
2010-01-05 16:15:32 +07:00
|
|
|
size = skb->end - skb->data;
|
2009-05-18 11:16:47 +07:00
|
|
|
rx_desc->buf_ptr = dma_map_single(mp->dev->dev.parent,
|
2010-01-05 16:15:32 +07:00
|
|
|
skb->data, size,
|
2009-05-18 11:16:47 +07:00
|
|
|
DMA_FROM_DEVICE);
|
2010-01-05 16:15:32 +07:00
|
|
|
rx_desc->buf_size = size;
|
2008-08-28 13:09:10 +07:00
|
|
|
rxq->rx_skb[rx] = skb;
|
|
|
|
wmb();
|
2008-11-20 18:59:04 +07:00
|
|
|
rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT;
|
2008-08-28 13:09:10 +07:00
|
|
|
wmb();
|
2008-08-24 09:33:36 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
/*
|
|
|
|
* The hardware automatically prepends 2 bytes of
|
|
|
|
* dummy data to each received packet, so that the
|
|
|
|
* IP header ends up 16-byte aligned.
|
|
|
|
*/
|
|
|
|
skb_reserve(skb, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (refilled < budget)
|
|
|
|
mp->work_rx_refill &= ~(1 << rxq->index);
|
|
|
|
|
|
|
|
oom:
|
|
|
|
return refilled;
|
2006-01-27 15:15:30 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
|
|
|
|
/* tx ***********************************************************************/
|
|
|
|
static inline unsigned int has_tiny_unaligned_frags(struct sk_buff *skb)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 01:51:22 +07:00
|
|
|
int frag;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
|
2008-06-02 01:51:22 +07:00
|
|
|
skb_frag_t *fragp = &skb_shinfo(skb)->frags[frag];
|
|
|
|
if (fragp->size <= 8 && fragp->page_offset & 7)
|
2008-06-01 05:48:39 +07:00
|
|
|
return 1;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
2008-06-02 01:51:22 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return 0;
|
|
|
|
}
|
2006-03-04 00:03:36 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
static void txq_submit_frag_skb(struct tx_queue *txq, struct sk_buff *skb)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2009-05-18 11:16:47 +07:00
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-06-02 01:51:22 +07:00
|
|
|
int nr_frags = skb_shinfo(skb)->nr_frags;
|
2008-06-01 05:48:39 +07:00
|
|
|
int frag;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
for (frag = 0; frag < nr_frags; frag++) {
|
|
|
|
skb_frag_t *this_frag;
|
|
|
|
int tx_index;
|
|
|
|
struct tx_desc *desc;
|
|
|
|
|
|
|
|
this_frag = &skb_shinfo(skb)->frags[frag];
|
2008-11-20 18:58:09 +07:00
|
|
|
tx_index = txq->tx_curr_desc++;
|
|
|
|
if (txq->tx_curr_desc == txq->tx_ring_size)
|
|
|
|
txq->tx_curr_desc = 0;
|
2008-06-02 01:51:22 +07:00
|
|
|
desc = &txq->tx_desc_area[tx_index];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The last fragment will generate an interrupt
|
|
|
|
* which will free the skb on TX completion.
|
|
|
|
*/
|
|
|
|
if (frag == nr_frags - 1) {
|
|
|
|
desc->cmd_sts = BUFFER_OWNED_BY_DMA |
|
|
|
|
ZERO_PADDING | TX_LAST_DESC |
|
|
|
|
TX_ENABLE_INTERRUPT;
|
|
|
|
} else {
|
|
|
|
desc->cmd_sts = BUFFER_OWNED_BY_DMA;
|
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
desc->l4i_chk = 0;
|
|
|
|
desc->byte_cnt = this_frag->size;
|
2009-05-18 11:16:47 +07:00
|
|
|
desc->buf_ptr = dma_map_page(mp->dev->dev.parent,
|
|
|
|
this_frag->page,
|
|
|
|
this_frag->page_offset,
|
|
|
|
this_frag->size, DMA_TO_DEVICE);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static inline __be16 sum16_as_be(__sum16 sum)
|
|
|
|
{
|
|
|
|
return (__force __be16)sum;
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-09-19 09:05:00 +07:00
|
|
|
static int txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
mv643xx_eth: fix TX hang erratum workaround
The previously merged TX hang erratum workaround ("mv643xx_eth:
work around TX hang hardware issue") assumes that TX_END interrupts
are delivered simultaneously with or after their corresponding TX
interrupts, but this is not always true in practise.
In particular, it appears that TX_END interrupts are issued as soon
as descriptor fetch returns an invalid descriptor, which may happen
before earlier descriptors have been fully transmitted and written
back to memory as being done.
This hardware behavior can lead to a situation where the current
driver code mistakenly assumes that the MAC has given up transmitting
before noticing the packets that it is in fact still currently working
on, causing the driver to re-kick the transmit queue, which will only
cause the MAC to re-fetch the invalid head descriptor, and generate
another TX_END interrupt, et cetera, until the packets in the pipe
finally finish transmitting and have their descriptors written back
to memory, which will then finally break the loop.
Fix this by having the erratum workaround not check the 'number of
unfinished descriptor', but instead, to compare the software's idea
of what the head descriptor pointer should be to the hardware's head
descriptor pointer (which is updated on the same conditions as the
TX_END interupt is generated on, i.e. possibly before all previous
descriptors have been transmitted and written back).
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-07-15 03:56:55 +07:00
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-06-02 01:51:22 +07:00
|
|
|
int nr_frags = skb_shinfo(skb)->nr_frags;
|
2008-06-01 05:48:39 +07:00
|
|
|
int tx_index;
|
2008-06-01 07:10:27 +07:00
|
|
|
struct tx_desc *desc;
|
2008-06-01 05:48:39 +07:00
|
|
|
u32 cmd_sts;
|
2008-09-19 09:05:00 +07:00
|
|
|
u16 l4i_chk;
|
2008-06-01 05:48:39 +07:00
|
|
|
int length;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 07:10:27 +07:00
|
|
|
cmd_sts = TX_FIRST_DESC | GEN_CRC | BUFFER_OWNED_BY_DMA;
|
2008-09-19 09:05:00 +07:00
|
|
|
l4i_chk = 0;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
|
|
|
if (skb->ip_summed == CHECKSUM_PARTIAL) {
|
2008-09-19 09:05:00 +07:00
|
|
|
int tag_bytes;
|
2008-07-24 11:22:59 +07:00
|
|
|
|
|
|
|
BUG_ON(skb->protocol != htons(ETH_P_IP) &&
|
|
|
|
skb->protocol != htons(ETH_P_8021Q));
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-09-19 09:05:00 +07:00
|
|
|
tag_bytes = (void *)ip_hdr(skb) - (void *)skb->data - ETH_HLEN;
|
|
|
|
if (unlikely(tag_bytes & ~12)) {
|
|
|
|
if (skb_checksum_help(skb) == 0)
|
|
|
|
goto no_csum;
|
|
|
|
kfree_skb(skb);
|
|
|
|
return 1;
|
|
|
|
}
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-09-19 09:05:00 +07:00
|
|
|
if (tag_bytes & 4)
|
2008-07-24 11:22:59 +07:00
|
|
|
cmd_sts |= MAC_HDR_EXTRA_4_BYTES;
|
2008-09-19 09:05:00 +07:00
|
|
|
if (tag_bytes & 8)
|
2008-07-24 11:22:59 +07:00
|
|
|
cmd_sts |= MAC_HDR_EXTRA_8_BYTES;
|
2008-09-19 09:05:00 +07:00
|
|
|
|
|
|
|
cmd_sts |= GEN_TCP_UDP_CHECKSUM |
|
|
|
|
GEN_IP_V4_CHECKSUM |
|
|
|
|
ip_hdr(skb)->ihl << TX_IHL_SHIFT;
|
2008-07-24 11:22:59 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
switch (ip_hdr(skb)->protocol) {
|
|
|
|
case IPPROTO_UDP:
|
2008-06-01 07:10:27 +07:00
|
|
|
cmd_sts |= UDP_FRAME;
|
2008-09-19 09:05:00 +07:00
|
|
|
l4i_chk = ntohs(sum16_as_be(udp_hdr(skb)->check));
|
2008-06-01 05:48:39 +07:00
|
|
|
break;
|
|
|
|
case IPPROTO_TCP:
|
2008-09-19 09:05:00 +07:00
|
|
|
l4i_chk = ntohs(sum16_as_be(tcp_hdr(skb)->check));
|
2008-06-01 05:48:39 +07:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
|
|
|
} else {
|
2008-09-19 09:05:00 +07:00
|
|
|
no_csum:
|
2008-06-01 05:48:39 +07:00
|
|
|
/* Errata BTS #50, IHL must be 5 if no HW checksum */
|
2008-06-01 07:10:27 +07:00
|
|
|
cmd_sts |= 5 << TX_IHL_SHIFT;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
|
|
|
|
2008-11-20 18:58:09 +07:00
|
|
|
tx_index = txq->tx_curr_desc++;
|
|
|
|
if (txq->tx_curr_desc == txq->tx_ring_size)
|
|
|
|
txq->tx_curr_desc = 0;
|
2008-09-19 09:05:00 +07:00
|
|
|
desc = &txq->tx_desc_area[tx_index];
|
|
|
|
|
|
|
|
if (nr_frags) {
|
|
|
|
txq_submit_frag_skb(txq, skb);
|
|
|
|
length = skb_headlen(skb);
|
|
|
|
} else {
|
|
|
|
cmd_sts |= ZERO_PADDING | TX_LAST_DESC | TX_ENABLE_INTERRUPT;
|
|
|
|
length = skb->len;
|
|
|
|
}
|
|
|
|
|
|
|
|
desc->l4i_chk = l4i_chk;
|
|
|
|
desc->byte_cnt = length;
|
2009-05-18 11:16:47 +07:00
|
|
|
desc->buf_ptr = dma_map_single(mp->dev->dev.parent, skb->data,
|
|
|
|
length, DMA_TO_DEVICE);
|
2008-09-19 09:05:00 +07:00
|
|
|
|
2008-08-28 10:53:18 +07:00
|
|
|
__skb_queue_tail(&txq->tx_skb, skb);
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* ensure all other descriptors are written before first cmd_sts */
|
|
|
|
wmb();
|
|
|
|
desc->cmd_sts = cmd_sts;
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
/* clear TX_END status */
|
|
|
|
mp->work_tx_end &= ~(1 << txq->index);
|
mv643xx_eth: fix TX hang erratum workaround
The previously merged TX hang erratum workaround ("mv643xx_eth:
work around TX hang hardware issue") assumes that TX_END interrupts
are delivered simultaneously with or after their corresponding TX
interrupts, but this is not always true in practise.
In particular, it appears that TX_END interrupts are issued as soon
as descriptor fetch returns an invalid descriptor, which may happen
before earlier descriptors have been fully transmitted and written
back to memory as being done.
This hardware behavior can lead to a situation where the current
driver code mistakenly assumes that the MAC has given up transmitting
before noticing the packets that it is in fact still currently working
on, causing the driver to re-kick the transmit queue, which will only
cause the MAC to re-fetch the invalid head descriptor, and generate
another TX_END interrupt, et cetera, until the packets in the pipe
finally finish transmitting and have their descriptors written back
to memory, which will then finally break the loop.
Fix this by having the erratum workaround not check the 'number of
unfinished descriptor', but instead, to compare the software's idea
of what the head descriptor pointer should be to the hardware's head
descriptor pointer (which is updated on the same conditions as the
TX_END interupt is generated on, i.e. possibly before all previous
descriptors have been transmitted and written back).
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-07-15 03:56:55 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* ensure all descriptors are written before poking hardware */
|
|
|
|
wmb();
|
2008-06-02 01:51:22 +07:00
|
|
|
txq_enable(txq);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
txq->tx_desc_count += nr_frags + 1;
|
2008-09-19 09:05:00 +07:00
|
|
|
|
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2009-11-30 08:04:31 +07:00
|
|
|
static netdev_tx_t mv643xx_eth_xmit(struct sk_buff *skb, struct net_device *dev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
2008-08-28 11:26:23 +07:00
|
|
|
int queue;
|
2008-06-02 01:51:22 +07:00
|
|
|
struct tx_queue *txq;
|
2008-08-28 11:26:23 +07:00
|
|
|
struct netdev_queue *nq;
|
2008-03-19 01:36:08 +07:00
|
|
|
|
2008-08-28 13:26:28 +07:00
|
|
|
queue = skb_get_queue_mapping(skb);
|
|
|
|
txq = mp->txq + queue;
|
|
|
|
nq = netdev_get_tx_queue(dev, queue);
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
if (has_tiny_unaligned_frags(skb) && __skb_linearize(skb)) {
|
2008-08-28 13:26:28 +07:00
|
|
|
txq->tx_dropped++;
|
2008-06-02 05:28:40 +07:00
|
|
|
dev_printk(KERN_DEBUG, &dev->dev,
|
|
|
|
"failed to linearize skb with tiny "
|
|
|
|
"unaligned fragment\n");
|
2008-06-01 05:48:39 +07:00
|
|
|
return NETDEV_TX_BUSY;
|
|
|
|
}
|
|
|
|
|
2008-08-24 10:33:55 +07:00
|
|
|
if (txq->tx_ring_size - txq->tx_desc_count < MAX_SKB_FRAGS + 1) {
|
2008-08-28 11:26:23 +07:00
|
|
|
if (net_ratelimit())
|
|
|
|
dev_printk(KERN_ERR, &dev->dev, "tx queue full?!\n");
|
2008-06-02 06:28:22 +07:00
|
|
|
kfree_skb(skb);
|
|
|
|
return NETDEV_TX_OK;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
|
|
|
|
2008-09-19 09:05:00 +07:00
|
|
|
if (!txq_submit_skb(txq, skb)) {
|
|
|
|
int entries_left;
|
|
|
|
|
|
|
|
txq->tx_bytes += skb->len;
|
|
|
|
txq->tx_packets++;
|
|
|
|
dev->trans_start = jiffies;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-09-19 09:05:00 +07:00
|
|
|
entries_left = txq->tx_ring_size - txq->tx_desc_count;
|
|
|
|
if (entries_left < MAX_SKB_FRAGS + 1)
|
|
|
|
netif_tx_stop_queue(nq);
|
|
|
|
}
|
2008-06-01 05:48:39 +07:00
|
|
|
|
|
|
|
return NETDEV_TX_OK;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
/* tx napi ******************************************************************/
|
|
|
|
static void txq_kick(struct tx_queue *txq)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-08-28 13:26:28 +07:00
|
|
|
struct netdev_queue *nq = netdev_get_tx_queue(mp->dev, txq->index);
|
2008-08-28 13:09:10 +07:00
|
|
|
u32 hw_desc_ptr;
|
|
|
|
u32 expected_ptr;
|
|
|
|
|
2008-08-28 13:26:28 +07:00
|
|
|
__netif_tx_lock(nq, smp_processor_id());
|
2008-08-28 13:09:10 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
if (rdlp(mp, TXQ_COMMAND) & (1 << txq->index))
|
2008-08-28 13:09:10 +07:00
|
|
|
goto out;
|
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
hw_desc_ptr = rdlp(mp, TXQ_CURRENT_DESC_PTR(txq->index));
|
2008-08-28 13:09:10 +07:00
|
|
|
expected_ptr = (u32)txq->tx_desc_dma +
|
|
|
|
txq->tx_curr_desc * sizeof(struct tx_desc);
|
|
|
|
|
|
|
|
if (hw_desc_ptr != expected_ptr)
|
|
|
|
txq_enable(txq);
|
|
|
|
|
|
|
|
out:
|
2008-08-28 13:26:28 +07:00
|
|
|
__netif_tx_unlock(nq);
|
2008-08-28 13:09:10 +07:00
|
|
|
|
|
|
|
mp->work_tx_end &= ~(1 << txq->index);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int txq_reclaim(struct tx_queue *txq, int budget, int force)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-08-28 13:26:28 +07:00
|
|
|
struct netdev_queue *nq = netdev_get_tx_queue(mp->dev, txq->index);
|
2008-08-28 13:09:10 +07:00
|
|
|
int reclaimed;
|
|
|
|
|
2008-08-28 13:26:28 +07:00
|
|
|
__netif_tx_lock(nq, smp_processor_id());
|
2008-08-28 13:09:10 +07:00
|
|
|
|
|
|
|
reclaimed = 0;
|
|
|
|
while (reclaimed < budget && txq->tx_desc_count > 0) {
|
|
|
|
int tx_index;
|
|
|
|
struct tx_desc *desc;
|
|
|
|
u32 cmd_sts;
|
|
|
|
struct sk_buff *skb;
|
|
|
|
|
|
|
|
tx_index = txq->tx_used_desc;
|
|
|
|
desc = &txq->tx_desc_area[tx_index];
|
|
|
|
cmd_sts = desc->cmd_sts;
|
|
|
|
|
|
|
|
if (cmd_sts & BUFFER_OWNED_BY_DMA) {
|
|
|
|
if (!force)
|
|
|
|
break;
|
|
|
|
desc->cmd_sts = cmd_sts & ~BUFFER_OWNED_BY_DMA;
|
|
|
|
}
|
|
|
|
|
|
|
|
txq->tx_used_desc = tx_index + 1;
|
|
|
|
if (txq->tx_used_desc == txq->tx_ring_size)
|
|
|
|
txq->tx_used_desc = 0;
|
|
|
|
|
|
|
|
reclaimed++;
|
|
|
|
txq->tx_desc_count--;
|
|
|
|
|
2008-08-28 10:53:18 +07:00
|
|
|
skb = NULL;
|
|
|
|
if (cmd_sts & TX_LAST_DESC)
|
|
|
|
skb = __skb_dequeue(&txq->tx_skb);
|
2008-08-28 13:09:10 +07:00
|
|
|
|
|
|
|
if (cmd_sts & ERROR_SUMMARY) {
|
|
|
|
dev_printk(KERN_INFO, &mp->dev->dev, "tx error\n");
|
|
|
|
mp->dev->stats.tx_errors++;
|
|
|
|
}
|
|
|
|
|
2008-09-13 09:16:15 +07:00
|
|
|
if (cmd_sts & TX_FIRST_DESC) {
|
2009-05-18 11:16:47 +07:00
|
|
|
dma_unmap_single(mp->dev->dev.parent, desc->buf_ptr,
|
2008-09-13 09:16:15 +07:00
|
|
|
desc->byte_cnt, DMA_TO_DEVICE);
|
|
|
|
} else {
|
2009-05-18 11:16:47 +07:00
|
|
|
dma_unmap_page(mp->dev->dev.parent, desc->buf_ptr,
|
2008-09-13 09:16:15 +07:00
|
|
|
desc->byte_cnt, DMA_TO_DEVICE);
|
|
|
|
}
|
2008-08-28 13:09:10 +07:00
|
|
|
|
2008-10-01 16:33:57 +07:00
|
|
|
if (skb != NULL) {
|
|
|
|
if (skb_queue_len(&mp->rx_recycle) <
|
2009-02-12 21:07:37 +07:00
|
|
|
mp->rx_ring_size &&
|
2009-05-06 10:01:22 +07:00
|
|
|
skb_recycle_check(skb, mp->skb_size))
|
2008-10-01 16:33:57 +07:00
|
|
|
__skb_queue_head(&mp->rx_recycle, skb);
|
|
|
|
else
|
|
|
|
dev_kfree_skb(skb);
|
|
|
|
}
|
2008-08-28 13:09:10 +07:00
|
|
|
}
|
|
|
|
|
2008-08-28 13:26:28 +07:00
|
|
|
__netif_tx_unlock(nq);
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
if (reclaimed < budget)
|
|
|
|
mp->work_tx &= ~(1 << txq->index);
|
|
|
|
|
|
|
|
return reclaimed;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-06-02 05:51:05 +07:00
|
|
|
/* tx rate control **********************************************************/
|
|
|
|
/*
|
|
|
|
* Set total maximum TX rate (shared by all TX queues for this port)
|
|
|
|
* to 'rate' bits per second, with a maximum burst of 'burst' bytes.
|
|
|
|
*/
|
|
|
|
static void tx_set_rate(struct mv643xx_eth_private *mp, int rate, int burst)
|
|
|
|
{
|
|
|
|
int token_rate;
|
|
|
|
int mtu;
|
|
|
|
int bucket_size;
|
|
|
|
|
|
|
|
token_rate = ((rate / 1000) * 64) / (mp->shared->t_clk / 1000);
|
|
|
|
if (token_rate > 1023)
|
|
|
|
token_rate = 1023;
|
|
|
|
|
|
|
|
mtu = (mp->dev->mtu + 255) >> 8;
|
|
|
|
if (mtu > 63)
|
|
|
|
mtu = 63;
|
|
|
|
|
|
|
|
bucket_size = (burst + 255) >> 8;
|
|
|
|
if (bucket_size > 65535)
|
|
|
|
bucket_size = 65535;
|
|
|
|
|
2008-09-04 17:22:34 +07:00
|
|
|
switch (mp->shared->tx_bw_control) {
|
|
|
|
case TX_BW_CONTROL_OLD_LAYOUT:
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, TX_BW_RATE, token_rate);
|
|
|
|
wrlp(mp, TX_BW_MTU, mtu);
|
|
|
|
wrlp(mp, TX_BW_BURST, bucket_size);
|
2008-09-04 17:22:34 +07:00
|
|
|
break;
|
|
|
|
case TX_BW_CONTROL_NEW_LAYOUT:
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, TX_BW_RATE_MOVED, token_rate);
|
|
|
|
wrlp(mp, TX_BW_MTU_MOVED, mtu);
|
|
|
|
wrlp(mp, TX_BW_BURST_MOVED, bucket_size);
|
2008-09-04 17:22:34 +07:00
|
|
|
break;
|
2008-06-02 06:57:36 +07:00
|
|
|
}
|
2008-06-02 05:51:05 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void txq_set_rate(struct tx_queue *txq, int rate, int burst)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
|
|
|
int token_rate;
|
|
|
|
int bucket_size;
|
|
|
|
|
|
|
|
token_rate = ((rate / 1000) * 64) / (mp->shared->t_clk / 1000);
|
|
|
|
if (token_rate > 1023)
|
|
|
|
token_rate = 1023;
|
|
|
|
|
|
|
|
bucket_size = (burst + 255) >> 8;
|
|
|
|
if (bucket_size > 65535)
|
|
|
|
bucket_size = 65535;
|
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, TXQ_BW_TOKENS(txq->index), token_rate << 14);
|
|
|
|
wrlp(mp, TXQ_BW_CONF(txq->index), (bucket_size << 10) | token_rate);
|
2008-06-02 05:51:05 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void txq_set_fixed_prio_mode(struct tx_queue *txq)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
|
|
|
int off;
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Turn on fixed priority mode.
|
|
|
|
*/
|
2008-09-04 17:22:34 +07:00
|
|
|
off = 0;
|
|
|
|
switch (mp->shared->tx_bw_control) {
|
|
|
|
case TX_BW_CONTROL_OLD_LAYOUT:
|
2008-11-20 18:57:36 +07:00
|
|
|
off = TXQ_FIX_PRIO_CONF;
|
2008-09-04 17:22:34 +07:00
|
|
|
break;
|
|
|
|
case TX_BW_CONTROL_NEW_LAYOUT:
|
2008-11-20 18:57:36 +07:00
|
|
|
off = TXQ_FIX_PRIO_CONF_MOVED;
|
2008-09-04 17:22:34 +07:00
|
|
|
break;
|
|
|
|
}
|
2008-06-02 05:51:05 +07:00
|
|
|
|
2008-09-04 17:22:34 +07:00
|
|
|
if (off) {
|
2008-11-20 18:57:36 +07:00
|
|
|
val = rdlp(mp, off);
|
2008-09-04 17:22:34 +07:00
|
|
|
val |= 1 << txq->index;
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, off, val);
|
2008-09-04 17:22:34 +07:00
|
|
|
}
|
2008-06-02 05:51:05 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* mii management interface *************************************************/
|
2008-08-26 09:42:59 +07:00
|
|
|
static irqreturn_t mv643xx_eth_err_irq(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_shared_private *msp = dev_id;
|
|
|
|
|
|
|
|
if (readl(msp->base + ERR_INT_CAUSE) & ERR_INT_SMI_DONE) {
|
|
|
|
writel(~ERR_INT_SMI_DONE, msp->base + ERR_INT_CAUSE);
|
|
|
|
wake_up(&msp->smi_busy_wait);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return IRQ_NONE;
|
|
|
|
}
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-26 09:42:59 +07:00
|
|
|
static int smi_is_done(struct mv643xx_eth_shared_private *msp)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-08-26 09:42:59 +07:00
|
|
|
return !(readl(msp->base + SMI_REG) & SMI_BUSY);
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 09:42:59 +07:00
|
|
|
static int smi_wait_ready(struct mv643xx_eth_shared_private *msp)
|
|
|
|
{
|
|
|
|
if (msp->err_interrupt == NO_IRQ) {
|
|
|
|
int i;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-26 09:42:59 +07:00
|
|
|
for (i = 0; !smi_is_done(msp); i++) {
|
|
|
|
if (i == 10)
|
|
|
|
return -ETIMEDOUT;
|
|
|
|
msleep(10);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2008-08-26 09:42:59 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-11-01 12:32:20 +07:00
|
|
|
if (!smi_is_done(msp)) {
|
|
|
|
wait_event_timeout(msp->smi_busy_wait, smi_is_done(msp),
|
|
|
|
msecs_to_jiffies(100));
|
|
|
|
if (!smi_is_done(msp))
|
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
2008-08-26 09:42:59 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
static int smi_bus_read(struct mii_bus *bus, int addr, int reg)
|
2008-08-26 09:42:59 +07:00
|
|
|
{
|
2008-08-26 18:34:19 +07:00
|
|
|
struct mv643xx_eth_shared_private *msp = bus->priv;
|
2008-08-26 09:42:59 +07:00
|
|
|
void __iomem *smi_reg = msp->base + SMI_REG;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (smi_wait_ready(msp)) {
|
2008-11-20 18:57:16 +07:00
|
|
|
printk(KERN_WARNING "mv643xx_eth: SMI bus busy timeout\n");
|
2008-08-26 18:34:19 +07:00
|
|
|
return -ETIMEDOUT;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
writel(SMI_OPCODE_READ | (reg << 21) | (addr << 16), smi_reg);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 09:42:59 +07:00
|
|
|
if (smi_wait_ready(msp)) {
|
2008-11-20 18:57:16 +07:00
|
|
|
printk(KERN_WARNING "mv643xx_eth: SMI bus busy timeout\n");
|
2008-08-26 18:34:19 +07:00
|
|
|
return -ETIMEDOUT;
|
2008-08-26 09:42:59 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = readl(smi_reg);
|
|
|
|
if (!(ret & SMI_READ_VALID)) {
|
2008-11-20 18:57:16 +07:00
|
|
|
printk(KERN_WARNING "mv643xx_eth: SMI bus read not valid\n");
|
2008-08-26 18:34:19 +07:00
|
|
|
return -ENODEV;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
return ret & 0xffff;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
static int smi_bus_write(struct mii_bus *bus, int addr, int reg, u16 val)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-08-26 18:34:19 +07:00
|
|
|
struct mv643xx_eth_shared_private *msp = bus->priv;
|
2008-08-26 09:42:59 +07:00
|
|
|
void __iomem *smi_reg = msp->base + SMI_REG;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 09:42:59 +07:00
|
|
|
if (smi_wait_ready(msp)) {
|
2008-11-20 18:57:16 +07:00
|
|
|
printk(KERN_WARNING "mv643xx_eth: SMI bus busy timeout\n");
|
2008-08-26 09:42:59 +07:00
|
|
|
return -ETIMEDOUT;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
writel(SMI_OPCODE_WRITE | (reg << 21) |
|
2008-08-26 18:34:19 +07:00
|
|
|
(addr << 16) | (val & 0xffff), smi_reg);
|
2008-08-26 09:42:59 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
if (smi_wait_ready(msp)) {
|
2008-11-20 18:57:16 +07:00
|
|
|
printk(KERN_WARNING "mv643xx_eth: SMI bus busy timeout\n");
|
2008-08-26 18:34:19 +07:00
|
|
|
return -ETIMEDOUT;
|
|
|
|
}
|
2008-08-26 09:42:59 +07:00
|
|
|
|
|
|
|
return 0;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-28 13:26:28 +07:00
|
|
|
/* statistics ***************************************************************/
|
|
|
|
static struct net_device_stats *mv643xx_eth_get_stats(struct net_device *dev)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
|
|
|
struct net_device_stats *stats = &dev->stats;
|
|
|
|
unsigned long tx_packets = 0;
|
|
|
|
unsigned long tx_bytes = 0;
|
|
|
|
unsigned long tx_dropped = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < mp->txq_count; i++) {
|
|
|
|
struct tx_queue *txq = mp->txq + i;
|
|
|
|
|
|
|
|
tx_packets += txq->tx_packets;
|
|
|
|
tx_bytes += txq->tx_bytes;
|
|
|
|
tx_dropped += txq->tx_dropped;
|
|
|
|
}
|
|
|
|
|
|
|
|
stats->tx_packets = tx_packets;
|
|
|
|
stats->tx_bytes = tx_bytes;
|
|
|
|
stats->tx_dropped = tx_dropped;
|
|
|
|
|
|
|
|
return stats;
|
|
|
|
}
|
|
|
|
|
2009-02-12 21:08:39 +07:00
|
|
|
static void mv643xx_eth_grab_lro_stats(struct mv643xx_eth_private *mp)
|
|
|
|
{
|
|
|
|
u32 lro_aggregated = 0;
|
|
|
|
u32 lro_flushed = 0;
|
|
|
|
u32 lro_no_desc = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < mp->rxq_count; i++) {
|
|
|
|
struct rx_queue *rxq = mp->rxq + i;
|
|
|
|
|
|
|
|
lro_aggregated += rxq->lro_mgr.stats.aggregated;
|
|
|
|
lro_flushed += rxq->lro_mgr.stats.flushed;
|
|
|
|
lro_no_desc += rxq->lro_mgr.stats.no_desc;
|
|
|
|
}
|
|
|
|
|
|
|
|
mp->lro_counters.lro_aggregated = lro_aggregated;
|
|
|
|
mp->lro_counters.lro_flushed = lro_flushed;
|
|
|
|
mp->lro_counters.lro_no_desc = lro_no_desc;
|
|
|
|
}
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
static inline u32 mib_read(struct mv643xx_eth_private *mp, int offset)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
return rdl(mp, MIB_COUNTERS(mp->port_num) + offset);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
static void mib_counters_clear(struct mv643xx_eth_private *mp)
|
2006-01-27 15:15:30 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 0x80; i += 4)
|
|
|
|
mib_read(mp, i);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2006-01-27 15:15:30 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
static void mib_counters_update(struct mv643xx_eth_private *mp)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mib_counters *p = &mp->mib_counters;
|
2008-06-01 06:29:58 +07:00
|
|
|
|
2009-02-16 18:28:15 +07:00
|
|
|
spin_lock_bh(&mp->mib_counters_lock);
|
2008-06-02 05:28:40 +07:00
|
|
|
p->good_octets_received += mib_read(mp, 0x00);
|
|
|
|
p->bad_octets_received += mib_read(mp, 0x08);
|
|
|
|
p->internal_mac_transmit_err += mib_read(mp, 0x0c);
|
|
|
|
p->good_frames_received += mib_read(mp, 0x10);
|
|
|
|
p->bad_frames_received += mib_read(mp, 0x14);
|
|
|
|
p->broadcast_frames_received += mib_read(mp, 0x18);
|
|
|
|
p->multicast_frames_received += mib_read(mp, 0x1c);
|
|
|
|
p->frames_64_octets += mib_read(mp, 0x20);
|
|
|
|
p->frames_65_to_127_octets += mib_read(mp, 0x24);
|
|
|
|
p->frames_128_to_255_octets += mib_read(mp, 0x28);
|
|
|
|
p->frames_256_to_511_octets += mib_read(mp, 0x2c);
|
|
|
|
p->frames_512_to_1023_octets += mib_read(mp, 0x30);
|
|
|
|
p->frames_1024_to_max_octets += mib_read(mp, 0x34);
|
|
|
|
p->good_octets_sent += mib_read(mp, 0x38);
|
|
|
|
p->good_frames_sent += mib_read(mp, 0x40);
|
|
|
|
p->excessive_collision += mib_read(mp, 0x44);
|
|
|
|
p->multicast_frames_sent += mib_read(mp, 0x48);
|
|
|
|
p->broadcast_frames_sent += mib_read(mp, 0x4c);
|
|
|
|
p->unrec_mac_control_received += mib_read(mp, 0x50);
|
|
|
|
p->fc_sent += mib_read(mp, 0x54);
|
|
|
|
p->good_fc_received += mib_read(mp, 0x58);
|
|
|
|
p->bad_fc_received += mib_read(mp, 0x5c);
|
|
|
|
p->undersize_received += mib_read(mp, 0x60);
|
|
|
|
p->fragments_received += mib_read(mp, 0x64);
|
|
|
|
p->oversize_received += mib_read(mp, 0x68);
|
|
|
|
p->jabber_received += mib_read(mp, 0x6c);
|
|
|
|
p->mac_receive_error += mib_read(mp, 0x70);
|
|
|
|
p->bad_crc_event += mib_read(mp, 0x74);
|
|
|
|
p->collision += mib_read(mp, 0x78);
|
|
|
|
p->late_collision += mib_read(mp, 0x7c);
|
2009-02-16 18:28:15 +07:00
|
|
|
spin_unlock_bh(&mp->mib_counters_lock);
|
2008-09-19 10:04:57 +07:00
|
|
|
|
|
|
|
mod_timer(&mp->mib_counters_timer, jiffies + 30 * HZ);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mib_counters_timer_wrapper(unsigned long _mp)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = (void *)_mp;
|
|
|
|
|
|
|
|
mib_counters_update(mp);
|
2006-01-27 15:15:30 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2009-02-12 21:07:09 +07:00
|
|
|
/* interrupt coalescing *****************************************************/
|
|
|
|
/*
|
|
|
|
* Hardware coalescing parameters are set in units of 64 t_clk
|
|
|
|
* cycles. I.e.:
|
|
|
|
*
|
|
|
|
* coal_delay_in_usec = 64000000 * register_value / t_clk_rate
|
|
|
|
*
|
|
|
|
* register_value = coal_delay_in_usec * t_clk_rate / 64000000
|
|
|
|
*
|
|
|
|
* In the ->set*() methods, we round the computed register value
|
|
|
|
* to the nearest integer.
|
|
|
|
*/
|
|
|
|
static unsigned int get_rx_coal(struct mv643xx_eth_private *mp)
|
|
|
|
{
|
|
|
|
u32 val = rdlp(mp, SDMA_CONFIG);
|
|
|
|
u64 temp;
|
|
|
|
|
|
|
|
if (mp->shared->extended_rx_coal_limit)
|
|
|
|
temp = ((val & 0x02000000) >> 10) | ((val & 0x003fff80) >> 7);
|
|
|
|
else
|
|
|
|
temp = (val & 0x003fff00) >> 8;
|
|
|
|
|
|
|
|
temp *= 64000000;
|
|
|
|
do_div(temp, mp->shared->t_clk);
|
|
|
|
|
|
|
|
return (unsigned int)temp;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void set_rx_coal(struct mv643xx_eth_private *mp, unsigned int usec)
|
|
|
|
{
|
|
|
|
u64 temp;
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
temp = (u64)usec * mp->shared->t_clk;
|
|
|
|
temp += 31999999;
|
|
|
|
do_div(temp, 64000000);
|
|
|
|
|
|
|
|
val = rdlp(mp, SDMA_CONFIG);
|
|
|
|
if (mp->shared->extended_rx_coal_limit) {
|
|
|
|
if (temp > 0xffff)
|
|
|
|
temp = 0xffff;
|
|
|
|
val &= ~0x023fff80;
|
|
|
|
val |= (temp & 0x8000) << 10;
|
|
|
|
val |= (temp & 0x7fff) << 7;
|
|
|
|
} else {
|
|
|
|
if (temp > 0x3fff)
|
|
|
|
temp = 0x3fff;
|
|
|
|
val &= ~0x003fff00;
|
|
|
|
val |= (temp & 0x3fff) << 8;
|
|
|
|
}
|
|
|
|
wrlp(mp, SDMA_CONFIG, val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned int get_tx_coal(struct mv643xx_eth_private *mp)
|
|
|
|
{
|
|
|
|
u64 temp;
|
|
|
|
|
|
|
|
temp = (rdlp(mp, TX_FIFO_URGENT_THRESHOLD) & 0x3fff0) >> 4;
|
|
|
|
temp *= 64000000;
|
|
|
|
do_div(temp, mp->shared->t_clk);
|
|
|
|
|
|
|
|
return (unsigned int)temp;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void set_tx_coal(struct mv643xx_eth_private *mp, unsigned int usec)
|
|
|
|
{
|
|
|
|
u64 temp;
|
|
|
|
|
|
|
|
temp = (u64)usec * mp->shared->t_clk;
|
|
|
|
temp += 31999999;
|
|
|
|
do_div(temp, 64000000);
|
|
|
|
|
|
|
|
if (temp > 0x3fff)
|
|
|
|
temp = 0x3fff;
|
|
|
|
|
|
|
|
wrlp(mp, TX_FIFO_URGENT_THRESHOLD, temp << 4);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* ethtool ******************************************************************/
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_stats {
|
2008-06-01 05:48:39 +07:00
|
|
|
char stat_string[ETH_GSTRING_LEN];
|
|
|
|
int sizeof_stat;
|
2008-06-01 16:40:29 +07:00
|
|
|
int netdev_off;
|
|
|
|
int mp_off;
|
2008-06-01 05:48:39 +07:00
|
|
|
};
|
|
|
|
|
2008-06-01 16:40:29 +07:00
|
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#define SSTAT(m) \
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{ #m, FIELD_SIZEOF(struct net_device_stats, m), \
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offsetof(struct net_device, stats.m), -1 }
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#define MIBSTAT(m) \
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{ #m, FIELD_SIZEOF(struct mib_counters, m), \
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-1, offsetof(struct mv643xx_eth_private, mib_counters.m) }
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2009-02-12 21:08:39 +07:00
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#define LROSTAT(m) \
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{ #m, FIELD_SIZEOF(struct lro_counters, m), \
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-1, offsetof(struct mv643xx_eth_private, lro_counters.m) }
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2008-06-01 16:40:29 +07:00
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static const struct mv643xx_eth_stats mv643xx_eth_stats[] = {
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SSTAT(rx_packets),
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SSTAT(tx_packets),
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SSTAT(rx_bytes),
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SSTAT(tx_bytes),
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SSTAT(rx_errors),
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SSTAT(tx_errors),
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SSTAT(rx_dropped),
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SSTAT(tx_dropped),
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MIBSTAT(good_octets_received),
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MIBSTAT(bad_octets_received),
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MIBSTAT(internal_mac_transmit_err),
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MIBSTAT(good_frames_received),
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MIBSTAT(bad_frames_received),
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MIBSTAT(broadcast_frames_received),
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MIBSTAT(multicast_frames_received),
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MIBSTAT(frames_64_octets),
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MIBSTAT(frames_65_to_127_octets),
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MIBSTAT(frames_128_to_255_octets),
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MIBSTAT(frames_256_to_511_octets),
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MIBSTAT(frames_512_to_1023_octets),
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MIBSTAT(frames_1024_to_max_octets),
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MIBSTAT(good_octets_sent),
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MIBSTAT(good_frames_sent),
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MIBSTAT(excessive_collision),
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MIBSTAT(multicast_frames_sent),
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MIBSTAT(broadcast_frames_sent),
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MIBSTAT(unrec_mac_control_received),
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MIBSTAT(fc_sent),
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MIBSTAT(good_fc_received),
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MIBSTAT(bad_fc_received),
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MIBSTAT(undersize_received),
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MIBSTAT(fragments_received),
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MIBSTAT(oversize_received),
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MIBSTAT(jabber_received),
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MIBSTAT(mac_receive_error),
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MIBSTAT(bad_crc_event),
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MIBSTAT(collision),
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MIBSTAT(late_collision),
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2009-02-12 21:08:39 +07:00
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LROSTAT(lro_aggregated),
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LROSTAT(lro_flushed),
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LROSTAT(lro_no_desc),
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2008-06-01 05:48:39 +07:00
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};
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2008-11-20 18:57:16 +07:00
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static int
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2009-02-12 21:06:46 +07:00
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mv643xx_eth_get_settings_phy(struct mv643xx_eth_private *mp,
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struct ethtool_cmd *cmd)
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2006-01-27 15:15:30 +07:00
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{
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int err;
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2008-08-26 18:34:19 +07:00
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err = phy_read_status(mp->phy);
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if (err == 0)
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err = phy_ethtool_gset(mp->phy, cmd);
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2006-01-27 15:15:30 +07:00
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2008-06-02 05:28:40 +07:00
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/*
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* The MAC does not support 1000baseT_Half.
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*/
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2006-01-27 15:15:30 +07:00
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cmd->supported &= ~SUPPORTED_1000baseT_Half;
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cmd->advertising &= ~ADVERTISED_1000baseT_Half;
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return err;
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}
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2008-11-20 18:57:16 +07:00
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static int
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2009-02-12 21:06:46 +07:00
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mv643xx_eth_get_settings_phyless(struct mv643xx_eth_private *mp,
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2008-11-20 18:57:16 +07:00
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struct ethtool_cmd *cmd)
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2008-06-02 07:13:03 +07:00
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{
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2008-07-14 19:29:40 +07:00
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u32 port_status;
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2008-11-20 18:57:36 +07:00
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port_status = rdlp(mp, PORT_STATUS);
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2008-07-14 19:29:40 +07:00
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2008-06-02 07:13:03 +07:00
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cmd->supported = SUPPORTED_MII;
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cmd->advertising = ADVERTISED_MII;
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2008-07-14 19:29:40 +07:00
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switch (port_status & PORT_SPEED_MASK) {
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case PORT_SPEED_10:
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cmd->speed = SPEED_10;
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break;
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case PORT_SPEED_100:
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cmd->speed = SPEED_100;
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break;
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case PORT_SPEED_1000:
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cmd->speed = SPEED_1000;
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break;
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default:
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cmd->speed = -1;
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break;
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}
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cmd->duplex = (port_status & FULL_DUPLEX) ? DUPLEX_FULL : DUPLEX_HALF;
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2008-06-02 07:13:03 +07:00
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cmd->port = PORT_MII;
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cmd->phy_address = 0;
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cmd->transceiver = XCVR_INTERNAL;
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cmd->autoneg = AUTONEG_DISABLE;
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cmd->maxtxpkt = 1;
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cmd->maxrxpkt = 1;
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return 0;
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}
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2009-02-12 21:06:46 +07:00
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static int
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mv643xx_eth_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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if (mp->phy != NULL)
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return mv643xx_eth_get_settings_phy(mp, cmd);
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else
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return mv643xx_eth_get_settings_phyless(mp, cmd);
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}
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2008-11-20 18:57:16 +07:00
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static int
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mv643xx_eth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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2005-04-17 05:20:36 +07:00
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{
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2008-06-01 07:18:13 +07:00
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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2006-01-17 06:59:21 +07:00
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2009-02-12 21:06:46 +07:00
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if (mp->phy == NULL)
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return -EINVAL;
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2008-06-02 05:28:40 +07:00
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/*
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* The MAC does not support 1000baseT_Half.
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*/
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cmd->advertising &= ~ADVERTISED_1000baseT_Half;
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2008-08-26 18:34:19 +07:00
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return phy_ethtool_sset(mp->phy, cmd);
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2008-06-01 05:48:39 +07:00
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}
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2005-04-17 05:20:36 +07:00
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2008-06-02 05:28:40 +07:00
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static void mv643xx_eth_get_drvinfo(struct net_device *dev,
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struct ethtool_drvinfo *drvinfo)
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2008-06-01 05:48:39 +07:00
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{
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2008-06-01 07:18:13 +07:00
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strncpy(drvinfo->driver, mv643xx_eth_driver_name, 32);
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strncpy(drvinfo->version, mv643xx_eth_driver_version, 32);
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2008-06-01 05:48:39 +07:00
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strncpy(drvinfo->fw_version, "N/A", 32);
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2008-06-02 05:28:40 +07:00
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strncpy(drvinfo->bus_info, "platform", 32);
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2008-06-01 16:40:29 +07:00
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drvinfo->n_stats = ARRAY_SIZE(mv643xx_eth_stats);
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2008-06-01 05:48:39 +07:00
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}
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2005-04-17 05:20:36 +07:00
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2008-06-02 05:28:40 +07:00
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static int mv643xx_eth_nway_reset(struct net_device *dev)
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2008-06-01 05:48:39 +07:00
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{
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2008-06-01 07:18:13 +07:00
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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2005-04-17 05:20:36 +07:00
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2009-02-12 21:06:46 +07:00
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if (mp->phy == NULL)
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return -EINVAL;
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2005-04-17 05:20:36 +07:00
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2009-02-12 21:06:46 +07:00
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return genphy_restart_aneg(mp->phy);
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2008-06-02 07:13:03 +07:00
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}
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2008-06-01 05:48:39 +07:00
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static u32 mv643xx_eth_get_link(struct net_device *dev)
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{
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2008-08-26 18:34:19 +07:00
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return !!netif_carrier_ok(dev);
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2008-06-02 07:13:03 +07:00
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}
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2009-02-12 21:07:09 +07:00
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static int
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mv643xx_eth_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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ec->rx_coalesce_usecs = get_rx_coal(mp);
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ec->tx_coalesce_usecs = get_tx_coal(mp);
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return 0;
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}
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static int
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mv643xx_eth_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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set_rx_coal(mp, ec->rx_coalesce_usecs);
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set_tx_coal(mp, ec->tx_coalesce_usecs);
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return 0;
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}
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2009-02-12 21:07:37 +07:00
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static void
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mv643xx_eth_get_ringparam(struct net_device *dev, struct ethtool_ringparam *er)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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er->rx_max_pending = 4096;
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er->tx_max_pending = 4096;
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er->rx_mini_max_pending = 0;
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er->rx_jumbo_max_pending = 0;
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er->rx_pending = mp->rx_ring_size;
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er->tx_pending = mp->tx_ring_size;
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er->rx_mini_pending = 0;
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er->rx_jumbo_pending = 0;
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}
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static int
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mv643xx_eth_set_ringparam(struct net_device *dev, struct ethtool_ringparam *er)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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if (er->rx_mini_pending || er->rx_jumbo_pending)
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return -EINVAL;
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mp->rx_ring_size = er->rx_pending < 4096 ? er->rx_pending : 4096;
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mp->tx_ring_size = er->tx_pending < 4096 ? er->tx_pending : 4096;
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if (netif_running(dev)) {
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mv643xx_eth_stop(dev);
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if (mv643xx_eth_open(dev)) {
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dev_printk(KERN_ERR, &dev->dev,
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"fatal error on re-opening device after "
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"ring param change\n");
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return -ENOMEM;
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}
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}
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return 0;
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}
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|
2009-02-12 21:07:56 +07:00
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static u32
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mv643xx_eth_get_rx_csum(struct net_device *dev)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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return !!(rdlp(mp, PORT_CONFIG) & 0x02000000);
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}
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static int
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mv643xx_eth_set_rx_csum(struct net_device *dev, u32 rx_csum)
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{
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struct mv643xx_eth_private *mp = netdev_priv(dev);
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wrlp(mp, PORT_CONFIG, rx_csum ? 0x02000000 : 0x00000000);
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return 0;
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}
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2008-06-02 05:28:40 +07:00
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static void mv643xx_eth_get_strings(struct net_device *dev,
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uint32_t stringset, uint8_t *data)
|
2008-06-01 05:48:39 +07:00
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{
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int i;
|
2005-04-17 05:20:36 +07:00
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|
2008-06-02 05:28:40 +07:00
|
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|
if (stringset == ETH_SS_STATS) {
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for (i = 0; i < ARRAY_SIZE(mv643xx_eth_stats); i++) {
|
2008-06-01 05:48:39 +07:00
|
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memcpy(data + i * ETH_GSTRING_LEN,
|
2008-06-01 16:40:29 +07:00
|
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mv643xx_eth_stats[i].stat_string,
|
2008-06-01 07:18:13 +07:00
|
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ETH_GSTRING_LEN);
|
2008-06-01 05:48:39 +07:00
|
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}
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}
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}
|
2005-04-17 05:20:36 +07:00
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|
2008-06-02 05:28:40 +07:00
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static void mv643xx_eth_get_ethtool_stats(struct net_device *dev,
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|
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struct ethtool_stats *stats,
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|
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uint64_t *data)
|
2008-06-01 05:48:39 +07:00
|
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|
{
|
2008-08-24 10:59:16 +07:00
|
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|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
2008-06-01 05:48:39 +07:00
|
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int i;
|
2005-04-17 05:20:36 +07:00
|
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|
2008-08-28 13:26:28 +07:00
|
|
|
mv643xx_eth_get_stats(dev);
|
2008-06-02 05:28:40 +07:00
|
|
|
mib_counters_update(mp);
|
2009-02-12 21:08:39 +07:00
|
|
|
mv643xx_eth_grab_lro_stats(mp);
|
2005-04-17 05:20:36 +07:00
|
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|
|
2008-06-01 16:40:29 +07:00
|
|
|
for (i = 0; i < ARRAY_SIZE(mv643xx_eth_stats); i++) {
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|
|
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const struct mv643xx_eth_stats *stat;
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|
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void *p;
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|
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|
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stat = mv643xx_eth_stats + i;
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|
|
if (stat->netdev_off >= 0)
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|
|
|
p = ((void *)mp->dev) + stat->netdev_off;
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|
|
else
|
|
|
|
p = ((void *)mp) + stat->mp_off;
|
|
|
|
|
|
|
|
data[i] = (stat->sizeof_stat == 8) ?
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|
|
|
*(uint64_t *)p : *(uint32_t *)p;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
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|
2008-06-02 05:28:40 +07:00
|
|
|
static int mv643xx_eth_get_sset_count(struct net_device *dev, int sset)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
if (sset == ETH_SS_STATS)
|
2008-06-01 16:40:29 +07:00
|
|
|
return ARRAY_SIZE(mv643xx_eth_stats);
|
2008-06-02 05:28:40 +07:00
|
|
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|
|
|
|
return -EOPNOTSUPP;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static const struct ethtool_ops mv643xx_eth_ethtool_ops = {
|
2008-06-02 05:28:40 +07:00
|
|
|
.get_settings = mv643xx_eth_get_settings,
|
|
|
|
.set_settings = mv643xx_eth_set_settings,
|
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|
|
.get_drvinfo = mv643xx_eth_get_drvinfo,
|
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|
|
.nway_reset = mv643xx_eth_nway_reset,
|
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|
|
.get_link = mv643xx_eth_get_link,
|
2009-02-12 21:07:09 +07:00
|
|
|
.get_coalesce = mv643xx_eth_get_coalesce,
|
|
|
|
.set_coalesce = mv643xx_eth_set_coalesce,
|
2009-02-12 21:07:37 +07:00
|
|
|
.get_ringparam = mv643xx_eth_get_ringparam,
|
|
|
|
.set_ringparam = mv643xx_eth_set_ringparam,
|
2009-02-12 21:07:56 +07:00
|
|
|
.get_rx_csum = mv643xx_eth_get_rx_csum,
|
|
|
|
.set_rx_csum = mv643xx_eth_set_rx_csum,
|
2009-02-12 21:08:07 +07:00
|
|
|
.set_tx_csum = ethtool_op_set_tx_csum,
|
2008-06-01 05:48:39 +07:00
|
|
|
.set_sg = ethtool_op_set_sg,
|
2008-06-02 05:28:40 +07:00
|
|
|
.get_strings = mv643xx_eth_get_strings,
|
|
|
|
.get_ethtool_stats = mv643xx_eth_get_ethtool_stats,
|
2009-02-12 21:08:39 +07:00
|
|
|
.get_flags = ethtool_op_get_flags,
|
|
|
|
.set_flags = ethtool_op_set_flags,
|
2008-06-01 07:18:13 +07:00
|
|
|
.get_sset_count = mv643xx_eth_get_sset_count,
|
2008-06-01 05:48:39 +07:00
|
|
|
};
|
2005-04-17 05:20:36 +07:00
|
|
|
|
[NET]: Make NAPI polling independent of struct net_device objects.
Several devices have multiple independant RX queues per net
device, and some have a single interrupt doorbell for several
queues.
In either case, it's easier to support layouts like that if the
structure representing the poll is independant from the net
device itself.
The signature of the ->poll() call back goes from:
int foo_poll(struct net_device *dev, int *budget)
to
int foo_poll(struct napi_struct *napi, int budget)
The caller is returned the number of RX packets processed (or
the number of "NAPI credits" consumed if you want to get
abstract). The callee no longer messes around bumping
dev->quota, *budget, etc. because that is all handled in the
caller upon return.
The napi_struct is to be embedded in the device driver private data
structures.
Furthermore, it is the driver's responsibility to disable all NAPI
instances in it's ->stop() device close handler. Since the
napi_struct is privatized into the driver's private data structures,
only the driver knows how to get at all of the napi_struct instances
it may have per-device.
With lots of help and suggestions from Rusty Russell, Roland Dreier,
Michael Chan, Jeff Garzik, and Jamal Hadi Salim.
Bug fixes from Thomas Graf, Roland Dreier, Peter Zijlstra,
Joseph Fannin, Scott Wood, Hans J. Koch, and Michael Chan.
[ Ported to current tree and all drivers converted. Integrated
Stephen's follow-on kerneldoc additions, and restored poll_list
handling to the old style to fix mutual exclusion issues. -DaveM ]
Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2007-10-04 06:41:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* address handling *********************************************************/
|
2008-06-01 07:52:41 +07:00
|
|
|
static void uc_addr_get(struct mv643xx_eth_private *mp, unsigned char *addr)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
unsigned int mac_h = rdlp(mp, MAC_ADDR_HIGH);
|
|
|
|
unsigned int mac_l = rdlp(mp, MAC_ADDR_LOW);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 07:52:41 +07:00
|
|
|
addr[0] = (mac_h >> 24) & 0xff;
|
|
|
|
addr[1] = (mac_h >> 16) & 0xff;
|
|
|
|
addr[2] = (mac_h >> 8) & 0xff;
|
|
|
|
addr[3] = mac_h & 0xff;
|
|
|
|
addr[4] = (mac_l >> 8) & 0xff;
|
|
|
|
addr[5] = mac_l & 0xff;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
static void uc_addr_set(struct mv643xx_eth_private *mp, unsigned char *addr)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
wrlp(mp, MAC_ADDR_HIGH,
|
|
|
|
(addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]);
|
|
|
|
wrlp(mp, MAC_ADDR_LOW, (addr[4] << 8) | addr[5]);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2006-01-27 15:15:30 +07:00
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
static u32 uc_addr_filter_mask(struct net_device *dev)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2009-05-23 06:22:17 +07:00
|
|
|
struct netdev_hw_addr *ha;
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
u32 nibbles;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
if (dev->flags & IFF_PROMISC)
|
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
nibbles = 1 << (dev->dev_addr[5] & 0x0f);
|
2010-01-26 04:36:10 +07:00
|
|
|
netdev_for_each_uc_addr(ha, dev) {
|
2009-05-23 06:22:17 +07:00
|
|
|
if (memcmp(dev->dev_addr, ha->addr, 5))
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
return 0;
|
2009-05-23 06:22:17 +07:00
|
|
|
if ((dev->dev_addr[5] ^ ha->addr[5]) & 0xf0)
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
return 0;
|
2006-03-04 00:02:51 +07:00
|
|
|
|
2009-05-23 06:22:17 +07:00
|
|
|
nibbles |= 1 << (ha->addr[5] & 0x0f);
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
return nibbles;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
static void mv643xx_eth_program_unicast_filter(struct net_device *dev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
u32 port_config;
|
|
|
|
u32 nibbles;
|
|
|
|
int i;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 07:10:27 +07:00
|
|
|
uc_addr_set(mp, dev->dev_addr);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-06-18 18:35:02 +07:00
|
|
|
port_config = rdlp(mp, PORT_CONFIG) & ~UNICAST_PROMISCUOUS_MODE;
|
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
nibbles = uc_addr_filter_mask(dev);
|
|
|
|
if (!nibbles) {
|
|
|
|
port_config |= UNICAST_PROMISCUOUS_MODE;
|
2009-06-18 18:35:02 +07:00
|
|
|
nibbles = 0xffff;
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < 16; i += 4) {
|
|
|
|
int off = UNICAST_TABLE(mp->port_num) + i;
|
|
|
|
u32 v;
|
|
|
|
|
|
|
|
v = 0;
|
|
|
|
if (nibbles & 1)
|
|
|
|
v |= 0x00000001;
|
|
|
|
if (nibbles & 2)
|
|
|
|
v |= 0x00000100;
|
|
|
|
if (nibbles & 4)
|
|
|
|
v |= 0x00010000;
|
|
|
|
if (nibbles & 8)
|
|
|
|
v |= 0x01000000;
|
|
|
|
nibbles >>= 4;
|
|
|
|
|
|
|
|
wrl(mp, off, v);
|
|
|
|
}
|
|
|
|
|
|
|
|
wrlp(mp, PORT_CONFIG, port_config);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 16:43:32 +07:00
|
|
|
static int addr_crc(unsigned char *addr)
|
|
|
|
{
|
|
|
|
int crc = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 6; i++) {
|
|
|
|
int j;
|
|
|
|
|
|
|
|
crc = (crc ^ addr[i]) << 8;
|
|
|
|
for (j = 7; j >= 0; j--) {
|
|
|
|
if (crc & (0x100 << j))
|
|
|
|
crc ^= 0x107 << j;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return crc;
|
|
|
|
}
|
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
static void mv643xx_eth_program_multicast_filter(struct net_device *dev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
u32 *mc_spec;
|
|
|
|
u32 *mc_other;
|
2008-06-02 05:28:40 +07:00
|
|
|
struct dev_addr_list *addr;
|
|
|
|
int i;
|
2006-03-04 00:02:05 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
if (dev->flags & (IFF_PROMISC | IFF_ALLMULTI)) {
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
int port_num;
|
|
|
|
u32 accept;
|
2006-03-04 00:02:05 +07:00
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
oom:
|
|
|
|
port_num = mp->port_num;
|
|
|
|
accept = 0x01010101;
|
2008-06-02 05:28:40 +07:00
|
|
|
for (i = 0; i < 0x100; i += 4) {
|
|
|
|
wrl(mp, SPECIAL_MCAST_TABLE(port_num) + i, accept);
|
|
|
|
wrl(mp, OTHER_MCAST_TABLE(port_num) + i, accept);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
2006-03-04 00:02:05 +07:00
|
|
|
|
2009-02-15 06:26:18 +07:00
|
|
|
mc_spec = kmalloc(0x200, GFP_ATOMIC);
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
if (mc_spec == NULL)
|
|
|
|
goto oom;
|
|
|
|
mc_other = mc_spec + (0x100 >> 2);
|
|
|
|
|
|
|
|
memset(mc_spec, 0, 0x100);
|
|
|
|
memset(mc_other, 0, 0x100);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2010-02-23 16:19:49 +07:00
|
|
|
netdev_for_each_mc_addr(addr, dev) {
|
2008-06-02 05:28:40 +07:00
|
|
|
u8 *a = addr->da_addr;
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
u32 *table;
|
|
|
|
int entry;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
if (memcmp(a, "\x01\x00\x5e\x00\x00", 5) == 0) {
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
table = mc_spec;
|
|
|
|
entry = a[5];
|
2008-06-02 05:28:40 +07:00
|
|
|
} else {
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
table = mc_other;
|
|
|
|
entry = addr_crc(a);
|
2008-06-02 05:28:40 +07:00
|
|
|
}
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
|
2009-01-20 08:17:18 +07:00
|
|
|
table[entry >> 2] |= 1 << (8 * (entry & 3));
|
2008-06-02 05:28:40 +07:00
|
|
|
}
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
|
|
|
|
for (i = 0; i < 0x100; i += 4) {
|
|
|
|
wrl(mp, SPECIAL_MCAST_TABLE(mp->port_num) + i, mc_spec[i >> 2]);
|
|
|
|
wrl(mp, OTHER_MCAST_TABLE(mp->port_num) + i, mc_other[i >> 2]);
|
|
|
|
}
|
|
|
|
|
|
|
|
kfree(mc_spec);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mv643xx_eth_set_rx_mode(struct net_device *dev)
|
|
|
|
{
|
|
|
|
mv643xx_eth_program_unicast_filter(dev);
|
|
|
|
mv643xx_eth_program_multicast_filter(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mv643xx_eth_set_mac_address(struct net_device *dev, void *addr)
|
|
|
|
{
|
|
|
|
struct sockaddr *sa = addr;
|
|
|
|
|
2009-12-09 11:36:00 +07:00
|
|
|
if (!is_valid_ether_addr(sa->sa_data))
|
|
|
|
return -EINVAL;
|
|
|
|
|
mv643xx_eth: implement ->set_rx_mode()
Currently, if multiple unicast addresses are programmed into a
mv643xx_eth interface, the core networking will resort to enabling
promiscuous mode on the interface, as mv643xx_eth does not implement
->set_rx_mode().
This patch switches mv643xx_eth over from ->set_multicast_list()
to ->set_rx_mode(), and implements support for secondary unicast
addresses. The hardware can handle multiple unicast addresses as
long as their first 11 nibbles are the same (i.e. are of the form
xx:xx:xx:xx:xx:xy where the x part is the same for all addresses), so
if that is the case, we use that mode. If it's not the case, we enable
unicast promiscuous mode in the hardware, which is slightly better than
enabling promiscuous mode for multicasts as well, which is what would
happen before.
While we are at it, change the programming sequence so that we
don't clear all filter bits first, so we don't lose all incoming
packets while the filter is being reprogrammed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 18:58:27 +07:00
|
|
|
memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN);
|
|
|
|
|
|
|
|
netif_addr_lock_bh(dev);
|
|
|
|
mv643xx_eth_program_unicast_filter(dev);
|
|
|
|
netif_addr_unlock_bh(dev);
|
|
|
|
|
|
|
|
return 0;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2006-03-04 00:02:05 +07:00
|
|
|
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* rx/tx queue initialisation ***********************************************/
|
2008-06-02 06:01:26 +07:00
|
|
|
static int rxq_init(struct mv643xx_eth_private *mp, int index)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-02 06:01:26 +07:00
|
|
|
struct rx_queue *rxq = mp->rxq + index;
|
2008-06-01 23:09:35 +07:00
|
|
|
struct rx_desc *rx_desc;
|
|
|
|
int size;
|
2008-06-01 05:48:39 +07:00
|
|
|
int i;
|
|
|
|
|
2008-06-02 06:01:26 +07:00
|
|
|
rxq->index = index;
|
|
|
|
|
2009-02-12 21:07:37 +07:00
|
|
|
rxq->rx_ring_size = mp->rx_ring_size;
|
2008-06-01 23:09:35 +07:00
|
|
|
|
|
|
|
rxq->rx_desc_count = 0;
|
|
|
|
rxq->rx_curr_desc = 0;
|
|
|
|
rxq->rx_used_desc = 0;
|
|
|
|
|
|
|
|
size = rxq->rx_ring_size * sizeof(struct rx_desc);
|
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
if (index == 0 && size <= mp->rx_desc_sram_size) {
|
2008-06-01 23:09:35 +07:00
|
|
|
rxq->rx_desc_area = ioremap(mp->rx_desc_sram_addr,
|
|
|
|
mp->rx_desc_sram_size);
|
|
|
|
rxq->rx_desc_dma = mp->rx_desc_sram_addr;
|
|
|
|
} else {
|
2009-05-18 11:16:47 +07:00
|
|
|
rxq->rx_desc_area = dma_alloc_coherent(mp->dev->dev.parent,
|
|
|
|
size, &rxq->rx_desc_dma,
|
|
|
|
GFP_KERNEL);
|
2006-01-17 06:52:13 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
if (rxq->rx_desc_area == NULL) {
|
|
|
|
dev_printk(KERN_ERR, &mp->dev->dev,
|
|
|
|
"can't allocate rx ring (%d bytes)\n", size);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
memset(rxq->rx_desc_area, 0, size);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
rxq->rx_desc_area_size = size;
|
|
|
|
rxq->rx_skb = kmalloc(rxq->rx_ring_size * sizeof(*rxq->rx_skb),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (rxq->rx_skb == NULL) {
|
|
|
|
dev_printk(KERN_ERR, &mp->dev->dev,
|
|
|
|
"can't allocate rx skb ring\n");
|
|
|
|
goto out_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
rx_desc = (struct rx_desc *)rxq->rx_desc_area;
|
|
|
|
for (i = 0; i < rxq->rx_ring_size; i++) {
|
2008-08-24 04:45:28 +07:00
|
|
|
int nexti;
|
|
|
|
|
|
|
|
nexti = i + 1;
|
|
|
|
if (nexti == rxq->rx_ring_size)
|
|
|
|
nexti = 0;
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
rx_desc[i].next_desc_ptr = rxq->rx_desc_dma +
|
|
|
|
nexti * sizeof(struct rx_desc);
|
|
|
|
}
|
|
|
|
|
2009-02-12 21:08:39 +07:00
|
|
|
rxq->lro_mgr.dev = mp->dev;
|
|
|
|
memset(&rxq->lro_mgr.stats, 0, sizeof(rxq->lro_mgr.stats));
|
|
|
|
rxq->lro_mgr.features = LRO_F_NAPI;
|
|
|
|
rxq->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
|
|
|
|
rxq->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
|
|
|
|
rxq->lro_mgr.max_desc = ARRAY_SIZE(rxq->lro_arr);
|
|
|
|
rxq->lro_mgr.max_aggr = 32;
|
|
|
|
rxq->lro_mgr.frag_align_pad = 0;
|
|
|
|
rxq->lro_mgr.lro_arr = rxq->lro_arr;
|
|
|
|
rxq->lro_mgr.get_skb_header = mv643xx_get_skb_header;
|
|
|
|
|
|
|
|
memset(&rxq->lro_arr, 0, sizeof(rxq->lro_arr));
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
|
|
out_free:
|
2008-08-26 15:23:22 +07:00
|
|
|
if (index == 0 && size <= mp->rx_desc_sram_size)
|
2008-06-01 23:09:35 +07:00
|
|
|
iounmap(rxq->rx_desc_area);
|
|
|
|
else
|
2009-05-18 11:16:47 +07:00
|
|
|
dma_free_coherent(mp->dev->dev.parent, size,
|
2008-06-01 23:09:35 +07:00
|
|
|
rxq->rx_desc_area,
|
|
|
|
rxq->rx_desc_dma);
|
|
|
|
|
|
|
|
out:
|
|
|
|
return -ENOMEM;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2006-03-04 00:02:05 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
static void rxq_deinit(struct rx_queue *rxq)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-01 23:09:35 +07:00
|
|
|
struct mv643xx_eth_private *mp = rxq_to_mp(rxq);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
rxq_disable(rxq);
|
2006-03-04 00:02:05 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
for (i = 0; i < rxq->rx_ring_size; i++) {
|
|
|
|
if (rxq->rx_skb[i]) {
|
|
|
|
dev_kfree_skb(rxq->rx_skb[i]);
|
|
|
|
rxq->rx_desc_count--;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
2006-03-04 00:02:05 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
if (rxq->rx_desc_count) {
|
|
|
|
dev_printk(KERN_ERR, &mp->dev->dev,
|
|
|
|
"error freeing rx ring -- %d skbs stuck\n",
|
|
|
|
rxq->rx_desc_count);
|
|
|
|
}
|
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
if (rxq->index == 0 &&
|
2008-06-02 06:01:26 +07:00
|
|
|
rxq->rx_desc_area_size <= mp->rx_desc_sram_size)
|
2008-06-01 23:09:35 +07:00
|
|
|
iounmap(rxq->rx_desc_area);
|
2008-06-01 05:48:39 +07:00
|
|
|
else
|
2009-05-18 11:16:47 +07:00
|
|
|
dma_free_coherent(mp->dev->dev.parent, rxq->rx_desc_area_size,
|
2008-06-01 23:09:35 +07:00
|
|
|
rxq->rx_desc_area, rxq->rx_desc_dma);
|
|
|
|
|
|
|
|
kfree(rxq->rx_skb);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 06:28:22 +07:00
|
|
|
static int txq_init(struct mv643xx_eth_private *mp, int index)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-02 06:28:22 +07:00
|
|
|
struct tx_queue *txq = mp->txq + index;
|
2008-06-02 01:51:22 +07:00
|
|
|
struct tx_desc *tx_desc;
|
|
|
|
int size;
|
2008-06-01 05:48:39 +07:00
|
|
|
int i;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 06:28:22 +07:00
|
|
|
txq->index = index;
|
|
|
|
|
2009-02-12 21:07:37 +07:00
|
|
|
txq->tx_ring_size = mp->tx_ring_size;
|
2008-06-02 01:51:22 +07:00
|
|
|
|
|
|
|
txq->tx_desc_count = 0;
|
|
|
|
txq->tx_curr_desc = 0;
|
|
|
|
txq->tx_used_desc = 0;
|
|
|
|
|
|
|
|
size = txq->tx_ring_size * sizeof(struct tx_desc);
|
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
if (index == 0 && size <= mp->tx_desc_sram_size) {
|
2008-06-02 01:51:22 +07:00
|
|
|
txq->tx_desc_area = ioremap(mp->tx_desc_sram_addr,
|
|
|
|
mp->tx_desc_sram_size);
|
|
|
|
txq->tx_desc_dma = mp->tx_desc_sram_addr;
|
|
|
|
} else {
|
2009-05-18 11:16:47 +07:00
|
|
|
txq->tx_desc_area = dma_alloc_coherent(mp->dev->dev.parent,
|
|
|
|
size, &txq->tx_desc_dma,
|
|
|
|
GFP_KERNEL);
|
2008-06-02 01:51:22 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (txq->tx_desc_area == NULL) {
|
|
|
|
dev_printk(KERN_ERR, &mp->dev->dev,
|
|
|
|
"can't allocate tx ring (%d bytes)\n", size);
|
2008-08-28 10:53:18 +07:00
|
|
|
return -ENOMEM;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2008-06-02 01:51:22 +07:00
|
|
|
memset(txq->tx_desc_area, 0, size);
|
|
|
|
|
|
|
|
txq->tx_desc_area_size = size;
|
|
|
|
|
|
|
|
tx_desc = (struct tx_desc *)txq->tx_desc_area;
|
|
|
|
for (i = 0; i < txq->tx_ring_size; i++) {
|
2008-07-12 00:38:34 +07:00
|
|
|
struct tx_desc *txd = tx_desc + i;
|
2008-08-24 04:45:28 +07:00
|
|
|
int nexti;
|
|
|
|
|
|
|
|
nexti = i + 1;
|
|
|
|
if (nexti == txq->tx_ring_size)
|
|
|
|
nexti = 0;
|
2008-07-12 00:38:34 +07:00
|
|
|
|
|
|
|
txd->cmd_sts = 0;
|
|
|
|
txd->next_desc_ptr = txq->tx_desc_dma +
|
2008-06-02 01:51:22 +07:00
|
|
|
nexti * sizeof(struct tx_desc);
|
|
|
|
}
|
|
|
|
|
2008-08-28 10:53:18 +07:00
|
|
|
skb_queue_head_init(&txq->tx_skb);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-28 10:53:18 +07:00
|
|
|
return 0;
|
2006-03-04 00:02:05 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
static void txq_deinit(struct tx_queue *txq)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-02 01:51:22 +07:00
|
|
|
struct mv643xx_eth_private *mp = txq_to_mp(txq);
|
2008-04-24 06:27:02 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
txq_disable(txq);
|
2008-08-28 13:09:10 +07:00
|
|
|
txq_reclaim(txq, txq->tx_ring_size, 1);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
BUG_ON(txq->tx_used_desc != txq->tx_curr_desc);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
if (txq->index == 0 &&
|
2008-06-02 06:28:22 +07:00
|
|
|
txq->tx_desc_area_size <= mp->tx_desc_sram_size)
|
2008-06-02 01:51:22 +07:00
|
|
|
iounmap(txq->tx_desc_area);
|
2008-06-01 05:48:39 +07:00
|
|
|
else
|
2009-05-18 11:16:47 +07:00
|
|
|
dma_free_coherent(mp->dev->dev.parent, txq->tx_desc_area_size,
|
2008-06-02 01:51:22 +07:00
|
|
|
txq->tx_desc_area, txq->tx_desc_dma);
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* netdev ops and related ***************************************************/
|
2008-08-28 13:09:10 +07:00
|
|
|
static int mv643xx_eth_collect_events(struct mv643xx_eth_private *mp)
|
|
|
|
{
|
|
|
|
u32 int_cause;
|
|
|
|
u32 int_cause_ext;
|
|
|
|
|
2009-05-06 10:02:01 +07:00
|
|
|
int_cause = rdlp(mp, INT_CAUSE) & mp->int_mask;
|
2008-08-28 13:09:10 +07:00
|
|
|
if (int_cause == 0)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
int_cause_ext = 0;
|
2009-05-06 10:02:01 +07:00
|
|
|
if (int_cause & INT_EXT) {
|
|
|
|
int_cause &= ~INT_EXT;
|
2008-11-20 18:57:36 +07:00
|
|
|
int_cause_ext = rdlp(mp, INT_CAUSE_EXT);
|
2009-05-06 10:02:01 +07:00
|
|
|
}
|
2008-08-28 13:09:10 +07:00
|
|
|
|
|
|
|
if (int_cause) {
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_CAUSE, ~int_cause);
|
2008-08-28 13:09:10 +07:00
|
|
|
mp->work_tx_end |= ((int_cause & INT_TX_END) >> 19) &
|
2008-11-20 18:57:36 +07:00
|
|
|
~(rdlp(mp, TXQ_COMMAND) & 0xff);
|
2008-08-28 13:09:10 +07:00
|
|
|
mp->work_rx |= (int_cause & INT_RX) >> 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
int_cause_ext &= INT_EXT_LINK_PHY | INT_EXT_TX;
|
|
|
|
if (int_cause_ext) {
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_CAUSE_EXT, ~int_cause_ext);
|
2008-08-28 13:09:10 +07:00
|
|
|
if (int_cause_ext & INT_EXT_LINK_PHY)
|
|
|
|
mp->work_link = 1;
|
|
|
|
mp->work_tx |= int_cause_ext & INT_EXT_TX;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct net_device *dev = (struct net_device *)dev_id;
|
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
|
|
|
|
|
|
|
if (unlikely(!mv643xx_eth_collect_events(mp)))
|
|
|
|
return IRQ_NONE;
|
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_MASK, 0);
|
2008-08-28 13:09:10 +07:00
|
|
|
napi_schedule(&mp->napi);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2008-07-24 11:22:59 +07:00
|
|
|
static void handle_link_event(struct mv643xx_eth_private *mp)
|
|
|
|
{
|
|
|
|
struct net_device *dev = mp->dev;
|
|
|
|
u32 port_status;
|
|
|
|
int speed;
|
|
|
|
int duplex;
|
|
|
|
int fc;
|
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
port_status = rdlp(mp, PORT_STATUS);
|
2008-07-24 11:22:59 +07:00
|
|
|
if (!(port_status & LINK_UP)) {
|
|
|
|
if (netif_carrier_ok(dev)) {
|
|
|
|
int i;
|
|
|
|
|
|
|
|
printk(KERN_INFO "%s: link down\n", dev->name);
|
|
|
|
|
|
|
|
netif_carrier_off(dev);
|
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->txq_count; i++) {
|
2008-07-24 11:22:59 +07:00
|
|
|
struct tx_queue *txq = mp->txq + i;
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
txq_reclaim(txq, txq->tx_ring_size, 1);
|
2008-08-26 15:23:22 +07:00
|
|
|
txq_reset_hw_ptr(txq);
|
2008-07-24 11:22:59 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (port_status & PORT_SPEED_MASK) {
|
|
|
|
case PORT_SPEED_10:
|
|
|
|
speed = 10;
|
|
|
|
break;
|
|
|
|
case PORT_SPEED_100:
|
|
|
|
speed = 100;
|
|
|
|
break;
|
|
|
|
case PORT_SPEED_1000:
|
|
|
|
speed = 1000;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
speed = -1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
duplex = (port_status & FULL_DUPLEX) ? 1 : 0;
|
|
|
|
fc = (port_status & FLOW_CONTROL_ENABLED) ? 1 : 0;
|
|
|
|
|
|
|
|
printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, "
|
|
|
|
"flow control %sabled\n", dev->name,
|
|
|
|
speed, duplex ? "full" : "half",
|
|
|
|
fc ? "en" : "dis");
|
|
|
|
|
2008-08-28 10:39:13 +07:00
|
|
|
if (!netif_carrier_ok(dev))
|
2008-07-24 11:22:59 +07:00
|
|
|
netif_carrier_on(dev);
|
|
|
|
}
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
static int mv643xx_eth_poll(struct napi_struct *napi, int budget)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-08-28 13:09:10 +07:00
|
|
|
struct mv643xx_eth_private *mp;
|
|
|
|
int work_done;
|
2008-04-24 06:29:59 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
mp = container_of(napi, struct mv643xx_eth_private, napi);
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2009-04-29 18:57:34 +07:00
|
|
|
if (unlikely(mp->oom)) {
|
|
|
|
mp->oom = 0;
|
|
|
|
del_timer(&mp->rx_oom);
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
work_done = 0;
|
|
|
|
while (work_done < budget) {
|
|
|
|
u8 queue_mask;
|
|
|
|
int queue;
|
|
|
|
int work_tbd;
|
|
|
|
|
|
|
|
if (mp->work_link) {
|
|
|
|
mp->work_link = 0;
|
|
|
|
handle_link_event(mp);
|
2009-05-06 10:01:10 +07:00
|
|
|
work_done++;
|
2008-08-28 13:09:10 +07:00
|
|
|
continue;
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-04-29 18:57:34 +07:00
|
|
|
queue_mask = mp->work_tx | mp->work_tx_end | mp->work_rx;
|
|
|
|
if (likely(!mp->oom))
|
|
|
|
queue_mask |= mp->work_rx_refill;
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
if (!queue_mask) {
|
|
|
|
if (mv643xx_eth_collect_events(mp))
|
|
|
|
continue;
|
|
|
|
break;
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
queue = fls(queue_mask) - 1;
|
|
|
|
queue_mask = 1 << queue;
|
|
|
|
|
|
|
|
work_tbd = budget - work_done;
|
|
|
|
if (work_tbd > 16)
|
|
|
|
work_tbd = 16;
|
|
|
|
|
|
|
|
if (mp->work_tx_end & queue_mask) {
|
|
|
|
txq_kick(mp->txq + queue);
|
|
|
|
} else if (mp->work_tx & queue_mask) {
|
|
|
|
work_done += txq_reclaim(mp->txq + queue, work_tbd, 0);
|
|
|
|
txq_maybe_wake(mp->txq + queue);
|
|
|
|
} else if (mp->work_rx & queue_mask) {
|
|
|
|
work_done += rxq_process(mp->rxq + queue, work_tbd);
|
2009-04-29 18:57:34 +07:00
|
|
|
} else if (!mp->oom && (mp->work_rx_refill & queue_mask)) {
|
2008-08-28 13:09:10 +07:00
|
|
|
work_done += rxq_refill(mp->rxq + queue, work_tbd);
|
|
|
|
} else {
|
|
|
|
BUG();
|
|
|
|
}
|
2007-03-03 20:40:28 +07:00
|
|
|
}
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
if (work_done < budget) {
|
2009-04-29 18:57:34 +07:00
|
|
|
if (mp->oom)
|
2008-08-28 13:09:10 +07:00
|
|
|
mod_timer(&mp->rx_oom, jiffies + (HZ / 10));
|
|
|
|
napi_complete(napi);
|
2009-05-06 10:02:01 +07:00
|
|
|
wrlp(mp, INT_MASK, mp->int_mask);
|
2008-06-02 06:47:21 +07:00
|
|
|
}
|
2008-06-02 06:28:22 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
return work_done;
|
|
|
|
}
|
mv643xx_eth: fix TX hang erratum workaround
The previously merged TX hang erratum workaround ("mv643xx_eth:
work around TX hang hardware issue") assumes that TX_END interrupts
are delivered simultaneously with or after their corresponding TX
interrupts, but this is not always true in practise.
In particular, it appears that TX_END interrupts are issued as soon
as descriptor fetch returns an invalid descriptor, which may happen
before earlier descriptors have been fully transmitted and written
back to memory as being done.
This hardware behavior can lead to a situation where the current
driver code mistakenly assumes that the MAC has given up transmitting
before noticing the packets that it is in fact still currently working
on, causing the driver to re-kick the transmit queue, which will only
cause the MAC to re-fetch the invalid head descriptor, and generate
another TX_END interrupt, et cetera, until the packets in the pipe
finally finish transmitting and have their descriptors written back
to memory, which will then finally break the loop.
Fix this by having the erratum workaround not check the 'number of
unfinished descriptor', but instead, to compare the software's idea
of what the head descriptor pointer should be to the hardware's head
descriptor pointer (which is updated on the same conditions as the
TX_END interupt is generated on, i.e. possibly before all previous
descriptors have been transmitted and written back).
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-07-15 03:56:55 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
static inline void oom_timer_wrapper(unsigned long data)
|
|
|
|
{
|
|
|
|
struct mv643xx_eth_private *mp = (void *)data;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
napi_schedule(&mp->napi);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static void phy_reset(struct mv643xx_eth_private *mp)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-08-26 09:42:59 +07:00
|
|
|
int data;
|
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
data = phy_read(mp->phy, MII_BMCR);
|
2008-08-26 09:42:59 +07:00
|
|
|
if (data < 0)
|
|
|
|
return;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-07-15 07:28:47 +07:00
|
|
|
data |= BMCR_RESET;
|
2008-08-26 18:34:19 +07:00
|
|
|
if (phy_write(mp->phy, MII_BMCR, data) < 0)
|
2008-08-26 09:42:59 +07:00
|
|
|
return;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
do {
|
2008-08-26 18:34:19 +07:00
|
|
|
data = phy_read(mp->phy, MII_BMCR);
|
2008-08-26 09:42:59 +07:00
|
|
|
} while (data >= 0 && data & BMCR_RESET);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
static void port_start(struct mv643xx_eth_private *mp)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2006-01-27 15:15:30 +07:00
|
|
|
u32 pscr;
|
2008-06-01 23:09:35 +07:00
|
|
|
int i;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 07:13:03 +07:00
|
|
|
/*
|
|
|
|
* Perform PHY reset, if there is a PHY.
|
|
|
|
*/
|
2008-08-26 18:34:19 +07:00
|
|
|
if (mp->phy != NULL) {
|
2008-06-02 07:13:03 +07:00
|
|
|
struct ethtool_cmd cmd;
|
|
|
|
|
|
|
|
mv643xx_eth_get_settings(mp->dev, &cmd);
|
|
|
|
phy_reset(mp);
|
|
|
|
mv643xx_eth_set_settings(mp->dev, &cmd);
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-07-14 19:29:40 +07:00
|
|
|
/*
|
|
|
|
* Configure basic link parameters.
|
|
|
|
*/
|
2008-11-20 18:57:36 +07:00
|
|
|
pscr = rdlp(mp, PORT_SERIAL_CONTROL);
|
2008-07-14 19:29:40 +07:00
|
|
|
|
|
|
|
pscr |= SERIAL_PORT_ENABLE;
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, PORT_SERIAL_CONTROL, pscr);
|
2008-07-14 19:29:40 +07:00
|
|
|
|
|
|
|
pscr |= DO_NOT_FORCE_LINK_FAIL;
|
2008-08-26 18:34:19 +07:00
|
|
|
if (mp->phy == NULL)
|
2008-07-14 19:29:40 +07:00
|
|
|
pscr |= FORCE_LINK_PASS;
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, PORT_SERIAL_CONTROL, pscr);
|
2008-07-14 19:29:40 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
/*
|
|
|
|
* Configure TX path and queues.
|
|
|
|
*/
|
2008-06-02 05:51:05 +07:00
|
|
|
tx_set_rate(mp, 1000000000, 16777216);
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->txq_count; i++) {
|
2008-06-02 06:28:22 +07:00
|
|
|
struct tx_queue *txq = mp->txq + i;
|
2008-06-02 01:51:22 +07:00
|
|
|
|
2008-07-12 00:38:34 +07:00
|
|
|
txq_reset_hw_ptr(txq);
|
2008-06-02 05:51:05 +07:00
|
|
|
txq_set_rate(txq, 1000000000, 16777216);
|
|
|
|
txq_set_fixed_prio_mode(txq);
|
2008-06-02 01:51:22 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 06:22:06 +07:00
|
|
|
/*
|
|
|
|
* Receive all unmatched unicast, TCP, UDP, BPDU and broadcast
|
2008-09-19 07:58:50 +07:00
|
|
|
* frames to RX queue #0, and include the pseudo-header when
|
|
|
|
* calculating receive checksums.
|
2008-06-01 06:22:06 +07:00
|
|
|
*/
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, PORT_CONFIG, 0x02000000);
|
2006-01-27 15:18:01 +07:00
|
|
|
|
2008-06-01 06:17:44 +07:00
|
|
|
/*
|
|
|
|
* Treat BPDUs as normal multicasts, and disable partition mode.
|
|
|
|
*/
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, PORT_CONFIG_EXT, 0x00000000);
|
2006-01-27 15:18:01 +07:00
|
|
|
|
2009-03-14 05:48:02 +07:00
|
|
|
/*
|
|
|
|
* Add configured unicast addresses to address filter table.
|
|
|
|
*/
|
|
|
|
mv643xx_eth_program_unicast_filter(mp->dev);
|
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
/*
|
2008-06-02 06:01:26 +07:00
|
|
|
* Enable the receive queues.
|
2008-06-01 23:09:35 +07:00
|
|
|
*/
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->rxq_count; i++) {
|
2008-06-02 06:01:26 +07:00
|
|
|
struct rx_queue *rxq = mp->rxq + i;
|
2008-06-01 23:09:35 +07:00
|
|
|
u32 addr;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
addr = (u32)rxq->rx_desc_dma;
|
|
|
|
addr += rxq->rx_curr_desc * sizeof(struct rx_desc);
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, RXQ_CURRENT_DESC_PTR(i), addr);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 23:09:35 +07:00
|
|
|
rxq_enable(rxq);
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-10-01 16:33:57 +07:00
|
|
|
static void mv643xx_eth_recalc_skb_size(struct mv643xx_eth_private *mp)
|
|
|
|
{
|
|
|
|
int skb_size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reserve 2+14 bytes for an ethernet header (the hardware
|
|
|
|
* automatically prepends 2 bytes of dummy data to each
|
|
|
|
* received packet), 16 bytes for up to four VLAN tags, and
|
|
|
|
* 4 bytes for the trailing FCS -- 36 bytes total.
|
|
|
|
*/
|
|
|
|
skb_size = mp->dev->mtu + 36;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure that the skb size is a multiple of 8 bytes, as
|
|
|
|
* the lower three bits of the receive descriptor's buffer
|
|
|
|
* size field are ignored by the hardware.
|
|
|
|
*/
|
|
|
|
mp->skb_size = (skb_size + 7) & ~7;
|
2009-05-06 10:01:22 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If NET_SKB_PAD is smaller than a cache line,
|
|
|
|
* netdev_alloc_skb() will cause skb->data to be misaligned
|
|
|
|
* to a cache line boundary. If this is the case, include
|
|
|
|
* some extra space to allow re-aligning the data area.
|
|
|
|
*/
|
|
|
|
mp->skb_size += SKB_DMA_REALIGN;
|
2008-10-01 16:33:57 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static int mv643xx_eth_open(struct net_device *dev)
|
2006-01-17 06:50:02 +07:00
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
2008-06-01 05:48:39 +07:00
|
|
|
int err;
|
2008-06-02 06:01:26 +07:00
|
|
|
int i;
|
2006-01-17 06:50:02 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_CAUSE, 0);
|
|
|
|
wrlp(mp, INT_CAUSE_EXT, 0);
|
|
|
|
rdlp(mp, INT_CAUSE_EXT);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
err = request_irq(dev->irq, mv643xx_eth_irq,
|
2008-08-24 04:43:38 +07:00
|
|
|
IRQF_SHARED, dev->name, dev);
|
2008-06-01 05:48:39 +07:00
|
|
|
if (err) {
|
2008-06-02 05:28:40 +07:00
|
|
|
dev_printk(KERN_ERR, &dev->dev, "can't assign irq\n");
|
2008-06-01 05:48:39 +07:00
|
|
|
return -EAGAIN;
|
2006-01-17 06:50:02 +07:00
|
|
|
}
|
|
|
|
|
2008-10-01 16:33:57 +07:00
|
|
|
mv643xx_eth_recalc_skb_size(mp);
|
|
|
|
|
2008-08-24 09:33:36 +07:00
|
|
|
napi_enable(&mp->napi);
|
|
|
|
|
2008-10-01 16:33:57 +07:00
|
|
|
skb_queue_head_init(&mp->rx_recycle);
|
|
|
|
|
2009-05-06 10:02:01 +07:00
|
|
|
mp->int_mask = INT_EXT;
|
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->rxq_count; i++) {
|
2008-06-02 06:01:26 +07:00
|
|
|
err = rxq_init(mp, i);
|
|
|
|
if (err) {
|
|
|
|
while (--i >= 0)
|
2008-08-26 15:23:22 +07:00
|
|
|
rxq_deinit(mp->rxq + i);
|
2008-06-02 06:01:26 +07:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2008-08-28 13:09:10 +07:00
|
|
|
rxq_refill(mp->rxq + i, INT_MAX);
|
2009-05-06 10:02:01 +07:00
|
|
|
mp->int_mask |= INT_RX_0 << i;
|
2008-08-24 09:33:36 +07:00
|
|
|
}
|
|
|
|
|
2009-04-29 18:57:34 +07:00
|
|
|
if (mp->oom) {
|
2008-08-24 09:33:36 +07:00
|
|
|
mp->rx_oom.expires = jiffies + (HZ / 10);
|
|
|
|
add_timer(&mp->rx_oom);
|
2008-06-02 06:01:26 +07:00
|
|
|
}
|
2008-06-01 23:09:35 +07:00
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->txq_count; i++) {
|
2008-06-02 06:28:22 +07:00
|
|
|
err = txq_init(mp, i);
|
|
|
|
if (err) {
|
|
|
|
while (--i >= 0)
|
2008-08-26 15:23:22 +07:00
|
|
|
txq_deinit(mp->txq + i);
|
2008-06-02 06:28:22 +07:00
|
|
|
goto out_free;
|
|
|
|
}
|
2009-05-06 10:02:01 +07:00
|
|
|
mp->int_mask |= INT_TX_END_0 << i;
|
2008-06-02 06:28:22 +07:00
|
|
|
}
|
2006-01-17 06:50:02 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
port_start(mp);
|
2006-01-17 06:50:02 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_MASK_EXT, INT_EXT_LINK_PHY | INT_EXT_TX);
|
2009-05-06 10:02:01 +07:00
|
|
|
wrlp(mp, INT_MASK, mp->int_mask);
|
2006-01-17 06:50:02 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return 0;
|
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
out_free:
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->rxq_count; i++)
|
|
|
|
rxq_deinit(mp->rxq + i);
|
2008-06-02 05:28:40 +07:00
|
|
|
out:
|
2008-06-01 05:48:39 +07:00
|
|
|
free_irq(dev->irq, dev);
|
|
|
|
|
|
|
|
return err;
|
2006-01-17 06:50:02 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static void port_reset(struct mv643xx_eth_private *mp)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
unsigned int data;
|
2008-06-02 06:01:26 +07:00
|
|
|
int i;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->rxq_count; i++)
|
|
|
|
rxq_disable(mp->rxq + i);
|
|
|
|
for (i = 0; i < mp->txq_count; i++)
|
|
|
|
txq_disable(mp->txq + i);
|
2008-07-15 07:15:24 +07:00
|
|
|
|
|
|
|
while (1) {
|
2008-11-20 18:57:36 +07:00
|
|
|
u32 ps = rdlp(mp, PORT_STATUS);
|
2008-07-15 07:15:24 +07:00
|
|
|
|
|
|
|
if ((ps & (TX_IN_PROGRESS | TX_FIFO_EMPTY)) == TX_FIFO_EMPTY)
|
|
|
|
break;
|
2008-06-02 01:51:22 +07:00
|
|
|
udelay(10);
|
2008-07-15 07:15:24 +07:00
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* Reset the Enable bit in the Configuration Register */
|
2008-11-20 18:57:36 +07:00
|
|
|
data = rdlp(mp, PORT_SERIAL_CONTROL);
|
2008-06-02 05:28:40 +07:00
|
|
|
data &= ~(SERIAL_PORT_ENABLE |
|
|
|
|
DO_NOT_FORCE_LINK_FAIL |
|
|
|
|
FORCE_LINK_PASS);
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, PORT_SERIAL_CONTROL, data);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static int mv643xx_eth_stop(struct net_device *dev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
2008-06-02 06:01:26 +07:00
|
|
|
int i;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-01-20 08:18:09 +07:00
|
|
|
wrlp(mp, INT_MASK_EXT, 0x00000000);
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_MASK, 0x00000000);
|
|
|
|
rdlp(mp, INT_MASK);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
napi_disable(&mp->napi);
|
2008-08-24 06:03:57 +07:00
|
|
|
|
2008-08-24 09:33:36 +07:00
|
|
|
del_timer_sync(&mp->rx_oom);
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
netif_carrier_off(dev);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
free_irq(dev->irq, dev);
|
|
|
|
|
2008-06-01 07:10:27 +07:00
|
|
|
port_reset(mp);
|
2008-08-28 13:26:28 +07:00
|
|
|
mv643xx_eth_get_stats(dev);
|
2008-06-02 05:28:40 +07:00
|
|
|
mib_counters_update(mp);
|
2009-02-16 18:28:15 +07:00
|
|
|
del_timer_sync(&mp->mib_counters_timer);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-10-01 16:33:57 +07:00
|
|
|
skb_queue_purge(&mp->rx_recycle);
|
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
for (i = 0; i < mp->rxq_count; i++)
|
|
|
|
rxq_deinit(mp->rxq + i);
|
|
|
|
for (i = 0; i < mp->txq_count; i++)
|
|
|
|
txq_deinit(mp->txq + i);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
static int mv643xx_eth_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
if (mp->phy != NULL)
|
|
|
|
return phy_mii_ioctl(mp->phy, if_mii(ifr), cmd);
|
2008-06-02 07:13:03 +07:00
|
|
|
|
|
|
|
return -EOPNOTSUPP;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static int mv643xx_eth_change_mtu(struct net_device *dev, int new_mtu)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 05:51:05 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
if (new_mtu < 64 || new_mtu > 9500)
|
2008-06-01 05:48:39 +07:00
|
|
|
return -EINVAL;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
dev->mtu = new_mtu;
|
2008-10-01 16:33:57 +07:00
|
|
|
mv643xx_eth_recalc_skb_size(mp);
|
2008-06-02 05:51:05 +07:00
|
|
|
tx_set_rate(mp, 1000000000, 16777216);
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
if (!netif_running(dev))
|
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/*
|
|
|
|
* Stop and then re-open the interface. This will allocate RX
|
|
|
|
* skbs of the new MTU.
|
|
|
|
* There is a possible danger that the open will not succeed,
|
2008-06-02 05:28:40 +07:00
|
|
|
* due to memory being full.
|
2008-06-01 05:48:39 +07:00
|
|
|
*/
|
|
|
|
mv643xx_eth_stop(dev);
|
|
|
|
if (mv643xx_eth_open(dev)) {
|
2008-06-02 05:28:40 +07:00
|
|
|
dev_printk(KERN_ERR, &dev->dev,
|
|
|
|
"fatal error on re-opening device after "
|
|
|
|
"MTU change\n");
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
static void tx_timeout_task(struct work_struct *ugly)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
struct mv643xx_eth_private *mp;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
mp = container_of(ugly, struct mv643xx_eth_private, tx_timeout_task);
|
|
|
|
if (netif_running(mp->dev)) {
|
2008-08-28 11:26:23 +07:00
|
|
|
netif_tx_stop_all_queues(mp->dev);
|
2008-06-02 05:28:40 +07:00
|
|
|
port_reset(mp);
|
|
|
|
port_start(mp);
|
2008-08-28 11:26:23 +07:00
|
|
|
netif_tx_wake_all_queues(mp->dev);
|
2008-06-02 05:28:40 +07:00
|
|
|
}
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void mv643xx_eth_tx_timeout(struct net_device *dev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
dev_printk(KERN_INFO, &dev->dev, "tx timeout\n");
|
2006-01-27 15:15:30 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
schedule_work(&mp->tx_timeout_task);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
2008-06-02 05:28:40 +07:00
|
|
|
static void mv643xx_eth_netpoll(struct net_device *dev)
|
2006-01-27 15:10:47 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
struct mv643xx_eth_private *mp = netdev_priv(dev);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_MASK, 0x00000000);
|
|
|
|
rdlp(mp, INT_MASK);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
mv643xx_eth_irq(dev->irq, dev);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2009-05-06 10:02:01 +07:00
|
|
|
wrlp(mp, INT_MASK, mp->int_mask);
|
2006-01-27 15:10:47 +07:00
|
|
|
}
|
2008-06-01 05:48:39 +07:00
|
|
|
#endif
|
2006-01-27 15:10:47 +07:00
|
|
|
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* platform glue ************************************************************/
|
2008-06-01 07:18:13 +07:00
|
|
|
static void
|
|
|
|
mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp,
|
|
|
|
struct mbus_dram_target_info *dram)
|
2008-06-01 05:48:39 +07:00
|
|
|
{
|
2008-06-01 07:10:27 +07:00
|
|
|
void __iomem *base = msp->base;
|
2008-06-01 05:48:39 +07:00
|
|
|
u32 win_enable;
|
|
|
|
u32 win_protect;
|
|
|
|
int i;
|
2006-01-27 15:10:47 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
for (i = 0; i < 6; i++) {
|
|
|
|
writel(0, base + WINDOW_BASE(i));
|
|
|
|
writel(0, base + WINDOW_SIZE(i));
|
|
|
|
if (i < 4)
|
|
|
|
writel(0, base + WINDOW_REMAP_HIGH(i));
|
2006-01-27 15:10:47 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
win_enable = 0x3f;
|
|
|
|
win_protect = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < dram->num_cs; i++) {
|
|
|
|
struct mbus_dram_window *cs = dram->cs + i;
|
|
|
|
|
|
|
|
writel((cs->base & 0xffff0000) |
|
|
|
|
(cs->mbus_attr << 8) |
|
|
|
|
dram->mbus_dram_target_id, base + WINDOW_BASE(i));
|
|
|
|
writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
|
|
|
|
|
|
|
|
win_enable &= ~(1 << i);
|
|
|
|
win_protect |= 3 << (2 * i);
|
|
|
|
}
|
|
|
|
|
|
|
|
writel(win_enable, base + WINDOW_BAR_ENABLE);
|
|
|
|
msp->win_protect = win_protect;
|
2006-01-27 15:10:47 +07:00
|
|
|
}
|
|
|
|
|
2008-06-02 06:54:16 +07:00
|
|
|
static void infer_hw_params(struct mv643xx_eth_shared_private *msp)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Check whether we have a 14-bit coal limit field in bits
|
|
|
|
* [21:8], or a 16-bit coal limit in bits [25,21:7] of the
|
|
|
|
* SDMA config register.
|
|
|
|
*/
|
2008-11-20 18:57:36 +07:00
|
|
|
writel(0x02000000, msp->base + 0x0400 + SDMA_CONFIG);
|
|
|
|
if (readl(msp->base + 0x0400 + SDMA_CONFIG) & 0x02000000)
|
2008-06-02 06:54:16 +07:00
|
|
|
msp->extended_rx_coal_limit = 1;
|
|
|
|
else
|
|
|
|
msp->extended_rx_coal_limit = 0;
|
2008-06-02 06:57:36 +07:00
|
|
|
|
|
|
|
/*
|
2008-09-04 17:22:34 +07:00
|
|
|
* Check whether the MAC supports TX rate control, and if
|
|
|
|
* yes, whether its associated registers are in the old or
|
|
|
|
* the new place.
|
2008-06-02 06:57:36 +07:00
|
|
|
*/
|
2008-11-20 18:57:36 +07:00
|
|
|
writel(1, msp->base + 0x0400 + TX_BW_MTU_MOVED);
|
|
|
|
if (readl(msp->base + 0x0400 + TX_BW_MTU_MOVED) & 1) {
|
2008-09-04 17:22:34 +07:00
|
|
|
msp->tx_bw_control = TX_BW_CONTROL_NEW_LAYOUT;
|
|
|
|
} else {
|
2008-11-20 18:57:36 +07:00
|
|
|
writel(7, msp->base + 0x0400 + TX_BW_RATE);
|
|
|
|
if (readl(msp->base + 0x0400 + TX_BW_RATE) & 7)
|
2008-09-04 17:22:34 +07:00
|
|
|
msp->tx_bw_control = TX_BW_CONTROL_OLD_LAYOUT;
|
|
|
|
else
|
|
|
|
msp->tx_bw_control = TX_BW_CONTROL_ABSENT;
|
|
|
|
}
|
2008-06-02 06:54:16 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static int mv643xx_eth_shared_probe(struct platform_device *pdev)
|
2006-01-27 15:10:47 +07:00
|
|
|
{
|
2008-11-20 18:57:16 +07:00
|
|
|
static int mv643xx_eth_version_printed;
|
2008-06-01 05:48:39 +07:00
|
|
|
struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_shared_private *msp;
|
2008-06-01 05:48:39 +07:00
|
|
|
struct resource *res;
|
|
|
|
int ret;
|
2006-01-27 15:10:47 +07:00
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
if (!mv643xx_eth_version_printed++)
|
2008-07-15 17:20:30 +07:00
|
|
|
printk(KERN_NOTICE "MV-643xx 10/100/1000 ethernet "
|
|
|
|
"driver version %s\n", mv643xx_eth_driver_version);
|
2006-01-27 15:10:47 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
ret = -EINVAL;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (res == NULL)
|
|
|
|
goto out;
|
2006-01-27 15:10:47 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
ret = -ENOMEM;
|
|
|
|
msp = kmalloc(sizeof(*msp), GFP_KERNEL);
|
|
|
|
if (msp == NULL)
|
|
|
|
goto out;
|
|
|
|
memset(msp, 0, sizeof(*msp));
|
|
|
|
|
2008-06-01 07:10:27 +07:00
|
|
|
msp->base = ioremap(res->start, res->end - res->start + 1);
|
|
|
|
if (msp->base == NULL)
|
2008-06-01 05:48:39 +07:00
|
|
|
goto out_free;
|
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
/*
|
|
|
|
* Set up and register SMI bus.
|
|
|
|
*/
|
|
|
|
if (pd == NULL || pd->shared_smi == NULL) {
|
2008-10-09 06:29:57 +07:00
|
|
|
msp->smi_bus = mdiobus_alloc();
|
|
|
|
if (msp->smi_bus == NULL)
|
2008-08-26 18:34:19 +07:00
|
|
|
goto out_unmap;
|
2008-10-09 06:29:57 +07:00
|
|
|
|
|
|
|
msp->smi_bus->priv = msp;
|
|
|
|
msp->smi_bus->name = "mv643xx_eth smi";
|
|
|
|
msp->smi_bus->read = smi_bus_read;
|
|
|
|
msp->smi_bus->write = smi_bus_write,
|
|
|
|
snprintf(msp->smi_bus->id, MII_BUS_ID_SIZE, "%d", pdev->id);
|
|
|
|
msp->smi_bus->parent = &pdev->dev;
|
|
|
|
msp->smi_bus->phy_mask = 0xffffffff;
|
|
|
|
if (mdiobus_register(msp->smi_bus) < 0)
|
|
|
|
goto out_free_mii_bus;
|
2008-08-26 18:34:19 +07:00
|
|
|
msp->smi = msp;
|
|
|
|
} else {
|
2008-08-26 17:56:56 +07:00
|
|
|
msp->smi = platform_get_drvdata(pd->shared_smi);
|
2008-08-26 18:34:19 +07:00
|
|
|
}
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-08-26 09:42:59 +07:00
|
|
|
msp->err_interrupt = NO_IRQ;
|
|
|
|
init_waitqueue_head(&msp->smi_busy_wait);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check whether the error interrupt is hooked up.
|
|
|
|
*/
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
|
if (res != NULL) {
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = request_irq(res->start, mv643xx_eth_err_irq,
|
|
|
|
IRQF_SHARED, "mv643xx_eth", msp);
|
|
|
|
if (!err) {
|
|
|
|
writel(ERR_INT_SMI_DONE, msp->base + ERR_INT_MASK);
|
|
|
|
msp->err_interrupt = res->start;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/*
|
|
|
|
* (Re-)program MBUS remapping windows if we are asked to.
|
|
|
|
*/
|
|
|
|
if (pd != NULL && pd->dram != NULL)
|
|
|
|
mv643xx_eth_conf_mbus_windows(msp, pd->dram);
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
/*
|
|
|
|
* Detect hardware parameters.
|
|
|
|
*/
|
|
|
|
msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000;
|
2008-06-02 06:54:16 +07:00
|
|
|
infer_hw_params(msp);
|
2008-06-02 05:28:40 +07:00
|
|
|
|
|
|
|
platform_set_drvdata(pdev, msp);
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return 0;
|
|
|
|
|
2008-10-09 06:29:57 +07:00
|
|
|
out_free_mii_bus:
|
|
|
|
mdiobus_free(msp->smi_bus);
|
2008-08-26 18:34:19 +07:00
|
|
|
out_unmap:
|
|
|
|
iounmap(msp->base);
|
2008-06-01 05:48:39 +07:00
|
|
|
out_free:
|
|
|
|
kfree(msp);
|
|
|
|
out:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mv643xx_eth_shared_remove(struct platform_device *pdev)
|
|
|
|
{
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_shared_private *msp = platform_get_drvdata(pdev);
|
2008-08-26 18:34:19 +07:00
|
|
|
struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-10-09 06:29:57 +07:00
|
|
|
if (pd == NULL || pd->shared_smi == NULL) {
|
|
|
|
mdiobus_unregister(msp->smi_bus);
|
2008-11-18 11:28:35 +07:00
|
|
|
mdiobus_free(msp->smi_bus);
|
2008-10-09 06:29:57 +07:00
|
|
|
}
|
2008-08-26 09:42:59 +07:00
|
|
|
if (msp->err_interrupt != NO_IRQ)
|
|
|
|
free_irq(msp->err_interrupt, msp);
|
2008-06-01 07:10:27 +07:00
|
|
|
iounmap(msp->base);
|
2008-06-01 05:48:39 +07:00
|
|
|
kfree(msp);
|
|
|
|
|
|
|
|
return 0;
|
2006-01-27 15:10:47 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static struct platform_driver mv643xx_eth_shared_driver = {
|
2008-06-02 05:28:40 +07:00
|
|
|
.probe = mv643xx_eth_shared_probe,
|
|
|
|
.remove = mv643xx_eth_shared_remove,
|
2008-06-01 05:48:39 +07:00
|
|
|
.driver = {
|
2008-06-02 05:28:40 +07:00
|
|
|
.name = MV643XX_ETH_SHARED_NAME,
|
2008-06-01 05:48:39 +07:00
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static void phy_addr_set(struct mv643xx_eth_private *mp, int phy_addr)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 05:48:39 +07:00
|
|
|
int addr_shift = 5 * mp->port_num;
|
2008-06-02 05:28:40 +07:00
|
|
|
u32 data;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
data = rdl(mp, PHY_ADDR);
|
|
|
|
data &= ~(0x1f << addr_shift);
|
|
|
|
data |= (phy_addr & 0x1f) << addr_shift;
|
|
|
|
wrl(mp, PHY_ADDR, data);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static int phy_addr_get(struct mv643xx_eth_private *mp)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
unsigned int data;
|
|
|
|
|
|
|
|
data = rdl(mp, PHY_ADDR);
|
|
|
|
|
|
|
|
return (data >> (5 * mp->port_num)) & 0x1f;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void set_params(struct mv643xx_eth_private *mp,
|
|
|
|
struct mv643xx_eth_platform_data *pd)
|
|
|
|
{
|
|
|
|
struct net_device *dev = mp->dev;
|
|
|
|
|
|
|
|
if (is_valid_ether_addr(pd->mac_addr))
|
|
|
|
memcpy(dev->dev_addr, pd->mac_addr, 6);
|
|
|
|
else
|
|
|
|
uc_addr_get(mp, dev->dev_addr);
|
|
|
|
|
2009-02-12 21:07:37 +07:00
|
|
|
mp->rx_ring_size = DEFAULT_RX_QUEUE_SIZE;
|
2008-06-02 05:28:40 +07:00
|
|
|
if (pd->rx_queue_size)
|
2009-02-12 21:07:37 +07:00
|
|
|
mp->rx_ring_size = pd->rx_queue_size;
|
2008-06-02 05:28:40 +07:00
|
|
|
mp->rx_desc_sram_addr = pd->rx_sram_addr;
|
|
|
|
mp->rx_desc_sram_size = pd->rx_sram_size;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
mp->rxq_count = pd->rx_queue_count ? : 1;
|
2008-06-02 06:01:26 +07:00
|
|
|
|
2009-02-12 21:07:37 +07:00
|
|
|
mp->tx_ring_size = DEFAULT_TX_QUEUE_SIZE;
|
2008-06-02 05:28:40 +07:00
|
|
|
if (pd->tx_queue_size)
|
2009-02-12 21:07:37 +07:00
|
|
|
mp->tx_ring_size = pd->tx_queue_size;
|
2008-06-02 05:28:40 +07:00
|
|
|
mp->tx_desc_sram_addr = pd->tx_sram_addr;
|
|
|
|
mp->tx_desc_sram_size = pd->tx_sram_size;
|
2008-06-02 06:28:22 +07:00
|
|
|
|
2008-08-26 15:23:22 +07:00
|
|
|
mp->txq_count = pd->tx_queue_count ? : 1;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
static struct phy_device *phy_scan(struct mv643xx_eth_private *mp,
|
|
|
|
int phy_addr)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-10-09 06:29:57 +07:00
|
|
|
struct mii_bus *bus = mp->shared->smi->smi_bus;
|
2008-08-26 18:34:19 +07:00
|
|
|
struct phy_device *phydev;
|
|
|
|
int start;
|
|
|
|
int num;
|
|
|
|
int i;
|
2008-08-26 09:42:59 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
if (phy_addr == MV643XX_ETH_PHY_ADDR_DEFAULT) {
|
|
|
|
start = phy_addr_get(mp) & 0x1f;
|
|
|
|
num = 32;
|
|
|
|
} else {
|
|
|
|
start = phy_addr & 0x1f;
|
|
|
|
num = 1;
|
|
|
|
}
|
2008-08-26 09:42:59 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
phydev = NULL;
|
|
|
|
for (i = 0; i < num; i++) {
|
|
|
|
int addr = (start + i) & 0x1f;
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
if (bus->phy_map[addr] == NULL)
|
|
|
|
mdiobus_scan(bus, addr);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
if (phydev == NULL) {
|
|
|
|
phydev = bus->phy_map[addr];
|
|
|
|
if (phydev != NULL)
|
|
|
|
phy_addr_set(mp, addr);
|
|
|
|
}
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
return phydev;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
static void phy_init(struct mv643xx_eth_private *mp, int speed, int duplex)
|
2006-01-27 15:13:15 +07:00
|
|
|
{
|
2008-08-26 18:34:19 +07:00
|
|
|
struct phy_device *phy = mp->phy;
|
2006-01-27 15:13:15 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
phy_reset(mp);
|
|
|
|
|
2009-01-27 12:12:58 +07:00
|
|
|
phy_attach(mp->dev, dev_name(&phy->dev), 0, PHY_INTERFACE_MODE_GMII);
|
2008-08-26 18:34:19 +07:00
|
|
|
|
|
|
|
if (speed == 0) {
|
|
|
|
phy->autoneg = AUTONEG_ENABLE;
|
|
|
|
phy->speed = 0;
|
|
|
|
phy->duplex = 0;
|
|
|
|
phy->advertising = phy->supported | ADVERTISED_Autoneg;
|
2008-06-01 05:48:39 +07:00
|
|
|
} else {
|
2008-08-26 18:34:19 +07:00
|
|
|
phy->autoneg = AUTONEG_DISABLE;
|
|
|
|
phy->advertising = 0;
|
|
|
|
phy->speed = speed;
|
|
|
|
phy->duplex = duplex;
|
2008-06-01 05:48:39 +07:00
|
|
|
}
|
2008-08-26 18:34:19 +07:00
|
|
|
phy_start_aneg(phy);
|
2006-01-27 15:13:15 +07:00
|
|
|
}
|
|
|
|
|
2008-07-14 19:29:40 +07:00
|
|
|
static void init_pscr(struct mv643xx_eth_private *mp, int speed, int duplex)
|
|
|
|
{
|
|
|
|
u32 pscr;
|
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
pscr = rdlp(mp, PORT_SERIAL_CONTROL);
|
2008-07-14 19:29:40 +07:00
|
|
|
if (pscr & SERIAL_PORT_ENABLE) {
|
|
|
|
pscr &= ~SERIAL_PORT_ENABLE;
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, PORT_SERIAL_CONTROL, pscr);
|
2008-07-14 19:29:40 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
pscr = MAX_RX_PACKET_9700BYTE | SERIAL_PORT_CONTROL_RESERVED;
|
2008-08-26 18:34:19 +07:00
|
|
|
if (mp->phy == NULL) {
|
2008-07-14 19:29:40 +07:00
|
|
|
pscr |= DISABLE_AUTO_NEG_SPEED_GMII;
|
|
|
|
if (speed == SPEED_1000)
|
|
|
|
pscr |= SET_GMII_SPEED_TO_1000;
|
|
|
|
else if (speed == SPEED_100)
|
|
|
|
pscr |= SET_MII_SPEED_TO_100;
|
|
|
|
|
|
|
|
pscr |= DISABLE_AUTO_NEG_FOR_FLOW_CTRL;
|
|
|
|
|
|
|
|
pscr |= DISABLE_AUTO_NEG_FOR_DUPLEX;
|
|
|
|
if (duplex == DUPLEX_FULL)
|
|
|
|
pscr |= SET_FULL_DUPLEX_MODE;
|
|
|
|
}
|
|
|
|
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, PORT_SERIAL_CONTROL, pscr);
|
2008-07-14 19:29:40 +07:00
|
|
|
}
|
|
|
|
|
2009-02-24 22:41:40 +07:00
|
|
|
static const struct net_device_ops mv643xx_eth_netdev_ops = {
|
|
|
|
.ndo_open = mv643xx_eth_open,
|
|
|
|
.ndo_stop = mv643xx_eth_stop,
|
|
|
|
.ndo_start_xmit = mv643xx_eth_xmit,
|
|
|
|
.ndo_set_rx_mode = mv643xx_eth_set_rx_mode,
|
|
|
|
.ndo_set_mac_address = mv643xx_eth_set_mac_address,
|
2010-02-17 03:40:11 +07:00
|
|
|
.ndo_validate_addr = eth_validate_addr,
|
2009-02-24 22:41:40 +07:00
|
|
|
.ndo_do_ioctl = mv643xx_eth_ioctl,
|
|
|
|
.ndo_change_mtu = mv643xx_eth_change_mtu,
|
|
|
|
.ndo_tx_timeout = mv643xx_eth_tx_timeout,
|
|
|
|
.ndo_get_stats = mv643xx_eth_get_stats,
|
|
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
|
|
.ndo_poll_controller = mv643xx_eth_netpoll,
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static int mv643xx_eth_probe(struct platform_device *pdev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-01 05:48:39 +07:00
|
|
|
struct mv643xx_eth_platform_data *pd;
|
2008-06-01 07:18:13 +07:00
|
|
|
struct mv643xx_eth_private *mp;
|
2008-06-01 05:48:39 +07:00
|
|
|
struct net_device *dev;
|
|
|
|
struct resource *res;
|
2008-06-02 05:28:40 +07:00
|
|
|
int err;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
pd = pdev->dev.platform_data;
|
|
|
|
if (pd == NULL) {
|
2008-06-02 05:28:40 +07:00
|
|
|
dev_printk(KERN_ERR, &pdev->dev,
|
|
|
|
"no mv643xx_eth_platform_data\n");
|
2008-06-01 05:48:39 +07:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
if (pd->shared == NULL) {
|
2008-06-02 05:28:40 +07:00
|
|
|
dev_printk(KERN_ERR, &pdev->dev,
|
|
|
|
"no mv643xx_eth_platform_data->shared\n");
|
2008-06-01 05:48:39 +07:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
2006-01-17 06:56:30 +07:00
|
|
|
|
2008-08-28 11:26:23 +07:00
|
|
|
dev = alloc_etherdev_mq(sizeof(struct mv643xx_eth_private), 8);
|
2008-06-01 05:48:39 +07:00
|
|
|
if (!dev)
|
|
|
|
return -ENOMEM;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
mp = netdev_priv(dev);
|
2008-06-02 05:28:40 +07:00
|
|
|
platform_set_drvdata(pdev, mp);
|
|
|
|
|
|
|
|
mp->shared = platform_get_drvdata(pd->shared);
|
2008-11-20 18:57:36 +07:00
|
|
|
mp->base = mp->shared->base + 0x0400 + (pd->port_number << 10);
|
2008-06-02 05:28:40 +07:00
|
|
|
mp->port_num = pd->port_number;
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
mp->dev = dev;
|
2008-08-24 06:03:57 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
set_params(mp, pd);
|
2008-08-28 11:26:23 +07:00
|
|
|
dev->real_num_tx_queues = mp->txq_count;
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2008-08-26 18:34:19 +07:00
|
|
|
if (pd->phy_addr != MV643XX_ETH_PHY_NONE)
|
|
|
|
mp->phy = phy_scan(mp, pd->phy_addr);
|
2008-06-02 07:13:03 +07:00
|
|
|
|
2009-02-12 21:06:46 +07:00
|
|
|
if (mp->phy != NULL)
|
2008-08-26 18:34:19 +07:00
|
|
|
phy_init(mp, pd->speed, pd->duplex);
|
2009-02-12 21:06:46 +07:00
|
|
|
|
|
|
|
SET_ETHTOOL_OPS(dev, &mv643xx_eth_ethtool_ops);
|
2008-08-26 18:34:19 +07:00
|
|
|
|
2008-07-14 19:29:40 +07:00
|
|
|
init_pscr(mp, pd->speed, pd->duplex);
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2008-09-19 10:04:57 +07:00
|
|
|
|
|
|
|
mib_counters_clear(mp);
|
|
|
|
|
|
|
|
init_timer(&mp->mib_counters_timer);
|
|
|
|
mp->mib_counters_timer.data = (unsigned long)mp;
|
|
|
|
mp->mib_counters_timer.function = mib_counters_timer_wrapper;
|
|
|
|
mp->mib_counters_timer.expires = jiffies + 30 * HZ;
|
|
|
|
add_timer(&mp->mib_counters_timer);
|
|
|
|
|
|
|
|
spin_lock_init(&mp->mib_counters_lock);
|
|
|
|
|
|
|
|
INIT_WORK(&mp->tx_timeout_task, tx_timeout_task);
|
|
|
|
|
2008-08-24 09:33:36 +07:00
|
|
|
netif_napi_add(dev, &mp->napi, mv643xx_eth_poll, 128);
|
|
|
|
|
|
|
|
init_timer(&mp->rx_oom);
|
|
|
|
mp->rx_oom.data = (unsigned long)mp;
|
|
|
|
mp->rx_oom.function = oom_timer_wrapper;
|
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
|
BUG_ON(!res);
|
|
|
|
dev->irq = res->start;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-02-24 22:41:40 +07:00
|
|
|
dev->netdev_ops = &mv643xx_eth_netdev_ops;
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
dev->watchdog_timeo = 2 * HZ;
|
|
|
|
dev->base_addr = 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
|
2008-07-24 11:22:59 +07:00
|
|
|
dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
SET_NETDEV_DEV(dev, &pdev->dev);
|
2006-01-17 06:56:30 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
if (mp->shared->win_protect)
|
2008-06-02 05:28:40 +07:00
|
|
|
wrl(mp, WINDOW_PROTECT(mp->port_num), mp->shared->win_protect);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2009-02-24 22:41:47 +07:00
|
|
|
netif_carrier_off(dev);
|
|
|
|
|
2009-04-09 05:42:46 +07:00
|
|
|
wrlp(mp, SDMA_CONFIG, PORT_SDMA_CONFIG_DEFAULT_VALUE);
|
|
|
|
|
2009-02-24 22:42:05 +07:00
|
|
|
set_rx_coal(mp, 250);
|
2009-02-24 22:41:47 +07:00
|
|
|
set_tx_coal(mp, 0);
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
err = register_netdev(dev);
|
|
|
|
if (err)
|
|
|
|
goto out;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-10-28 05:59:26 +07:00
|
|
|
dev_printk(KERN_NOTICE, &dev->dev, "port %d with MAC address %pM\n",
|
|
|
|
mp->port_num, dev->dev_addr);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 01:51:22 +07:00
|
|
|
if (mp->tx_desc_sram_size > 0)
|
2008-06-02 05:28:40 +07:00
|
|
|
dev_printk(KERN_NOTICE, &dev->dev, "configured with sram\n");
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
out:
|
|
|
|
free_netdev(dev);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return err;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static int mv643xx_eth_remove(struct platform_device *pdev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
struct mv643xx_eth_private *mp = platform_get_drvdata(pdev);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
unregister_netdev(mp->dev);
|
2008-08-26 18:34:19 +07:00
|
|
|
if (mp->phy != NULL)
|
|
|
|
phy_detach(mp->phy);
|
2008-06-01 05:48:39 +07:00
|
|
|
flush_scheduled_work();
|
2008-06-02 05:28:40 +07:00
|
|
|
free_netdev(mp->dev);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static void mv643xx_eth_shutdown(struct platform_device *pdev)
|
2006-01-27 15:15:30 +07:00
|
|
|
{
|
2008-06-02 05:28:40 +07:00
|
|
|
struct mv643xx_eth_private *mp = platform_get_drvdata(pdev);
|
2006-01-27 15:15:30 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
/* Mask all interrupts on ethernet port */
|
2008-11-20 18:57:36 +07:00
|
|
|
wrlp(mp, INT_MASK, 0);
|
|
|
|
rdlp(mp, INT_MASK);
|
2008-06-01 05:48:39 +07:00
|
|
|
|
2008-06-02 05:28:40 +07:00
|
|
|
if (netif_running(mp->dev))
|
|
|
|
port_reset(mp);
|
2006-01-27 15:15:30 +07:00
|
|
|
}
|
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
static struct platform_driver mv643xx_eth_driver = {
|
2008-06-02 05:28:40 +07:00
|
|
|
.probe = mv643xx_eth_probe,
|
|
|
|
.remove = mv643xx_eth_remove,
|
|
|
|
.shutdown = mv643xx_eth_shutdown,
|
2008-06-01 05:48:39 +07:00
|
|
|
.driver = {
|
2008-06-02 05:28:40 +07:00
|
|
|
.name = MV643XX_ETH_NAME,
|
2008-06-01 05:48:39 +07:00
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static int __init mv643xx_eth_init_module(void)
|
2006-01-27 15:15:30 +07:00
|
|
|
{
|
2008-06-01 05:48:39 +07:00
|
|
|
int rc;
|
2006-01-27 15:15:30 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
rc = platform_driver_register(&mv643xx_eth_shared_driver);
|
|
|
|
if (!rc) {
|
|
|
|
rc = platform_driver_register(&mv643xx_eth_driver);
|
|
|
|
if (rc)
|
|
|
|
platform_driver_unregister(&mv643xx_eth_shared_driver);
|
|
|
|
}
|
2008-06-02 05:28:40 +07:00
|
|
|
|
2008-06-01 05:48:39 +07:00
|
|
|
return rc;
|
2006-01-27 15:15:30 +07:00
|
|
|
}
|
2008-06-02 05:28:40 +07:00
|
|
|
module_init(mv643xx_eth_init_module);
|
2006-01-27 15:15:30 +07:00
|
|
|
|
2008-06-01 07:18:13 +07:00
|
|
|
static void __exit mv643xx_eth_cleanup_module(void)
|
2006-01-27 15:15:30 +07:00
|
|
|
{
|
2008-06-01 05:48:39 +07:00
|
|
|
platform_driver_unregister(&mv643xx_eth_driver);
|
|
|
|
platform_driver_unregister(&mv643xx_eth_shared_driver);
|
2006-01-27 15:15:30 +07:00
|
|
|
}
|
2008-06-01 07:18:13 +07:00
|
|
|
module_exit(mv643xx_eth_cleanup_module);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2008-06-02 07:02:30 +07:00
|
|
|
MODULE_AUTHOR("Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, "
|
|
|
|
"Manish Lachwani, Dale Farnsworth and Lennert Buytenhek");
|
2008-06-01 05:48:39 +07:00
|
|
|
MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
|
2008-06-02 05:28:40 +07:00
|
|
|
MODULE_LICENSE("GPL");
|
2008-06-01 05:48:39 +07:00
|
|
|
MODULE_ALIAS("platform:" MV643XX_ETH_SHARED_NAME);
|
2008-06-02 05:28:40 +07:00
|
|
|
MODULE_ALIAS("platform:" MV643XX_ETH_NAME);
|