2019-05-19 19:07:45 +07:00
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# SPDX-License-Identifier: GPL-2.0-only
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pinctrl: pxa: pxa2xx: add pin control skeleton
Add a pincontrol driver for pxa2xx architecture, encompassing all pxa25x
and pxa27x variants. This is only the pin muxing part of the driver.
One specific consideration is also the memory space (MMIO), which is
intertwined with the GPIO registers. To make things worse, the GPIO
direction register also affect pin muxing, as it chooses the "kind" of
pin, ie. the 4 output functions or 4 input functions.
The mapping between pinctrl notions and PXA Technical Reference Manual
is as follows :
- a pin is obviously a pin
- a group is also a pin, ie. group P101 is the pin 101
- a mux function is an alternate function
(ie. gpio-in, gpio-out, MMCLK, BTRTS, etc ...)
The individual architecture (pxa27x, pxa25x) instantiate a pin control
by providing a table of pins, each pin being provided a list of
PXA_FUNCTION (alternate functions).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-22 01:04:49 +07:00
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if (ARCH_PXA || COMPILE_TEST)
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config PINCTRL_PXA
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bool
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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2016-04-11 02:39:51 +07:00
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config PINCTRL_PXA25X
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tristate "Marvell PXA25x pin controller driver"
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select PINCTRL_PXA
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default y if PXA25x
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help
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This is the pinctrl, pinmux, pinconf driver for the Marvell
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PXA2xx block found in the pxa25x platforms.
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2015-11-22 01:04:52 +07:00
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config PINCTRL_PXA27X
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tristate "Marvell PXA27x pin controller driver"
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select PINCTRL_PXA
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default y if PXA27x
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help
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This is the pinctrl, pinmux, pinconf driver for the Marvell
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2016-04-11 02:39:51 +07:00
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PXA2xx block found in the pxa27x platforms.
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2015-11-22 01:04:52 +07:00
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pinctrl: pxa: pxa2xx: add pin control skeleton
Add a pincontrol driver for pxa2xx architecture, encompassing all pxa25x
and pxa27x variants. This is only the pin muxing part of the driver.
One specific consideration is also the memory space (MMIO), which is
intertwined with the GPIO registers. To make things worse, the GPIO
direction register also affect pin muxing, as it chooses the "kind" of
pin, ie. the 4 output functions or 4 input functions.
The mapping between pinctrl notions and PXA Technical Reference Manual
is as follows :
- a pin is obviously a pin
- a group is also a pin, ie. group P101 is the pin 101
- a mux function is an alternate function
(ie. gpio-in, gpio-out, MMCLK, BTRTS, etc ...)
The individual architecture (pxa27x, pxa25x) instantiate a pin control
by providing a table of pins, each pin being provided a list of
PXA_FUNCTION (alternate functions).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-22 01:04:49 +07:00
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endif
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