2009-10-30 12:47:10 +07:00
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/*
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* Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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* Kevin Wolf <mail@kevin-wolf.de>
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*
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* Description:
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* This file is derived from arch/powerpc/kvm/44x.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/kvm_host.h>
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#include <linux/err.h>
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2011-05-27 21:46:24 +07:00
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#include <linux/export.h>
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2010-04-27 12:49:17 +07:00
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#include <linux/slab.h>
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2013-12-09 19:53:42 +07:00
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#include <linux/module.h>
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#include <linux/miscdevice.h>
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2009-10-30 12:47:10 +07:00
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#include <asm/reg.h>
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#include <asm/cputable.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/mmu_context.h>
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2011-06-29 07:16:42 +07:00
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#include <asm/page.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 15:04:11 +07:00
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#include <linux/gfp.h>
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2009-10-30 12:47:10 +07:00
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#include <linux/sched.h>
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#include <linux/vmalloc.h>
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2010-03-25 03:48:32 +07:00
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#include <linux/highmem.h>
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2009-10-30 12:47:10 +07:00
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2013-10-07 23:48:01 +07:00
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#include "book3s.h"
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2011-06-29 07:17:33 +07:00
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#include "trace.h"
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2009-10-30 12:47:10 +07:00
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#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
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/* #define EXIT_DEBUG */
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2010-04-16 05:11:53 +07:00
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2009-10-30 12:47:10 +07:00
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ "exits", VCPU_STAT(sum_exits) },
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{ "mmio", VCPU_STAT(mmio_exits) },
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{ "sig", VCPU_STAT(signal_exits) },
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{ "sysc", VCPU_STAT(syscall_exits) },
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{ "inst_emu", VCPU_STAT(emulated_inst_exits) },
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{ "dec", VCPU_STAT(dec_exits) },
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{ "ext_intr", VCPU_STAT(ext_intr_exits) },
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{ "queue_intr", VCPU_STAT(queue_intr) },
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kvm: add halt_poll_ns module parameter
This patch introduces a new module parameter for the KVM module; when it
is present, KVM attempts a bit of polling on every HLT before scheduling
itself out via kvm_vcpu_block.
This parameter helps a lot for latency-bound workloads---in particular
I tested it with O_DSYNC writes with a battery-backed disk in the host.
In this case, writes are fast (because the data doesn't have to go all
the way to the platters) but they cannot be merged by either the host or
the guest. KVM's performance here is usually around 30% of bare metal,
or 50% if you use cache=directsync or cache=writethrough (these
parameters avoid that the guest sends pointless flush requests, and
at the same time they are not slow because of the battery-backed cache).
The bad performance happens because on every halt the host CPU decides
to halt itself too. When the interrupt comes, the vCPU thread is then
migrated to a new physical CPU, and in general the latency is horrible
because the vCPU thread has to be scheduled back in.
With this patch performance reaches 60-65% of bare metal and, more
important, 99% of what you get if you use idle=poll in the guest. This
means that the tunable gets rid of this particular bottleneck, and more
work can be done to improve performance in the kernel or QEMU.
Of course there is some price to pay; every time an otherwise idle vCPUs
is interrupted by an interrupt, it will poll unnecessarily and thus
impose a little load on the host. The above results were obtained with
a mostly random value of the parameter (500000), and the load was around
1.5-2.5% CPU usage on one of the host's core for each idle guest vCPU.
The patch also adds a new stat, /sys/kernel/debug/kvm/halt_successful_poll,
that can be used to tune the parameter. It counts how many HLT
instructions received an interrupt during the polling period; each
successful poll avoids that Linux schedules the VCPU thread out and back
in, and may also avoid a likely trip to C1 and back for the physical CPU.
While the VM is idle, a Linux 4 VCPU VM halts around 10 times per second.
Of these halts, almost all are failed polls. During the benchmark,
instead, basically all halts end within the polling period, except a more
or less constant stream of 50 per second coming from vCPUs that are not
running the benchmark. The wasted time is thus very low. Things may
be slightly different for Windows VMs, which have a ~10 ms timer tick.
The effect is also visible on Marcelo's recently-introduced latency
test for the TSC deadline timer. Though of course a non-RT kernel has
awful latency bounds, the latency of the timer is around 8000-10000 clock
cycles compared to 20000-120000 without setting halt_poll_ns. For the TSC
deadline timer, thus, the effect is both a smaller average latency and
a smaller variance.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-02-05 00:20:58 +07:00
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{ "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
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2015-09-15 23:27:57 +07:00
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{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
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2009-10-30 12:47:10 +07:00
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{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
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{ "pf_storage", VCPU_STAT(pf_storage) },
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{ "sp_storage", VCPU_STAT(sp_storage) },
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{ "pf_instruc", VCPU_STAT(pf_instruc) },
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{ "sp_instruc", VCPU_STAT(sp_instruc) },
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{ "ld", VCPU_STAT(ld) },
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{ "ld_slow", VCPU_STAT(ld_slow) },
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{ "st", VCPU_STAT(st) },
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{ "st_slow", VCPU_STAT(st_slow) },
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{ NULL }
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};
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2014-07-11 07:58:58 +07:00
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void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
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{
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if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
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ulong pc = kvmppc_get_pc(vcpu);
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if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
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kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
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vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
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}
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}
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EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
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2013-10-07 23:47:56 +07:00
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static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
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{
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2013-10-07 23:48:02 +07:00
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if (!is_kvmppc_hv_enabled(vcpu->kvm))
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2013-10-07 23:47:56 +07:00
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return to_book3s(vcpu)->hior;
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return 0;
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}
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static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
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unsigned long pending_now, unsigned long old_pending)
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{
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2013-10-07 23:48:02 +07:00
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if (is_kvmppc_hv_enabled(vcpu->kvm))
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2013-10-07 23:47:56 +07:00
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return;
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if (pending_now)
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2014-04-24 18:46:24 +07:00
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kvmppc_set_int_pending(vcpu, 1);
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2013-10-07 23:47:56 +07:00
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else if (old_pending)
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2014-04-24 18:46:24 +07:00
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kvmppc_set_int_pending(vcpu, 0);
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2013-10-07 23:47:56 +07:00
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}
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static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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{
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ulong crit_raw;
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ulong crit_r1;
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bool crit;
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2013-10-07 23:48:02 +07:00
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if (is_kvmppc_hv_enabled(vcpu->kvm))
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2013-10-07 23:47:56 +07:00
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return false;
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2014-04-24 18:46:24 +07:00
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crit_raw = kvmppc_get_critical(vcpu);
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2013-10-07 23:47:56 +07:00
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crit_r1 = kvmppc_get_gpr(vcpu, 1);
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/* Truncate crit indicators in 32 bit mode */
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2014-04-24 18:46:24 +07:00
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if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
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2013-10-07 23:47:56 +07:00
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crit_raw &= 0xffffffff;
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crit_r1 &= 0xffffffff;
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}
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/* Critical section when crit == r1 */
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crit = (crit_raw == crit_r1);
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/* ... and we're in supervisor mode */
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2014-04-24 18:46:24 +07:00
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crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
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2013-10-07 23:47:56 +07:00
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return crit;
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}
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2009-10-30 12:47:10 +07:00
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void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
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{
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2014-07-11 07:58:58 +07:00
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kvmppc_unfixup_split_real(vcpu);
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2014-04-24 18:46:24 +07:00
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kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
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kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags);
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2011-06-29 07:17:58 +07:00
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kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
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2009-10-30 12:47:10 +07:00
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vcpu->arch.mmu.reset_msr(vcpu);
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}
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2009-12-22 02:21:23 +07:00
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static int kvmppc_book3s_vec2irqprio(unsigned int vec)
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2009-10-30 12:47:10 +07:00
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{
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unsigned int prio;
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switch (vec) {
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case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
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case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
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case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
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case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
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case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
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case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
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case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
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2010-08-30 15:44:15 +07:00
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case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break;
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2009-10-30 12:47:10 +07:00
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case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
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case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
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case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
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case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
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case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
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case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
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case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
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case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
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2014-04-29 21:48:44 +07:00
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case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
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2009-10-30 12:47:10 +07:00
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default: prio = BOOK3S_IRQPRIO_MAX; break;
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}
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2009-12-22 02:21:23 +07:00
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return prio;
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}
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2013-04-18 03:30:26 +07:00
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void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
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2009-12-22 02:21:24 +07:00
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unsigned int vec)
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{
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2011-06-29 07:17:58 +07:00
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unsigned long old_pending = vcpu->arch.pending_exceptions;
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2009-12-22 02:21:24 +07:00
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clear_bit(kvmppc_book3s_vec2irqprio(vec),
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&vcpu->arch.pending_exceptions);
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2010-08-05 17:24:40 +07:00
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2011-06-29 07:17:58 +07:00
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kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
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old_pending);
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2009-12-22 02:21:24 +07:00
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}
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2009-12-22 02:21:23 +07:00
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void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
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{
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vcpu->stat.queue_intr++;
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set_bit(kvmppc_book3s_vec2irqprio(vec),
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&vcpu->arch.pending_exceptions);
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2009-10-30 12:47:10 +07:00
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#ifdef EXIT_DEBUG
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printk(KERN_INFO "Queueing interrupt %x\n", vec);
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#endif
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}
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2013-10-07 23:47:59 +07:00
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EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
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2009-10-30 12:47:10 +07:00
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2010-01-08 08:58:07 +07:00
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void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
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2009-10-30 12:47:10 +07:00
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{
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2011-06-29 07:18:52 +07:00
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/* might as well deliver this straight away */
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kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
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2009-10-30 12:47:10 +07:00
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}
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2013-10-07 23:47:59 +07:00
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EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
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2009-10-30 12:47:10 +07:00
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void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
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}
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2013-10-07 23:47:59 +07:00
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EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
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2009-10-30 12:47:10 +07:00
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int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
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{
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2011-05-11 07:38:50 +07:00
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return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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2009-10-30 12:47:10 +07:00
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}
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2013-10-07 23:47:59 +07:00
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EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
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2009-10-30 12:47:10 +07:00
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2009-12-22 02:21:24 +07:00
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void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
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{
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|
|
kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
|
|
|
|
}
|
2013-10-07 23:47:59 +07:00
|
|
|
EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
|
2009-12-22 02:21:24 +07:00
|
|
|
|
2009-10-30 12:47:10 +07:00
|
|
|
void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_interrupt *irq)
|
|
|
|
{
|
2010-08-30 15:44:15 +07:00
|
|
|
unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
|
|
|
|
|
|
|
|
if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
|
|
|
|
vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
|
|
|
|
|
|
|
|
kvmppc_book3s_queue_irqprio(vcpu, vec);
|
2009-10-30 12:47:10 +07:00
|
|
|
}
|
|
|
|
|
2013-02-14 21:00:25 +07:00
|
|
|
void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
|
2010-03-25 03:48:18 +07:00
|
|
|
{
|
|
|
|
kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
|
2010-08-30 15:44:15 +07:00
|
|
|
kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
|
2010-03-25 03:48:18 +07:00
|
|
|
}
|
|
|
|
|
2014-06-19 02:56:55 +07:00
|
|
|
void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
|
|
|
|
ulong flags)
|
|
|
|
{
|
|
|
|
kvmppc_set_dar(vcpu, dar);
|
|
|
|
kvmppc_set_dsisr(vcpu, flags);
|
|
|
|
kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
|
|
|
|
{
|
|
|
|
u64 msr = kvmppc_get_msr(vcpu);
|
|
|
|
msr &= ~(SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
|
|
|
|
msr |= flags & (SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
|
|
|
|
kvmppc_set_msr_fast(vcpu, msr);
|
|
|
|
kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
|
|
|
|
}
|
|
|
|
|
2015-05-22 14:25:02 +07:00
|
|
|
static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
|
|
|
|
unsigned int priority)
|
2009-10-30 12:47:10 +07:00
|
|
|
{
|
|
|
|
int deliver = 1;
|
|
|
|
int vec = 0;
|
2011-06-29 07:17:58 +07:00
|
|
|
bool crit = kvmppc_critical_section(vcpu);
|
2009-10-30 12:47:10 +07:00
|
|
|
|
|
|
|
switch (priority) {
|
|
|
|
case BOOK3S_IRQPRIO_DECREMENTER:
|
2014-04-24 18:46:24 +07:00
|
|
|
deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
|
2009-10-30 12:47:10 +07:00
|
|
|
vec = BOOK3S_INTERRUPT_DECREMENTER;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_EXTERNAL:
|
2010-08-30 15:44:15 +07:00
|
|
|
case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
|
2014-04-24 18:46:24 +07:00
|
|
|
deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
|
2009-10-30 12:47:10 +07:00
|
|
|
vec = BOOK3S_INTERRUPT_EXTERNAL;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_SYSTEM_RESET:
|
|
|
|
vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_MACHINE_CHECK:
|
|
|
|
vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_DATA_STORAGE:
|
|
|
|
vec = BOOK3S_INTERRUPT_DATA_STORAGE;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_INST_STORAGE:
|
|
|
|
vec = BOOK3S_INTERRUPT_INST_STORAGE;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_DATA_SEGMENT:
|
|
|
|
vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_INST_SEGMENT:
|
|
|
|
vec = BOOK3S_INTERRUPT_INST_SEGMENT;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_ALIGNMENT:
|
|
|
|
vec = BOOK3S_INTERRUPT_ALIGNMENT;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_PROGRAM:
|
|
|
|
vec = BOOK3S_INTERRUPT_PROGRAM;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_VSX:
|
|
|
|
vec = BOOK3S_INTERRUPT_VSX;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_ALTIVEC:
|
|
|
|
vec = BOOK3S_INTERRUPT_ALTIVEC;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_FP_UNAVAIL:
|
|
|
|
vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_SYSCALL:
|
|
|
|
vec = BOOK3S_INTERRUPT_SYSCALL;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_DEBUG:
|
|
|
|
vec = BOOK3S_INTERRUPT_TRACE;
|
|
|
|
break;
|
|
|
|
case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
|
|
|
|
vec = BOOK3S_INTERRUPT_PERFMON;
|
|
|
|
break;
|
2014-04-29 21:48:44 +07:00
|
|
|
case BOOK3S_IRQPRIO_FAC_UNAVAIL:
|
|
|
|
vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
|
|
|
|
break;
|
2009-10-30 12:47:10 +07:00
|
|
|
default:
|
|
|
|
deliver = 0;
|
|
|
|
printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (deliver)
|
2011-06-29 07:18:52 +07:00
|
|
|
kvmppc_inject_interrupt(vcpu, vec, 0);
|
2009-10-30 12:47:10 +07:00
|
|
|
|
|
|
|
return deliver;
|
|
|
|
}
|
|
|
|
|
2010-08-30 15:44:15 +07:00
|
|
|
/*
|
|
|
|
* This function determines if an irqprio should be cleared once issued.
|
|
|
|
*/
|
|
|
|
static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
|
|
|
|
{
|
|
|
|
switch (priority) {
|
|
|
|
case BOOK3S_IRQPRIO_DECREMENTER:
|
|
|
|
/* DEC interrupts get cleared by mtdec */
|
|
|
|
return false;
|
|
|
|
case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
|
|
|
|
/* External interrupts get cleared by userspace */
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2012-02-16 21:07:37 +07:00
|
|
|
int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
|
2009-10-30 12:47:10 +07:00
|
|
|
{
|
|
|
|
unsigned long *pending = &vcpu->arch.pending_exceptions;
|
2010-07-29 19:47:51 +07:00
|
|
|
unsigned long old_pending = vcpu->arch.pending_exceptions;
|
2009-10-30 12:47:10 +07:00
|
|
|
unsigned int priority;
|
|
|
|
|
|
|
|
#ifdef EXIT_DEBUG
|
|
|
|
if (vcpu->arch.pending_exceptions)
|
|
|
|
printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
|
|
|
|
#endif
|
|
|
|
priority = __ffs(*pending);
|
2010-04-16 05:11:56 +07:00
|
|
|
while (priority < BOOK3S_IRQPRIO_MAX) {
|
2009-12-22 02:21:24 +07:00
|
|
|
if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
|
2010-08-30 15:44:15 +07:00
|
|
|
clear_irqprio(vcpu, priority)) {
|
2009-10-30 12:47:10 +07:00
|
|
|
clear_bit(priority, &vcpu->arch.pending_exceptions);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
priority = find_next_bit(pending,
|
|
|
|
BITS_PER_BYTE * sizeof(*pending),
|
|
|
|
priority + 1);
|
|
|
|
}
|
2010-07-29 19:47:51 +07:00
|
|
|
|
|
|
|
/* Tell the guest about our interrupt status */
|
2011-06-29 07:17:58 +07:00
|
|
|
kvmppc_update_int_pending(vcpu, *pending, old_pending);
|
2012-02-16 21:07:37 +07:00
|
|
|
|
|
|
|
return 0;
|
2009-10-30 12:47:10 +07:00
|
|
|
}
|
2013-10-07 23:47:59 +07:00
|
|
|
EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
|
2009-10-30 12:47:10 +07:00
|
|
|
|
2014-07-13 21:37:12 +07:00
|
|
|
pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
|
KVM: PPC: Book3S PR: Better handling of host-side read-only pages
Currently we request write access to all pages that get mapped into the
guest, even if the guest is only loading from the page. This reduces
the effectiveness of KSM because it means that we unshare every page we
access. Also, we always set the changed (C) bit in the guest HPTE if
it allows writing, even for a guest load.
This fixes both these problems. We pass an 'iswrite' flag to the
mmu.xlate() functions and to kvmppc_mmu_map_page() to indicate whether
the access is a load or a store. The mmu.xlate() functions now only
set C for stores. kvmppc_gfn_to_pfn() now calls gfn_to_pfn_prot()
instead of gfn_to_pfn() so that it can indicate whether we need write
access to the page, and get back a 'writable' flag to indicate whether
the page is writable or not. If that 'writable' flag is clear, we then
make the host HPTE read-only even if the guest HPTE allowed writing.
This means that we can get a protection fault when the guest writes to a
page that it has mapped read-write but which is read-only on the host
side (perhaps due to KSM having merged the page). Thus we now call
kvmppc_handle_pagefault() for protection faults as well as HPTE not found
faults. In kvmppc_handle_pagefault(), if the access was allowed by the
guest HPTE and we thus need to install a new host HPTE, we then need to
remove the old host HPTE if there is one. This is done with a new
function, kvmppc_mmu_unmap_page(), which uses kvmppc_mmu_pte_vflush() to
find and remove the old host HPTE.
Since the memslot-related functions require the KVM SRCU read lock to
be held, this adds srcu_read_lock/unlock pairs around the calls to
kvmppc_handle_pagefault().
Finally, this changes kvmppc_mmu_book3s_32_xlate_pte() to not ignore
guest HPTEs that don't permit access, and to return -EPERM for accesses
that are not permitted by the page protections.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-20 11:52:51 +07:00
|
|
|
bool *writable)
|
2010-07-29 19:47:54 +07:00
|
|
|
{
|
2014-07-13 21:37:12 +07:00
|
|
|
ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
|
|
|
|
gfn_t gfn = gpa >> PAGE_SHIFT;
|
2010-07-29 19:47:54 +07:00
|
|
|
|
2014-04-24 18:46:24 +07:00
|
|
|
if (!(kvmppc_get_msr(vcpu) & MSR_SF))
|
2012-03-14 04:52:44 +07:00
|
|
|
mp_pa = (uint32_t)mp_pa;
|
|
|
|
|
2010-07-29 19:47:54 +07:00
|
|
|
/* Magic page override */
|
2014-07-13 21:37:12 +07:00
|
|
|
gpa &= ~0xFFFULL;
|
|
|
|
if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
|
2010-07-29 19:47:54 +07:00
|
|
|
ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
|
|
|
|
pfn_t pfn;
|
|
|
|
|
|
|
|
pfn = (pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
|
|
|
|
get_page(pfn_to_page(pfn));
|
KVM: PPC: Book3S PR: Better handling of host-side read-only pages
Currently we request write access to all pages that get mapped into the
guest, even if the guest is only loading from the page. This reduces
the effectiveness of KSM because it means that we unshare every page we
access. Also, we always set the changed (C) bit in the guest HPTE if
it allows writing, even for a guest load.
This fixes both these problems. We pass an 'iswrite' flag to the
mmu.xlate() functions and to kvmppc_mmu_map_page() to indicate whether
the access is a load or a store. The mmu.xlate() functions now only
set C for stores. kvmppc_gfn_to_pfn() now calls gfn_to_pfn_prot()
instead of gfn_to_pfn() so that it can indicate whether we need write
access to the page, and get back a 'writable' flag to indicate whether
the page is writable or not. If that 'writable' flag is clear, we then
make the host HPTE read-only even if the guest HPTE allowed writing.
This means that we can get a protection fault when the guest writes to a
page that it has mapped read-write but which is read-only on the host
side (perhaps due to KSM having merged the page). Thus we now call
kvmppc_handle_pagefault() for protection faults as well as HPTE not found
faults. In kvmppc_handle_pagefault(), if the access was allowed by the
guest HPTE and we thus need to install a new host HPTE, we then need to
remove the old host HPTE if there is one. This is done with a new
function, kvmppc_mmu_unmap_page(), which uses kvmppc_mmu_pte_vflush() to
find and remove the old host HPTE.
Since the memslot-related functions require the KVM SRCU read lock to
be held, this adds srcu_read_lock/unlock pairs around the calls to
kvmppc_handle_pagefault().
Finally, this changes kvmppc_mmu_book3s_32_xlate_pte() to not ignore
guest HPTEs that don't permit access, and to return -EPERM for accesses
that are not permitted by the page protections.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-20 11:52:51 +07:00
|
|
|
if (writable)
|
|
|
|
*writable = true;
|
2010-07-29 19:47:54 +07:00
|
|
|
return pfn;
|
|
|
|
}
|
|
|
|
|
KVM: PPC: Book3S PR: Better handling of host-side read-only pages
Currently we request write access to all pages that get mapped into the
guest, even if the guest is only loading from the page. This reduces
the effectiveness of KSM because it means that we unshare every page we
access. Also, we always set the changed (C) bit in the guest HPTE if
it allows writing, even for a guest load.
This fixes both these problems. We pass an 'iswrite' flag to the
mmu.xlate() functions and to kvmppc_mmu_map_page() to indicate whether
the access is a load or a store. The mmu.xlate() functions now only
set C for stores. kvmppc_gfn_to_pfn() now calls gfn_to_pfn_prot()
instead of gfn_to_pfn() so that it can indicate whether we need write
access to the page, and get back a 'writable' flag to indicate whether
the page is writable or not. If that 'writable' flag is clear, we then
make the host HPTE read-only even if the guest HPTE allowed writing.
This means that we can get a protection fault when the guest writes to a
page that it has mapped read-write but which is read-only on the host
side (perhaps due to KSM having merged the page). Thus we now call
kvmppc_handle_pagefault() for protection faults as well as HPTE not found
faults. In kvmppc_handle_pagefault(), if the access was allowed by the
guest HPTE and we thus need to install a new host HPTE, we then need to
remove the old host HPTE if there is one. This is done with a new
function, kvmppc_mmu_unmap_page(), which uses kvmppc_mmu_pte_vflush() to
find and remove the old host HPTE.
Since the memslot-related functions require the KVM SRCU read lock to
be held, this adds srcu_read_lock/unlock pairs around the calls to
kvmppc_handle_pagefault().
Finally, this changes kvmppc_mmu_book3s_32_xlate_pte() to not ignore
guest HPTEs that don't permit access, and to return -EPERM for accesses
that are not permitted by the page protections.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-20 11:52:51 +07:00
|
|
|
return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
|
2010-07-29 19:47:54 +07:00
|
|
|
}
|
2014-07-13 21:37:12 +07:00
|
|
|
EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
|
2010-07-29 19:47:54 +07:00
|
|
|
|
2014-06-20 18:52:36 +07:00
|
|
|
int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
|
|
|
|
enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
|
2009-10-30 12:47:10 +07:00
|
|
|
{
|
2014-06-20 18:52:36 +07:00
|
|
|
bool data = (xlid == XLATE_DATA);
|
|
|
|
bool iswrite = (xlrw == XLATE_WRITE);
|
2014-04-24 18:46:24 +07:00
|
|
|
int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
|
2009-10-30 12:47:10 +07:00
|
|
|
int r;
|
|
|
|
|
|
|
|
if (relocated) {
|
KVM: PPC: Book3S PR: Better handling of host-side read-only pages
Currently we request write access to all pages that get mapped into the
guest, even if the guest is only loading from the page. This reduces
the effectiveness of KSM because it means that we unshare every page we
access. Also, we always set the changed (C) bit in the guest HPTE if
it allows writing, even for a guest load.
This fixes both these problems. We pass an 'iswrite' flag to the
mmu.xlate() functions and to kvmppc_mmu_map_page() to indicate whether
the access is a load or a store. The mmu.xlate() functions now only
set C for stores. kvmppc_gfn_to_pfn() now calls gfn_to_pfn_prot()
instead of gfn_to_pfn() so that it can indicate whether we need write
access to the page, and get back a 'writable' flag to indicate whether
the page is writable or not. If that 'writable' flag is clear, we then
make the host HPTE read-only even if the guest HPTE allowed writing.
This means that we can get a protection fault when the guest writes to a
page that it has mapped read-write but which is read-only on the host
side (perhaps due to KSM having merged the page). Thus we now call
kvmppc_handle_pagefault() for protection faults as well as HPTE not found
faults. In kvmppc_handle_pagefault(), if the access was allowed by the
guest HPTE and we thus need to install a new host HPTE, we then need to
remove the old host HPTE if there is one. This is done with a new
function, kvmppc_mmu_unmap_page(), which uses kvmppc_mmu_pte_vflush() to
find and remove the old host HPTE.
Since the memslot-related functions require the KVM SRCU read lock to
be held, this adds srcu_read_lock/unlock pairs around the calls to
kvmppc_handle_pagefault().
Finally, this changes kvmppc_mmu_book3s_32_xlate_pte() to not ignore
guest HPTEs that don't permit access, and to return -EPERM for accesses
that are not permitted by the page protections.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-20 11:52:51 +07:00
|
|
|
r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
|
2009-10-30 12:47:10 +07:00
|
|
|
} else {
|
|
|
|
pte->eaddr = eaddr;
|
2010-07-29 19:47:52 +07:00
|
|
|
pte->raddr = eaddr & KVM_PAM;
|
2010-03-25 03:48:17 +07:00
|
|
|
pte->vpage = VSID_REAL | eaddr >> 12;
|
2009-10-30 12:47:10 +07:00
|
|
|
pte->may_read = true;
|
|
|
|
pte->may_write = true;
|
|
|
|
pte->may_execute = true;
|
|
|
|
r = 0;
|
2014-07-11 07:58:58 +07:00
|
|
|
|
|
|
|
if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
|
|
|
|
!data) {
|
|
|
|
if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
|
|
|
|
((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
|
|
|
|
pte->raddr &= ~SPLIT_HACK_MASK;
|
|
|
|
}
|
2009-10-30 12:47:10 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
2014-07-23 23:06:21 +07:00
|
|
|
int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type,
|
|
|
|
u32 *inst)
|
|
|
|
{
|
|
|
|
ulong pc = kvmppc_get_pc(vcpu);
|
|
|
|
int r;
|
|
|
|
|
|
|
|
if (type == INST_SC)
|
|
|
|
pc -= 4;
|
|
|
|
|
|
|
|
r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
|
|
|
|
if (r == EMULATE_DONE)
|
|
|
|
return r;
|
|
|
|
else
|
|
|
|
return EMULATE_AGAIN;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
|
|
|
|
|
2009-10-30 12:47:10 +07:00
|
|
|
int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-08-09 03:38:19 +07:00
|
|
|
int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2013-10-07 23:47:53 +07:00
|
|
|
int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_sregs *sregs)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_sregs *sregs)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
2009-10-30 12:47:10 +07:00
|
|
|
int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2010-04-16 05:11:40 +07:00
|
|
|
regs->pc = kvmppc_get_pc(vcpu);
|
2010-01-08 08:58:02 +07:00
|
|
|
regs->cr = kvmppc_get_cr(vcpu);
|
2010-04-16 05:11:40 +07:00
|
|
|
regs->ctr = kvmppc_get_ctr(vcpu);
|
|
|
|
regs->lr = kvmppc_get_lr(vcpu);
|
2010-01-08 08:58:02 +07:00
|
|
|
regs->xer = kvmppc_get_xer(vcpu);
|
2014-04-24 18:46:24 +07:00
|
|
|
regs->msr = kvmppc_get_msr(vcpu);
|
|
|
|
regs->srr0 = kvmppc_get_srr0(vcpu);
|
|
|
|
regs->srr1 = kvmppc_get_srr1(vcpu);
|
2009-10-30 12:47:10 +07:00
|
|
|
regs->pid = vcpu->arch.pid;
|
2014-04-24 18:46:24 +07:00
|
|
|
regs->sprg0 = kvmppc_get_sprg0(vcpu);
|
|
|
|
regs->sprg1 = kvmppc_get_sprg1(vcpu);
|
|
|
|
regs->sprg2 = kvmppc_get_sprg2(vcpu);
|
|
|
|
regs->sprg3 = kvmppc_get_sprg3(vcpu);
|
|
|
|
regs->sprg4 = kvmppc_get_sprg4(vcpu);
|
|
|
|
regs->sprg5 = kvmppc_get_sprg5(vcpu);
|
|
|
|
regs->sprg6 = kvmppc_get_sprg6(vcpu);
|
|
|
|
regs->sprg7 = kvmppc_get_sprg7(vcpu);
|
2009-10-30 12:47:10 +07:00
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
2010-01-08 08:58:01 +07:00
|
|
|
regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
|
2009-10-30 12:47:10 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2010-04-16 05:11:40 +07:00
|
|
|
kvmppc_set_pc(vcpu, regs->pc);
|
2010-01-08 08:58:02 +07:00
|
|
|
kvmppc_set_cr(vcpu, regs->cr);
|
2010-04-16 05:11:40 +07:00
|
|
|
kvmppc_set_ctr(vcpu, regs->ctr);
|
|
|
|
kvmppc_set_lr(vcpu, regs->lr);
|
2010-01-08 08:58:02 +07:00
|
|
|
kvmppc_set_xer(vcpu, regs->xer);
|
2009-10-30 12:47:10 +07:00
|
|
|
kvmppc_set_msr(vcpu, regs->msr);
|
2014-04-24 18:46:24 +07:00
|
|
|
kvmppc_set_srr0(vcpu, regs->srr0);
|
|
|
|
kvmppc_set_srr1(vcpu, regs->srr1);
|
|
|
|
kvmppc_set_sprg0(vcpu, regs->sprg0);
|
|
|
|
kvmppc_set_sprg1(vcpu, regs->sprg1);
|
|
|
|
kvmppc_set_sprg2(vcpu, regs->sprg2);
|
|
|
|
kvmppc_set_sprg3(vcpu, regs->sprg3);
|
|
|
|
kvmppc_set_sprg4(vcpu, regs->sprg4);
|
|
|
|
kvmppc_set_sprg5(vcpu, regs->sprg5);
|
|
|
|
kvmppc_set_sprg6(vcpu, regs->sprg6);
|
|
|
|
kvmppc_set_sprg7(vcpu, regs->sprg7);
|
2009-10-30 12:47:10 +07:00
|
|
|
|
2010-01-08 08:58:01 +07:00
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
|
|
|
kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
|
2009-10-30 12:47:10 +07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
|
|
{
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
|
|
{
|
|
|
|
return -ENOTSUPP;
|
|
|
|
}
|
|
|
|
|
2014-08-20 20:36:24 +07:00
|
|
|
int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
|
|
|
|
union kvmppc_one_reg *val)
|
2012-09-26 03:31:56 +07:00
|
|
|
{
|
2014-08-20 20:36:24 +07:00
|
|
|
int r = 0;
|
2012-09-26 03:32:30 +07:00
|
|
|
long int i;
|
2012-09-26 03:31:56 +07:00
|
|
|
|
2014-08-20 20:36:24 +07:00
|
|
|
r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
|
2012-09-26 03:31:56 +07:00
|
|
|
if (r == -EINVAL) {
|
|
|
|
r = 0;
|
2014-08-20 20:36:24 +07:00
|
|
|
switch (id) {
|
2012-09-26 03:31:56 +07:00
|
|
|
case KVM_REG_PPC_DAR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, kvmppc_get_dar(vcpu));
|
2012-09-26 03:31:56 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_DSISR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
|
2012-09-26 03:31:56 +07:00
|
|
|
break;
|
2012-09-26 03:32:30 +07:00
|
|
|
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
|
2014-08-20 20:36:24 +07:00
|
|
|
i = id - KVM_REG_PPC_FPR0;
|
|
|
|
*val = get_reg_val(id, VCPU_FPR(vcpu, i));
|
2012-09-26 03:32:30 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_FPSCR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.fp.fpscr);
|
2012-09-26 03:32:30 +07:00
|
|
|
break;
|
2013-10-15 16:43:02 +07:00
|
|
|
#ifdef CONFIG_VSX
|
|
|
|
case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
|
|
|
|
if (cpu_has_feature(CPU_FTR_VSX)) {
|
2014-08-20 20:36:24 +07:00
|
|
|
i = id - KVM_REG_PPC_VSR0;
|
|
|
|
val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
|
|
|
|
val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
|
2013-10-15 16:43:02 +07:00
|
|
|
} else {
|
|
|
|
r = -ENXIO;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
#endif /* CONFIG_VSX */
|
2014-08-20 20:36:24 +07:00
|
|
|
case KVM_REG_PPC_DEBUG_INST:
|
|
|
|
*val = get_reg_val(id, INS_TW);
|
2013-03-21 03:24:58 +07:00
|
|
|
break;
|
2013-04-18 03:32:26 +07:00
|
|
|
#ifdef CONFIG_KVM_XICS
|
|
|
|
case KVM_REG_PPC_ICP_STATE:
|
|
|
|
if (!vcpu->arch.icp) {
|
|
|
|
r = -ENXIO;
|
|
|
|
break;
|
|
|
|
}
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
|
2013-04-18 03:32:26 +07:00
|
|
|
break;
|
|
|
|
#endif /* CONFIG_KVM_XICS */
|
2014-04-29 21:48:44 +07:00
|
|
|
case KVM_REG_PPC_FSCR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.fscr);
|
2014-04-29 21:48:44 +07:00
|
|
|
break;
|
2014-04-22 17:26:58 +07:00
|
|
|
case KVM_REG_PPC_TAR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.tar);
|
2014-04-22 17:26:58 +07:00
|
|
|
break;
|
2014-04-29 18:36:21 +07:00
|
|
|
case KVM_REG_PPC_EBBHR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.ebbhr);
|
2014-04-29 18:36:21 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_EBBRR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.ebbrr);
|
2014-04-29 18:36:21 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_BESCR:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.bescr);
|
2014-04-29 18:36:21 +07:00
|
|
|
break;
|
2014-06-05 19:08:02 +07:00
|
|
|
case KVM_REG_PPC_VTB:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.vtb);
|
2014-06-05 19:08:02 +07:00
|
|
|
break;
|
2014-06-05 19:08:05 +07:00
|
|
|
case KVM_REG_PPC_IC:
|
2014-08-20 20:36:24 +07:00
|
|
|
*val = get_reg_val(id, vcpu->arch.ic);
|
2014-06-05 19:08:05 +07:00
|
|
|
break;
|
2012-09-26 03:31:56 +07:00
|
|
|
default:
|
|
|
|
r = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
2014-08-20 20:36:24 +07:00
|
|
|
int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
|
|
|
|
union kvmppc_one_reg *val)
|
2012-09-26 03:31:56 +07:00
|
|
|
{
|
2014-08-20 20:36:24 +07:00
|
|
|
int r = 0;
|
2012-09-26 03:32:30 +07:00
|
|
|
long int i;
|
2012-09-26 03:31:56 +07:00
|
|
|
|
2014-08-20 20:36:24 +07:00
|
|
|
r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
|
2012-09-26 03:31:56 +07:00
|
|
|
if (r == -EINVAL) {
|
|
|
|
r = 0;
|
2014-08-20 20:36:24 +07:00
|
|
|
switch (id) {
|
2012-09-26 03:31:56 +07:00
|
|
|
case KVM_REG_PPC_DAR:
|
2014-08-20 20:36:24 +07:00
|
|
|
kvmppc_set_dar(vcpu, set_reg_val(id, *val));
|
2012-09-26 03:31:56 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_DSISR:
|
2014-08-20 20:36:24 +07:00
|
|
|
kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
|
2012-09-26 03:31:56 +07:00
|
|
|
break;
|
2012-09-26 03:32:30 +07:00
|
|
|
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
|
2014-08-20 20:36:24 +07:00
|
|
|
i = id - KVM_REG_PPC_FPR0;
|
|
|
|
VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
|
2012-09-26 03:32:30 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_FPSCR:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.fp.fpscr = set_reg_val(id, *val);
|
2012-09-26 03:32:30 +07:00
|
|
|
break;
|
2013-10-15 16:43:02 +07:00
|
|
|
#ifdef CONFIG_VSX
|
|
|
|
case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
|
|
|
|
if (cpu_has_feature(CPU_FTR_VSX)) {
|
2014-08-20 20:36:24 +07:00
|
|
|
i = id - KVM_REG_PPC_VSR0;
|
|
|
|
vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
|
|
|
|
vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
|
2013-10-15 16:43:02 +07:00
|
|
|
} else {
|
|
|
|
r = -ENXIO;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
#endif /* CONFIG_VSX */
|
2013-04-18 03:32:26 +07:00
|
|
|
#ifdef CONFIG_KVM_XICS
|
|
|
|
case KVM_REG_PPC_ICP_STATE:
|
|
|
|
if (!vcpu->arch.icp) {
|
|
|
|
r = -ENXIO;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
r = kvmppc_xics_set_icp(vcpu,
|
2014-08-20 20:36:24 +07:00
|
|
|
set_reg_val(id, *val));
|
2013-04-18 03:32:26 +07:00
|
|
|
break;
|
|
|
|
#endif /* CONFIG_KVM_XICS */
|
2014-04-29 21:48:44 +07:00
|
|
|
case KVM_REG_PPC_FSCR:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.fscr = set_reg_val(id, *val);
|
2014-04-29 21:48:44 +07:00
|
|
|
break;
|
2014-04-22 17:26:58 +07:00
|
|
|
case KVM_REG_PPC_TAR:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.tar = set_reg_val(id, *val);
|
2014-04-22 17:26:58 +07:00
|
|
|
break;
|
2014-04-29 18:36:21 +07:00
|
|
|
case KVM_REG_PPC_EBBHR:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.ebbhr = set_reg_val(id, *val);
|
2014-04-29 18:36:21 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_EBBRR:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.ebbrr = set_reg_val(id, *val);
|
2014-04-29 18:36:21 +07:00
|
|
|
break;
|
|
|
|
case KVM_REG_PPC_BESCR:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.bescr = set_reg_val(id, *val);
|
2014-04-29 18:36:21 +07:00
|
|
|
break;
|
2014-06-05 19:08:02 +07:00
|
|
|
case KVM_REG_PPC_VTB:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.vtb = set_reg_val(id, *val);
|
2014-06-05 19:08:02 +07:00
|
|
|
break;
|
2014-06-05 19:08:05 +07:00
|
|
|
case KVM_REG_PPC_IC:
|
2014-08-20 20:36:24 +07:00
|
|
|
vcpu->arch.ic = set_reg_val(id, *val);
|
2014-06-05 19:08:05 +07:00
|
|
|
break;
|
2012-09-26 03:31:56 +07:00
|
|
|
default:
|
|
|
|
r = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
2013-10-07 23:47:53 +07:00
|
|
|
void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
2013-10-07 23:47:59 +07:00
|
|
|
EXPORT_SYMBOL_GPL(kvmppc_set_msr);
|
2013-10-07 23:47:53 +07:00
|
|
|
|
|
|
|
int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
2009-10-30 12:47:10 +07:00
|
|
|
int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_translation *tr)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-08 07:32:12 +07:00
|
|
|
int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
|
|
|
struct kvm_guest_debug *dbg)
|
|
|
|
{
|
2014-09-10 00:07:35 +07:00
|
|
|
vcpu->guest_debug = dbg->control;
|
|
|
|
return 0;
|
2013-04-08 07:32:12 +07:00
|
|
|
}
|
|
|
|
|
2014-09-01 21:19:56 +07:00
|
|
|
void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
|
2011-11-17 19:39:59 +07:00
|
|
|
{
|
|
|
|
kvmppc_core_queue_dec(vcpu);
|
|
|
|
kvm_vcpu_kick(vcpu);
|
|
|
|
}
|
2013-10-07 23:47:53 +07:00
|
|
|
|
|
|
|
struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->vcpu_create(kvm, id);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
2013-10-07 23:48:00 +07:00
|
|
|
void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
|
2013-10-07 23:47:53 +07:00
|
|
|
struct kvm_memory_slot *dont)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
kvm->arch.kvm_ops->free_memslot(free, dont);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
2013-10-07 23:48:00 +07:00
|
|
|
int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
|
2013-10-07 23:47:53 +07:00
|
|
|
unsigned long npages)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->create_memslot(slot, npages);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvmppc_core_prepare_memory_region(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot,
|
2015-05-18 18:59:39 +07:00
|
|
|
const struct kvm_userspace_memory_region *mem)
|
2013-10-07 23:47:53 +07:00
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_core_commit_memory_region(struct kvm *kvm,
|
2015-05-18 18:59:39 +07:00
|
|
|
const struct kvm_userspace_memory_region *mem,
|
2015-05-18 18:20:23 +07:00
|
|
|
const struct kvm_memory_slot *old,
|
|
|
|
const struct kvm_memory_slot *new)
|
2013-10-07 23:47:53 +07:00
|
|
|
{
|
2015-05-18 18:20:23 +07:00
|
|
|
kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->unmap_hva(kvm, hva);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
2013-10-07 23:47:59 +07:00
|
|
|
EXPORT_SYMBOL_GPL(kvm_unmap_hva);
|
2013-10-07 23:47:53 +07:00
|
|
|
|
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
2014-09-23 04:54:42 +07:00
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
|
2013-10-07 23:47:53 +07:00
|
|
|
{
|
2014-09-23 04:54:42 +07:00
|
|
|
return kvm->arch.kvm_ops->age_hva(kvm, start, end);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvmppc_core_init_vm(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
|
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
|
|
|
|
INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
|
|
|
|
#endif
|
|
|
|
|
2013-10-07 23:48:01 +07:00
|
|
|
return kvm->arch.kvm_ops->init_vm(kvm);
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_core_destroy_vm(struct kvm *kvm)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
kvm->arch.kvm_ops->destroy_vm(kvm);
|
2013-10-07 23:47:53 +07:00
|
|
|
|
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
kvmppc_rtas_tokens_free(kvm);
|
|
|
|
WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM
On POWER, storage caching is usually configured via the MMU - attributes
such as cache-inhibited are stored in the TLB and the hashed page table.
This makes correctly performing cache inhibited IO accesses awkward when
the MMU is turned off (real mode). Some CPU models provide special
registers to control the cache attributes of real mode load and stores but
this is not at all consistent. This is a problem in particular for SLOF,
the firmware used on KVM guests, which runs entirely in real mode, but
which needs to do IO to load the kernel.
To simplify this qemu implements two special hypercalls, H_LOGICAL_CI_LOAD
and H_LOGICAL_CI_STORE which simulate a cache-inhibited load or store to
a logical address (aka guest physical address). SLOF uses these for IO.
However, because these are implemented within qemu, not the host kernel,
these bypass any IO devices emulated within KVM itself. The simplest way
to see this problem is to attempt to boot a KVM guest from a virtio-blk
device with iothread / dataplane enabled. The iothread code relies on an
in kernel implementation of the virtio queue notification, which is not
triggered by the IO hcalls, and so the guest will stall in SLOF unable to
load the guest OS.
This patch addresses this by providing in-kernel implementations of the
2 hypercalls, which correctly scan the KVM IO bus. Any access to an
address not handled by the KVM IO bus will cause a VM exit, hitting the
qemu implementation as before.
Note that a userspace change is also required, in order to enable these
new hcall implementations with KVM_CAP_PPC_ENABLE_HCALL.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-05 07:53:25 +07:00
|
|
|
int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
unsigned long size = kvmppc_get_gpr(vcpu, 4);
|
|
|
|
unsigned long addr = kvmppc_get_gpr(vcpu, 5);
|
|
|
|
u64 buf;
|
2015-09-18 13:57:28 +07:00
|
|
|
int srcu_idx;
|
kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM
On POWER, storage caching is usually configured via the MMU - attributes
such as cache-inhibited are stored in the TLB and the hashed page table.
This makes correctly performing cache inhibited IO accesses awkward when
the MMU is turned off (real mode). Some CPU models provide special
registers to control the cache attributes of real mode load and stores but
this is not at all consistent. This is a problem in particular for SLOF,
the firmware used on KVM guests, which runs entirely in real mode, but
which needs to do IO to load the kernel.
To simplify this qemu implements two special hypercalls, H_LOGICAL_CI_LOAD
and H_LOGICAL_CI_STORE which simulate a cache-inhibited load or store to
a logical address (aka guest physical address). SLOF uses these for IO.
However, because these are implemented within qemu, not the host kernel,
these bypass any IO devices emulated within KVM itself. The simplest way
to see this problem is to attempt to boot a KVM guest from a virtio-blk
device with iothread / dataplane enabled. The iothread code relies on an
in kernel implementation of the virtio queue notification, which is not
triggered by the IO hcalls, and so the guest will stall in SLOF unable to
load the guest OS.
This patch addresses this by providing in-kernel implementations of the
2 hypercalls, which correctly scan the KVM IO bus. Any access to an
address not handled by the KVM IO bus will cause a VM exit, hitting the
qemu implementation as before.
Note that a userspace change is also required, in order to enable these
new hcall implementations with KVM_CAP_PPC_ENABLE_HCALL.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-05 07:53:25 +07:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!is_power_of_2(size) || (size > sizeof(buf)))
|
|
|
|
return H_TOO_HARD;
|
|
|
|
|
2015-09-18 13:57:28 +07:00
|
|
|
srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
|
kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM
On POWER, storage caching is usually configured via the MMU - attributes
such as cache-inhibited are stored in the TLB and the hashed page table.
This makes correctly performing cache inhibited IO accesses awkward when
the MMU is turned off (real mode). Some CPU models provide special
registers to control the cache attributes of real mode load and stores but
this is not at all consistent. This is a problem in particular for SLOF,
the firmware used on KVM guests, which runs entirely in real mode, but
which needs to do IO to load the kernel.
To simplify this qemu implements two special hypercalls, H_LOGICAL_CI_LOAD
and H_LOGICAL_CI_STORE which simulate a cache-inhibited load or store to
a logical address (aka guest physical address). SLOF uses these for IO.
However, because these are implemented within qemu, not the host kernel,
these bypass any IO devices emulated within KVM itself. The simplest way
to see this problem is to attempt to boot a KVM guest from a virtio-blk
device with iothread / dataplane enabled. The iothread code relies on an
in kernel implementation of the virtio queue notification, which is not
triggered by the IO hcalls, and so the guest will stall in SLOF unable to
load the guest OS.
This patch addresses this by providing in-kernel implementations of the
2 hypercalls, which correctly scan the KVM IO bus. Any access to an
address not handled by the KVM IO bus will cause a VM exit, hitting the
qemu implementation as before.
Note that a userspace change is also required, in order to enable these
new hcall implementations with KVM_CAP_PPC_ENABLE_HCALL.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-05 07:53:25 +07:00
|
|
|
ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
|
2015-09-18 13:57:28 +07:00
|
|
|
srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
|
kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM
On POWER, storage caching is usually configured via the MMU - attributes
such as cache-inhibited are stored in the TLB and the hashed page table.
This makes correctly performing cache inhibited IO accesses awkward when
the MMU is turned off (real mode). Some CPU models provide special
registers to control the cache attributes of real mode load and stores but
this is not at all consistent. This is a problem in particular for SLOF,
the firmware used on KVM guests, which runs entirely in real mode, but
which needs to do IO to load the kernel.
To simplify this qemu implements two special hypercalls, H_LOGICAL_CI_LOAD
and H_LOGICAL_CI_STORE which simulate a cache-inhibited load or store to
a logical address (aka guest physical address). SLOF uses these for IO.
However, because these are implemented within qemu, not the host kernel,
these bypass any IO devices emulated within KVM itself. The simplest way
to see this problem is to attempt to boot a KVM guest from a virtio-blk
device with iothread / dataplane enabled. The iothread code relies on an
in kernel implementation of the virtio queue notification, which is not
triggered by the IO hcalls, and so the guest will stall in SLOF unable to
load the guest OS.
This patch addresses this by providing in-kernel implementations of the
2 hypercalls, which correctly scan the KVM IO bus. Any access to an
address not handled by the KVM IO bus will cause a VM exit, hitting the
qemu implementation as before.
Note that a userspace change is also required, in order to enable these
new hcall implementations with KVM_CAP_PPC_ENABLE_HCALL.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-05 07:53:25 +07:00
|
|
|
if (ret != 0)
|
|
|
|
return H_TOO_HARD;
|
|
|
|
|
|
|
|
switch (size) {
|
|
|
|
case 1:
|
|
|
|
kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 4:
|
|
|
|
kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 8:
|
|
|
|
kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
|
|
|
|
|
|
|
return H_SUCCESS;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
|
|
|
|
|
|
|
|
int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
unsigned long size = kvmppc_get_gpr(vcpu, 4);
|
|
|
|
unsigned long addr = kvmppc_get_gpr(vcpu, 5);
|
|
|
|
unsigned long val = kvmppc_get_gpr(vcpu, 6);
|
|
|
|
u64 buf;
|
2015-09-18 13:57:28 +07:00
|
|
|
int srcu_idx;
|
kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM
On POWER, storage caching is usually configured via the MMU - attributes
such as cache-inhibited are stored in the TLB and the hashed page table.
This makes correctly performing cache inhibited IO accesses awkward when
the MMU is turned off (real mode). Some CPU models provide special
registers to control the cache attributes of real mode load and stores but
this is not at all consistent. This is a problem in particular for SLOF,
the firmware used on KVM guests, which runs entirely in real mode, but
which needs to do IO to load the kernel.
To simplify this qemu implements two special hypercalls, H_LOGICAL_CI_LOAD
and H_LOGICAL_CI_STORE which simulate a cache-inhibited load or store to
a logical address (aka guest physical address). SLOF uses these for IO.
However, because these are implemented within qemu, not the host kernel,
these bypass any IO devices emulated within KVM itself. The simplest way
to see this problem is to attempt to boot a KVM guest from a virtio-blk
device with iothread / dataplane enabled. The iothread code relies on an
in kernel implementation of the virtio queue notification, which is not
triggered by the IO hcalls, and so the guest will stall in SLOF unable to
load the guest OS.
This patch addresses this by providing in-kernel implementations of the
2 hypercalls, which correctly scan the KVM IO bus. Any access to an
address not handled by the KVM IO bus will cause a VM exit, hitting the
qemu implementation as before.
Note that a userspace change is also required, in order to enable these
new hcall implementations with KVM_CAP_PPC_ENABLE_HCALL.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-05 07:53:25 +07:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
switch (size) {
|
|
|
|
case 1:
|
|
|
|
*(u8 *)&buf = val;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 2:
|
|
|
|
*(__be16 *)&buf = cpu_to_be16(val);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 4:
|
|
|
|
*(__be32 *)&buf = cpu_to_be32(val);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 8:
|
|
|
|
*(__be64 *)&buf = cpu_to_be64(val);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return H_TOO_HARD;
|
|
|
|
}
|
|
|
|
|
2015-09-18 13:57:28 +07:00
|
|
|
srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
|
kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM
On POWER, storage caching is usually configured via the MMU - attributes
such as cache-inhibited are stored in the TLB and the hashed page table.
This makes correctly performing cache inhibited IO accesses awkward when
the MMU is turned off (real mode). Some CPU models provide special
registers to control the cache attributes of real mode load and stores but
this is not at all consistent. This is a problem in particular for SLOF,
the firmware used on KVM guests, which runs entirely in real mode, but
which needs to do IO to load the kernel.
To simplify this qemu implements two special hypercalls, H_LOGICAL_CI_LOAD
and H_LOGICAL_CI_STORE which simulate a cache-inhibited load or store to
a logical address (aka guest physical address). SLOF uses these for IO.
However, because these are implemented within qemu, not the host kernel,
these bypass any IO devices emulated within KVM itself. The simplest way
to see this problem is to attempt to boot a KVM guest from a virtio-blk
device with iothread / dataplane enabled. The iothread code relies on an
in kernel implementation of the virtio queue notification, which is not
triggered by the IO hcalls, and so the guest will stall in SLOF unable to
load the guest OS.
This patch addresses this by providing in-kernel implementations of the
2 hypercalls, which correctly scan the KVM IO bus. Any access to an
address not handled by the KVM IO bus will cause a VM exit, hitting the
qemu implementation as before.
Note that a userspace change is also required, in order to enable these
new hcall implementations with KVM_CAP_PPC_ENABLE_HCALL.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-05 07:53:25 +07:00
|
|
|
ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
|
2015-09-18 13:57:28 +07:00
|
|
|
srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
|
kvmppc: Implement H_LOGICAL_CI_{LOAD,STORE} in KVM
On POWER, storage caching is usually configured via the MMU - attributes
such as cache-inhibited are stored in the TLB and the hashed page table.
This makes correctly performing cache inhibited IO accesses awkward when
the MMU is turned off (real mode). Some CPU models provide special
registers to control the cache attributes of real mode load and stores but
this is not at all consistent. This is a problem in particular for SLOF,
the firmware used on KVM guests, which runs entirely in real mode, but
which needs to do IO to load the kernel.
To simplify this qemu implements two special hypercalls, H_LOGICAL_CI_LOAD
and H_LOGICAL_CI_STORE which simulate a cache-inhibited load or store to
a logical address (aka guest physical address). SLOF uses these for IO.
However, because these are implemented within qemu, not the host kernel,
these bypass any IO devices emulated within KVM itself. The simplest way
to see this problem is to attempt to boot a KVM guest from a virtio-blk
device with iothread / dataplane enabled. The iothread code relies on an
in kernel implementation of the virtio queue notification, which is not
triggered by the IO hcalls, and so the guest will stall in SLOF unable to
load the guest OS.
This patch addresses this by providing in-kernel implementations of the
2 hypercalls, which correctly scan the KVM IO bus. Any access to an
address not handled by the KVM IO bus will cause a VM exit, hitting the
qemu implementation as before.
Note that a userspace change is also required, in order to enable these
new hcall implementations with KVM_CAP_PPC_ENABLE_HCALL.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-05 07:53:25 +07:00
|
|
|
if (ret != 0)
|
|
|
|
return H_TOO_HARD;
|
|
|
|
|
|
|
|
return H_SUCCESS;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
|
|
|
|
|
2013-10-07 23:47:53 +07:00
|
|
|
int kvmppc_core_check_processor_compat(void)
|
|
|
|
{
|
2013-10-07 23:48:01 +07:00
|
|
|
/*
|
|
|
|
* We always return 0 for book3s. We check
|
2015-05-27 19:05:42 +07:00
|
|
|
* for compatibility while loading the HV
|
2013-10-07 23:48:01 +07:00
|
|
|
* or PR module
|
|
|
|
*/
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-06-02 08:03:00 +07:00
|
|
|
int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
|
|
|
|
{
|
|
|
|
return kvm->arch.kvm_ops->hcall_implemented(hcall);
|
|
|
|
}
|
|
|
|
|
2013-10-07 23:48:01 +07:00
|
|
|
static int kvmppc_book3s_init(void)
|
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
|
|
|
r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
|
|
|
|
if (r)
|
|
|
|
return r;
|
2014-04-07 04:31:48 +07:00
|
|
|
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
|
2013-10-07 23:48:01 +07:00
|
|
|
r = kvmppc_book3s_init_pr();
|
|
|
|
#endif
|
|
|
|
return r;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static void kvmppc_book3s_exit(void)
|
|
|
|
{
|
2014-04-07 04:31:48 +07:00
|
|
|
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
|
2013-10-07 23:48:01 +07:00
|
|
|
kvmppc_book3s_exit_pr();
|
|
|
|
#endif
|
|
|
|
kvm_exit();
|
2013-10-07 23:47:53 +07:00
|
|
|
}
|
2013-10-07 23:48:01 +07:00
|
|
|
|
|
|
|
module_init(kvmppc_book3s_init);
|
|
|
|
module_exit(kvmppc_book3s_exit);
|
2013-12-09 19:53:42 +07:00
|
|
|
|
|
|
|
/* On 32bit this is our one and only kernel module */
|
2014-04-07 04:31:48 +07:00
|
|
|
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
|
2013-12-09 19:53:42 +07:00
|
|
|
MODULE_ALIAS_MISCDEV(KVM_MINOR);
|
|
|
|
MODULE_ALIAS("devname:kvm");
|
|
|
|
#endif
|