2005-04-17 05:20:36 +07:00
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/*
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* linux/arch/arm/kernel/irq.c
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*
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* Copyright (C) 1992 Linus Torvalds
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* Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
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*
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2005-06-26 01:39:45 +07:00
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* Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
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* Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
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* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
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*
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2005-04-17 05:20:36 +07:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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*
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* IRQ's are in fact implemented a bit like signal handlers for the kernel.
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* Naturally it's not a 1:1 relation, but there are similarities.
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*/
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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2006-07-02 04:30:09 +07:00
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#include <linux/irq.h>
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2013-03-29 03:46:44 +07:00
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#include <linux/irqchip.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/random.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/seq_file.h>
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2014-10-28 20:32:35 +07:00
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#include <linux/ratelimit.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/kallsyms.h>
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#include <linux/proc_fs.h>
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2012-08-16 14:49:26 +07:00
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#include <linux/export.h>
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2005-04-17 05:20:36 +07:00
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2014-04-28 21:24:10 +07:00
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#include <asm/hardware/cache-l2x0.h>
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ARM: move heavy barrier support out of line
The existing memory barrier macro causes a significant amount of code
to be inserted inline at every call site. For example, in
gpio_set_irq_type(), we have this for mb():
c0344c08: f57ff04e dsb st
c0344c0c: e59f8190 ldr r8, [pc, #400] ; c0344da4 <gpio_set_irq_type+0x230>
c0344c10: e3590004 cmp r9, #4
c0344c14: e5983014 ldr r3, [r8, #20]
c0344c18: 0a000054 beq c0344d70 <gpio_set_irq_type+0x1fc>
c0344c1c: e3530000 cmp r3, #0
c0344c20: 0a000004 beq c0344c38 <gpio_set_irq_type+0xc4>
c0344c24: e50b2030 str r2, [fp, #-48] ; 0xffffffd0
c0344c28: e50bc034 str ip, [fp, #-52] ; 0xffffffcc
c0344c2c: e12fff33 blx r3
c0344c30: e51bc034 ldr ip, [fp, #-52] ; 0xffffffcc
c0344c34: e51b2030 ldr r2, [fp, #-48] ; 0xffffffd0
c0344c38: e5963004 ldr r3, [r6, #4]
Moving the outer_cache_sync() call out of line reduces the impact of
the barrier:
c0344968: f57ff04e dsb st
c034496c: e35a0004 cmp sl, #4
c0344970: e50b2030 str r2, [fp, #-48] ; 0xffffffd0
c0344974: 0a000044 beq c0344a8c <gpio_set_irq_type+0x1b8>
c0344978: ebf363dd bl c001d8f4 <arm_heavy_mb>
c034497c: e5953004 ldr r3, [r5, #4]
This should reduce the cache footprint of this code. Overall, this
results in a reduction of around 20K in the kernel size:
text data bss dec hex filename
10773970 667392 10369656 21811018 14ccf4a ../build/imx6/vmlinux-old
10754219 667392 10369656 21791267 14c8223 ../build/imx6/vmlinux-new
Another advantage to this approach is that we can finally resolve the
issue of SoCs which have their own memory barrier requirements within
multiplatform kernels (such as OMAP.) Here, the bus interconnects
need additional handling to ensure that writes become visible in the
correct order (eg, between dma_map() operations, writes to DMA
coherent memory, and MMIO accesses.)
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-06-02 05:44:46 +07:00
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#include <asm/outercache.h>
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2011-10-08 17:20:42 +07:00
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#include <asm/exception.h>
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2010-12-20 17:18:36 +07:00
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#include <asm/mach/arch.h>
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2008-08-03 21:04:04 +07:00
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#include <asm/mach/irq.h>
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2005-06-26 01:39:45 +07:00
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#include <asm/mach/time.h>
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2005-04-17 05:20:36 +07:00
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2006-07-02 04:30:09 +07:00
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unsigned long irq_err_count;
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2005-04-17 05:20:36 +07:00
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2011-03-24 18:02:11 +07:00
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int arch_show_interrupts(struct seq_file *p, int prec)
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2005-04-17 05:20:36 +07:00
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{
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2009-08-03 21:11:29 +07:00
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#ifdef CONFIG_FIQ
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2011-03-24 18:02:11 +07:00
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show_fiq_list(p, prec);
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2005-04-17 05:20:36 +07:00
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#endif
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#ifdef CONFIG_SMP
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2011-03-24 18:02:11 +07:00
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show_ipi_list(p, prec);
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2005-04-17 05:20:36 +07:00
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#endif
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2011-03-24 18:02:11 +07:00
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seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
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2005-04-17 05:20:36 +07:00
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return 0;
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}
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/*
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ARM: introduce handle_IRQ() not to dump exception stack
On Mon, Jul 11, 2011 at 3:52 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
...
> The __exception annotation on a function causes this to happen:
>
> [<c002406c>] (asm_do_IRQ+0x6c/0x8c) from [<c0024b84>]
> (__irq_svc+0x44/0xcc)
> Exception stack(0xc3897c78 to 0xc3897cc0)
> 7c60: 4022d320 4022e000
> 7c80: 08000075 00001000 c32273c0 c03ce1c0 c2b49b78 4022d000 c2b420b4 00000001
> 7ca0: 00000000 c3897cfc 00000000 c3897cc0 c00afc54 c002edd8 00000013 ffffffff
>
> Where that stack dump represents the pt_regs for the exception which
> happened. Any function found in while unwinding will cause this to
> be printed.
>
> If you insert a C function between the IRQ assembly and asm_do_IRQ,
> the
> dump you get from asm_do_IRQ will be the stack for your function,
> not
> the pt_regs. That makes the feature useless.
>
When __irq_svc - or any of the other exception handling assembly code -
calls the C code, the stack pointer will be pointing at the pt_regs
structure.
All the entry points into C code from the exception handling code are
marked with __exception or __exception_irq_enter to indicate that they
are one of the functions which has pt_regs above them.
Normally, when you've entered asm_do_IRQ() you will have this stack
layout (higher address towards top):
pt_regs
asm_do_IRQ frame
If you insert a C function between the exception assembly code and
asm_do_IRQ, you end up with this stack layout instead:
pt_regs
your function frame
asm_do_IRQ frame
This means when we unwind, we'll get to asm_do_IRQ, and rather than
dumping out the pt_regs, we'll dump out your functions stack frame
instead, because that's what is above the asm_do_IRQ stack frame
rather than the expected pt_regs structure.
The fix is to introduce handle_IRQ() for no exception stack dump, so
it can be called with MULTI_IRQ_HANDLER is selected and a C function
is between the assembly code and the actual IRQ handling code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-07-12 04:25:43 +07:00
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* handle_IRQ handles all hardware IRQ's. Decoded IRQs should
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* not come via this function. Instead, they should provide their
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* own 'handler'. Used by platform code implementing C-based 1st
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* level decoding.
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2005-04-17 05:20:36 +07:00
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*/
|
ARM: introduce handle_IRQ() not to dump exception stack
On Mon, Jul 11, 2011 at 3:52 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
...
> The __exception annotation on a function causes this to happen:
>
> [<c002406c>] (asm_do_IRQ+0x6c/0x8c) from [<c0024b84>]
> (__irq_svc+0x44/0xcc)
> Exception stack(0xc3897c78 to 0xc3897cc0)
> 7c60: 4022d320 4022e000
> 7c80: 08000075 00001000 c32273c0 c03ce1c0 c2b49b78 4022d000 c2b420b4 00000001
> 7ca0: 00000000 c3897cfc 00000000 c3897cc0 c00afc54 c002edd8 00000013 ffffffff
>
> Where that stack dump represents the pt_regs for the exception which
> happened. Any function found in while unwinding will cause this to
> be printed.
>
> If you insert a C function between the IRQ assembly and asm_do_IRQ,
> the
> dump you get from asm_do_IRQ will be the stack for your function,
> not
> the pt_regs. That makes the feature useless.
>
When __irq_svc - or any of the other exception handling assembly code -
calls the C code, the stack pointer will be pointing at the pt_regs
structure.
All the entry points into C code from the exception handling code are
marked with __exception or __exception_irq_enter to indicate that they
are one of the functions which has pt_regs above them.
Normally, when you've entered asm_do_IRQ() you will have this stack
layout (higher address towards top):
pt_regs
asm_do_IRQ frame
If you insert a C function between the exception assembly code and
asm_do_IRQ, you end up with this stack layout instead:
pt_regs
your function frame
asm_do_IRQ frame
This means when we unwind, we'll get to asm_do_IRQ, and rather than
dumping out the pt_regs, we'll dump out your functions stack frame
instead, because that's what is above the asm_do_IRQ stack frame
rather than the expected pt_regs structure.
The fix is to introduce handle_IRQ() for no exception stack dump, so
it can be called with MULTI_IRQ_HANDLER is selected and a C function
is between the assembly code and the actual IRQ handling code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-07-12 04:25:43 +07:00
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void handle_IRQ(unsigned int irq, struct pt_regs *regs)
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2005-04-17 05:20:36 +07:00
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{
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2014-08-26 17:03:18 +07:00
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__handle_domain_irq(NULL, irq, false, regs);
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2005-04-17 05:20:36 +07:00
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}
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|
ARM: introduce handle_IRQ() not to dump exception stack
On Mon, Jul 11, 2011 at 3:52 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
...
> The __exception annotation on a function causes this to happen:
>
> [<c002406c>] (asm_do_IRQ+0x6c/0x8c) from [<c0024b84>]
> (__irq_svc+0x44/0xcc)
> Exception stack(0xc3897c78 to 0xc3897cc0)
> 7c60: 4022d320 4022e000
> 7c80: 08000075 00001000 c32273c0 c03ce1c0 c2b49b78 4022d000 c2b420b4 00000001
> 7ca0: 00000000 c3897cfc 00000000 c3897cc0 c00afc54 c002edd8 00000013 ffffffff
>
> Where that stack dump represents the pt_regs for the exception which
> happened. Any function found in while unwinding will cause this to
> be printed.
>
> If you insert a C function between the IRQ assembly and asm_do_IRQ,
> the
> dump you get from asm_do_IRQ will be the stack for your function,
> not
> the pt_regs. That makes the feature useless.
>
When __irq_svc - or any of the other exception handling assembly code -
calls the C code, the stack pointer will be pointing at the pt_regs
structure.
All the entry points into C code from the exception handling code are
marked with __exception or __exception_irq_enter to indicate that they
are one of the functions which has pt_regs above them.
Normally, when you've entered asm_do_IRQ() you will have this stack
layout (higher address towards top):
pt_regs
asm_do_IRQ frame
If you insert a C function between the exception assembly code and
asm_do_IRQ, you end up with this stack layout instead:
pt_regs
your function frame
asm_do_IRQ frame
This means when we unwind, we'll get to asm_do_IRQ, and rather than
dumping out the pt_regs, we'll dump out your functions stack frame
instead, because that's what is above the asm_do_IRQ stack frame
rather than the expected pt_regs structure.
The fix is to introduce handle_IRQ() for no exception stack dump, so
it can be called with MULTI_IRQ_HANDLER is selected and a C function
is between the assembly code and the actual IRQ handling code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-07-12 04:25:43 +07:00
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/*
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* asm_do_IRQ is the interface to be used from assembly code.
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*/
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asmlinkage void __exception_irq_entry
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asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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handle_IRQ(irq, regs);
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}
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2005-04-17 05:20:36 +07:00
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void __init init_IRQ(void)
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{
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2014-04-28 21:24:10 +07:00
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int ret;
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2013-03-29 03:46:44 +07:00
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if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
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irqchip_init();
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else
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machine_desc->init_irq();
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2014-04-28 21:24:10 +07:00
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if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
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(machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
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2015-01-08 13:51:45 +07:00
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if (!outer_cache.write_sec)
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outer_cache.write_sec = machine_desc->l2c_write_sec;
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2014-04-28 21:24:10 +07:00
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ret = l2x0_of_init(machine_desc->l2c_aux_val,
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machine_desc->l2c_aux_mask);
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if (ret)
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pr_err("L2C: failed to init: %d\n", ret);
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}
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2005-04-17 05:20:36 +07:00
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}
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2012-11-21 05:00:53 +07:00
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#ifdef CONFIG_MULTI_IRQ_HANDLER
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void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
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{
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if (handle_arch_irq)
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return;
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handle_arch_irq = handle_irq;
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}
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#endif
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2010-06-25 15:46:09 +07:00
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#ifdef CONFIG_SPARSE_IRQ
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int __init arch_probe_nr_irqs(void)
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{
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2010-12-20 17:18:36 +07:00
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nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
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2010-09-28 01:55:03 +07:00
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return nr_irqs;
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2010-06-25 15:46:09 +07:00
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}
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#endif
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2005-11-03 05:24:33 +07:00
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#ifdef CONFIG_HOTPLUG_CPU
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2011-07-21 21:14:21 +07:00
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static bool migrate_one_irq(struct irq_desc *desc)
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2006-07-12 04:54:34 +07:00
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{
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2011-07-21 21:14:21 +07:00
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struct irq_data *d = irq_desc_get_irq_data(desc);
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2015-06-01 15:05:25 +07:00
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const struct cpumask *affinity = irq_data_get_affinity_mask(d);
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2011-07-21 21:14:21 +07:00
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struct irq_chip *c;
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2011-01-23 19:09:36 +07:00
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bool ret = false;
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2006-07-12 04:54:34 +07:00
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2011-07-21 21:14:21 +07:00
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/*
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* If this is a per-CPU interrupt, or the affinity does not
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* include this CPU, then we have nothing to do.
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*/
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if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
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return false;
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2011-07-21 21:07:56 +07:00
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if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
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2011-07-21 21:14:21 +07:00
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affinity = cpu_online_mask;
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2011-01-23 19:09:36 +07:00
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ret = true;
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}
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2011-07-21 21:14:21 +07:00
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c = irq_data_get_irq_chip(d);
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2012-04-27 18:56:24 +07:00
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if (!c->irq_set_affinity)
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2011-07-21 21:14:21 +07:00
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pr_debug("IRQ%u: unable to set affinity\n", d->irq);
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2014-09-01 23:14:29 +07:00
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else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
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2015-06-01 15:05:25 +07:00
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cpumask_copy(irq_data_get_affinity_mask(d), affinity);
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2011-01-23 19:09:36 +07:00
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return ret;
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2006-07-12 04:54:34 +07:00
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}
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2005-11-03 05:24:33 +07:00
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/*
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2011-07-21 21:14:21 +07:00
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* The current CPU has been marked offline. Migrate IRQs off this CPU.
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* If the affinity settings do not allow other CPUs, force them onto any
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2005-11-03 05:24:33 +07:00
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* available CPU.
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2011-07-21 21:14:21 +07:00
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*
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* Note: we must iterate over all IRQs, whether they have an attached
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* action structure or not, as we need to get chained interrupts too.
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2005-11-03 05:24:33 +07:00
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*/
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void migrate_irqs(void)
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{
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2011-07-21 21:14:21 +07:00
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unsigned int i;
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2010-06-25 15:46:09 +07:00
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struct irq_desc *desc;
|
2011-01-23 19:09:36 +07:00
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unsigned long flags;
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local_irq_save(flags);
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2005-11-03 05:24:33 +07:00
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2010-06-25 15:46:09 +07:00
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for_each_irq_desc(i, desc) {
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2012-02-03 20:50:07 +07:00
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bool affinity_broken;
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2011-07-21 21:14:21 +07:00
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2011-01-23 19:09:36 +07:00
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raw_spin_lock(&desc->lock);
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2011-07-21 21:14:21 +07:00
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affinity_broken = migrate_one_irq(desc);
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2011-01-23 19:09:36 +07:00
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raw_spin_unlock(&desc->lock);
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2014-10-28 20:32:35 +07:00
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if (affinity_broken)
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pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
|
2014-09-17 02:41:43 +07:00
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i, smp_processor_id());
|
2005-11-03 05:24:33 +07:00
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}
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2011-01-23 19:09:36 +07:00
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|
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local_irq_restore(flags);
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2005-11-03 05:24:33 +07:00
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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