2005-04-17 05:20:36 +07:00
|
|
|
/*
|
|
|
|
* drivers/pci/bus.c
|
|
|
|
*
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|
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* From setup-res.c, by:
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* Dave Rusling (david.rusling@reo.mts.dec.com)
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* David Mosberger (davidm@cs.arizona.edu)
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* David Miller (davem@redhat.com)
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* Ivan Kokshaysky (ink@jurassic.park.msu.ru)
|
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|
|
*/
|
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#include <linux/module.h>
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|
|
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/proc_fs.h>
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|
|
|
#include <linux/init.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 15:04:11 +07:00
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#include <linux/slab.h>
|
2005-04-17 05:20:36 +07:00
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#include "pci.h"
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|
2012-02-24 10:19:00 +07:00
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void pci_add_resource_offset(struct list_head *resources, struct resource *res,
|
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resource_size_t offset)
|
2011-10-29 05:25:35 +07:00
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|
|
{
|
2012-02-24 10:19:00 +07:00
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struct pci_host_bridge_window *window;
|
2011-10-29 05:25:35 +07:00
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2012-02-24 10:19:00 +07:00
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window = kzalloc(sizeof(struct pci_host_bridge_window), GFP_KERNEL);
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|
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if (!window) {
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printk(KERN_ERR "PCI: can't add host bridge window %pR\n", res);
|
2011-10-29 05:25:35 +07:00
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return;
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|
}
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2012-02-24 10:19:00 +07:00
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window->res = res;
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window->offset = offset;
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list_add_tail(&window->list, resources);
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|
}
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EXPORT_SYMBOL(pci_add_resource_offset);
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void pci_add_resource(struct list_head *resources, struct resource *res)
|
|
|
|
{
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pci_add_resource_offset(resources, res, 0);
|
2011-10-29 05:25:35 +07:00
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|
|
}
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EXPORT_SYMBOL(pci_add_resource);
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void pci_free_resource_list(struct list_head *resources)
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|
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{
|
2012-02-24 10:19:00 +07:00
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|
struct pci_host_bridge_window *window, *tmp;
|
2011-10-29 05:25:35 +07:00
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|
2012-02-24 10:19:00 +07:00
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|
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list_for_each_entry_safe(window, tmp, resources, list) {
|
|
|
|
list_del(&window->list);
|
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|
|
kfree(window);
|
2011-10-29 05:25:35 +07:00
|
|
|
}
|
|
|
|
}
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EXPORT_SYMBOL(pci_free_resource_list);
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|
2010-02-24 00:24:36 +07:00
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void pci_bus_add_resource(struct pci_bus *bus, struct resource *res,
|
|
|
|
unsigned int flags)
|
|
|
|
{
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struct pci_bus_resource *bus_res;
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bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL);
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if (!bus_res) {
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dev_err(&bus->dev, "can't add %pR resource\n", res);
|
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return;
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|
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|
}
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bus_res->res = res;
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bus_res->flags = flags;
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list_add_tail(&bus_res->list, &bus->resources);
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|
}
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struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n)
|
|
|
|
{
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struct pci_bus_resource *bus_res;
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if (n < PCI_BRIDGE_RESOURCE_NUM)
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return bus->resource[n];
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n -= PCI_BRIDGE_RESOURCE_NUM;
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|
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list_for_each_entry(bus_res, &bus->resources, list) {
|
|
|
|
if (n-- == 0)
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|
|
|
return bus_res->res;
|
|
|
|
}
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|
return NULL;
|
|
|
|
}
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|
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EXPORT_SYMBOL_GPL(pci_bus_resource_n);
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void pci_bus_remove_resources(struct pci_bus *bus)
|
|
|
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{
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int i;
|
2012-09-15 07:48:41 +07:00
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|
|
struct pci_bus_resource *bus_res, *tmp;
|
2010-02-24 00:24:36 +07:00
|
|
|
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|
|
for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
|
2010-06-01 23:00:16 +07:00
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|
bus->resource[i] = NULL;
|
2010-02-24 00:24:36 +07:00
|
|
|
|
2012-09-15 07:48:41 +07:00
|
|
|
list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
|
|
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|
list_del(&bus_res->list);
|
|
|
|
kfree(bus_res);
|
|
|
|
}
|
2010-02-24 00:24:36 +07:00
|
|
|
}
|
|
|
|
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
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|
|
static struct pci_bus_region pci_32_bit = {0, 0xffffffffULL};
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|
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
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|
static struct pci_bus_region pci_64_bit = {0,
|
|
|
|
(dma_addr_t) 0xffffffffffffffffULL};
|
2013-12-21 00:55:44 +07:00
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|
|
static struct pci_bus_region pci_high = {(dma_addr_t) 0x100000000ULL,
|
|
|
|
(dma_addr_t) 0xffffffffffffffffULL};
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* @res contains CPU addresses. Clip it so the corresponding bus addresses
|
|
|
|
* on @bus are entirely within @region. This is used to control the bus
|
|
|
|
* addresses of resources we allocate, e.g., we may need a resource that
|
|
|
|
* can be mapped by a 32-bit BAR.
|
2005-04-17 05:20:36 +07:00
|
|
|
*/
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
static void pci_clip_resource_to_region(struct pci_bus *bus,
|
|
|
|
struct resource *res,
|
|
|
|
struct pci_bus_region *region)
|
|
|
|
{
|
|
|
|
struct pci_bus_region r;
|
|
|
|
|
|
|
|
pcibios_resource_to_bus(bus, &r, res);
|
|
|
|
if (r.start < region->start)
|
|
|
|
r.start = region->start;
|
|
|
|
if (r.end > region->end)
|
|
|
|
r.end = region->end;
|
|
|
|
|
|
|
|
if (r.end < r.start)
|
|
|
|
res->end = res->start - 1;
|
|
|
|
else
|
|
|
|
pcibios_bus_to_resource(bus, res, &r);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res,
|
2006-06-13 07:06:02 +07:00
|
|
|
resource_size_t size, resource_size_t align,
|
|
|
|
resource_size_t min, unsigned int type_mask,
|
2010-01-01 23:40:49 +07:00
|
|
|
resource_size_t (*alignf)(void *,
|
2010-01-01 23:40:50 +07:00
|
|
|
const struct resource *,
|
2010-01-01 23:40:49 +07:00
|
|
|
resource_size_t,
|
|
|
|
resource_size_t),
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
void *alignf_data,
|
|
|
|
struct pci_bus_region *region)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
int i, ret;
|
|
|
|
struct resource *r, avail;
|
|
|
|
resource_size_t max;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
|
|
|
|
|
2010-12-17 00:38:36 +07:00
|
|
|
pci_bus_for_each_resource(bus, r, i) {
|
|
|
|
if (!r)
|
|
|
|
continue;
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/* type_mask must match */
|
|
|
|
if ((res->flags ^ r->flags) & type_mask)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* We cannot allocate a non-prefetching resource
|
|
|
|
from a pre-fetching area */
|
|
|
|
if ((r->flags & IORESOURCE_PREFETCH) &&
|
|
|
|
!(res->flags & IORESOURCE_PREFETCH))
|
|
|
|
continue;
|
|
|
|
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
avail = *r;
|
|
|
|
pci_clip_resource_to_region(bus, &avail, region);
|
|
|
|
if (!resource_size(&avail))
|
|
|
|
continue;
|
|
|
|
|
2013-12-19 06:31:39 +07:00
|
|
|
/*
|
|
|
|
* "min" is typically PCIBIOS_MIN_IO or PCIBIOS_MIN_MEM to
|
|
|
|
* protect badly documented motherboard resources, but if
|
|
|
|
* this is an already-configured bridge window, its start
|
|
|
|
* overrides "min".
|
|
|
|
*/
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
if (avail.start)
|
|
|
|
min = avail.start;
|
|
|
|
|
|
|
|
max = avail.end;
|
2013-12-19 06:31:39 +07:00
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/* Ok, try it out.. */
|
2013-12-19 06:31:39 +07:00
|
|
|
ret = allocate_resource(r, res, size, min, max,
|
|
|
|
align, alignf, alignf_data);
|
2005-04-17 05:20:36 +07:00
|
|
|
if (ret == 0)
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
return 0;
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* pci_bus_alloc_resource - allocate a resource from a parent bus
|
|
|
|
* @bus: PCI bus
|
|
|
|
* @res: resource to allocate
|
|
|
|
* @size: size of resource to allocate
|
|
|
|
* @align: alignment of resource to allocate
|
|
|
|
* @min: minimum /proc/iomem address to allocate
|
|
|
|
* @type_mask: IORESOURCE_* type flags
|
|
|
|
* @alignf: resource alignment function
|
|
|
|
* @alignf_data: data argument for resource alignment function
|
|
|
|
*
|
|
|
|
* Given the PCI bus a device resides on, the size, minimum address,
|
|
|
|
* alignment and type, try to find an acceptable resource allocation
|
|
|
|
* for a specific device resource.
|
|
|
|
*/
|
2013-12-21 00:55:44 +07:00
|
|
|
int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
resource_size_t size, resource_size_t align,
|
|
|
|
resource_size_t min, unsigned int type_mask,
|
|
|
|
resource_size_t (*alignf)(void *,
|
|
|
|
const struct resource *,
|
|
|
|
resource_size_t,
|
|
|
|
resource_size_t),
|
|
|
|
void *alignf_data)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
|
2013-12-21 00:55:44 +07:00
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (res->flags & IORESOURCE_MEM_64) {
|
|
|
|
rc = pci_bus_alloc_from_region(bus, res, size, align, min,
|
|
|
|
type_mask, alignf, alignf_data,
|
|
|
|
&pci_high);
|
|
|
|
if (rc == 0)
|
|
|
|
return 0;
|
|
|
|
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
return pci_bus_alloc_from_region(bus, res, size, align, min,
|
|
|
|
type_mask, alignf, alignf_data,
|
|
|
|
&pci_64_bit);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
PCI: Enforce bus address limits in resource allocation
When allocating space for 32-bit BARs, we previously limited RESOURCE
addresses so they would fit in 32 bits. However, the BUS address need not
be the same as the resource address, and it's the bus address that must fit
in the 32-bit BAR.
This patch adds:
- pci_clip_resource_to_region(), which clips a resource so it contains
only the range that maps to the specified bus address region, e.g., to
clip a resource to 32-bit bus addresses, and
- pci_bus_alloc_from_region(), which allocates space for a resource from
the specified bus address region,
and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
the entire bus address region, and space for 32-bit BARs from only the bus
address region below 4GB.
If we had this window:
pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
we previously could not put a 32-bit BAR there, because the CPU addresses
don't fit in 32 bits. This patch fixes this, so we can use this space for
32-bit BARs.
It's also possible (though unlikely) to have resources with 32-bit CPU
addresses but bus addresses above 4GB. In this case the previous code
would allocate space that a 32-bit BAR could not map.
Remove PCIBIOS_MAX_MEM_32, which is no longer used.
[bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-12-20 23:57:37 +07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
return pci_bus_alloc_from_region(bus, res, size, align, min,
|
|
|
|
type_mask, alignf, alignf_data,
|
|
|
|
&pci_32_bit);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2012-11-04 11:39:31 +07:00
|
|
|
void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { }
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/**
|
2013-01-22 04:20:52 +07:00
|
|
|
* pci_bus_add_device - start driver for a single device
|
2005-04-17 05:20:36 +07:00
|
|
|
* @dev: device to add
|
|
|
|
*
|
2013-01-22 04:20:52 +07:00
|
|
|
* This adds add sysfs entries and start device drivers
|
2005-04-17 05:20:36 +07:00
|
|
|
*/
|
2007-03-27 12:53:30 +07:00
|
|
|
int pci_bus_add_device(struct pci_dev *dev)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
2006-08-29 01:43:25 +07:00
|
|
|
int retval;
|
2012-07-10 04:36:46 +07:00
|
|
|
|
2013-01-22 04:20:52 +07:00
|
|
|
/*
|
|
|
|
* Can not put in pci_device_add yet because resources
|
|
|
|
* are not assigned yet for some devices.
|
|
|
|
*/
|
2013-05-08 03:35:44 +07:00
|
|
|
pci_fixup_device(pci_fixup_final, dev);
|
2013-01-22 04:20:52 +07:00
|
|
|
pci_create_sysfs_dev_files(dev);
|
2013-12-01 05:40:28 +07:00
|
|
|
pci_proc_attach_device(dev);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2013-01-22 04:20:51 +07:00
|
|
|
dev->match_driver = true;
|
|
|
|
retval = device_attach(&dev->dev);
|
|
|
|
WARN_ON(retval < 0);
|
|
|
|
|
2008-02-15 05:56:56 +07:00
|
|
|
dev->is_added = 1;
|
2008-11-22 01:42:35 +07:00
|
|
|
|
2013-01-22 04:20:52 +07:00
|
|
|
return 0;
|
2008-11-22 01:42:35 +07:00
|
|
|
}
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/**
|
2013-01-22 04:20:52 +07:00
|
|
|
* pci_bus_add_devices - start driver for PCI devices
|
2005-04-17 05:20:36 +07:00
|
|
|
* @bus: bus to check for new devices
|
|
|
|
*
|
2013-01-22 04:20:52 +07:00
|
|
|
* Start driver for PCI devices and add some sysfs entries.
|
2005-04-17 05:20:36 +07:00
|
|
|
*/
|
2009-02-04 06:45:26 +07:00
|
|
|
void pci_bus_add_devices(const struct pci_bus *bus)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
|
|
|
struct pci_dev *dev;
|
2008-11-22 01:41:45 +07:00
|
|
|
struct pci_bus *child;
|
2006-08-29 01:43:25 +07:00
|
|
|
int retval;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
list_for_each_entry(dev, &bus->devices, bus_list) {
|
2008-02-15 05:56:56 +07:00
|
|
|
/* Skip already-added devices */
|
|
|
|
if (dev->is_added)
|
2005-04-17 05:20:36 +07:00
|
|
|
continue;
|
2006-08-29 01:43:25 +07:00
|
|
|
retval = pci_bus_add_device(dev);
|
2013-04-13 00:35:40 +07:00
|
|
|
if (retval)
|
|
|
|
dev_err(&dev->dev, "Error adding device (%d)\n",
|
|
|
|
retval);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
list_for_each_entry(dev, &bus->devices, bus_list) {
|
2008-02-15 05:56:56 +07:00
|
|
|
BUG_ON(!dev->is_added);
|
2008-11-22 01:41:45 +07:00
|
|
|
child = dev->subordinate;
|
2013-04-12 12:44:16 +07:00
|
|
|
if (child)
|
|
|
|
pci_bus_add_devices(child);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-08-18 11:33:01 +07:00
|
|
|
/** pci_walk_bus - walk devices on/under bus, calling callback.
|
|
|
|
* @top bus whose devices should be walked
|
|
|
|
* @cb callback to be called for each device found
|
|
|
|
* @userdata arbitrary pointer to be passed to callback.
|
|
|
|
*
|
|
|
|
* Walk the given bus, including any bridged devices
|
|
|
|
* on buses under this bus. Call the provided callback
|
|
|
|
* on each device found.
|
2009-06-16 12:34:38 +07:00
|
|
|
*
|
|
|
|
* We check the return of @cb each time. If it returns anything
|
|
|
|
* other than 0, we break out.
|
|
|
|
*
|
2005-08-18 11:33:01 +07:00
|
|
|
*/
|
2009-06-16 12:34:38 +07:00
|
|
|
void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
|
2005-08-18 11:33:01 +07:00
|
|
|
void *userdata)
|
|
|
|
{
|
|
|
|
struct pci_dev *dev;
|
|
|
|
struct pci_bus *bus;
|
|
|
|
struct list_head *next;
|
2009-06-16 12:34:38 +07:00
|
|
|
int retval;
|
2005-08-18 11:33:01 +07:00
|
|
|
|
|
|
|
bus = top;
|
2006-06-02 11:35:43 +07:00
|
|
|
down_read(&pci_bus_sem);
|
2005-08-18 11:33:01 +07:00
|
|
|
next = top->devices.next;
|
|
|
|
for (;;) {
|
|
|
|
if (next == &bus->devices) {
|
|
|
|
/* end of this bus, go up or finish */
|
|
|
|
if (bus == top)
|
|
|
|
break;
|
|
|
|
next = bus->self->bus_list.next;
|
|
|
|
bus = bus->self->bus;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
dev = list_entry(next, struct pci_dev, bus_list);
|
|
|
|
if (dev->subordinate) {
|
|
|
|
/* this is a pci-pci bridge, do its devices next */
|
|
|
|
next = dev->subordinate->devices.next;
|
|
|
|
bus = dev->subordinate;
|
|
|
|
} else
|
|
|
|
next = dev->bus_list.next;
|
|
|
|
|
2009-06-16 12:34:38 +07:00
|
|
|
retval = cb(dev, userdata);
|
|
|
|
if (retval)
|
|
|
|
break;
|
2005-08-18 11:33:01 +07:00
|
|
|
}
|
2006-06-02 11:35:43 +07:00
|
|
|
up_read(&pci_bus_sem);
|
2005-08-18 11:33:01 +07:00
|
|
|
}
|
2009-12-23 02:49:45 +07:00
|
|
|
EXPORT_SYMBOL_GPL(pci_walk_bus);
|
2005-08-18 11:33:01 +07:00
|
|
|
|
2013-05-25 20:48:29 +07:00
|
|
|
struct pci_bus *pci_bus_get(struct pci_bus *bus)
|
|
|
|
{
|
|
|
|
if (bus)
|
|
|
|
get_device(&bus->dev);
|
|
|
|
return bus;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(pci_bus_get);
|
|
|
|
|
|
|
|
void pci_bus_put(struct pci_bus *bus)
|
|
|
|
{
|
|
|
|
if (bus)
|
|
|
|
put_device(&bus->dev);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(pci_bus_put);
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
EXPORT_SYMBOL(pci_bus_alloc_resource);
|
|
|
|
EXPORT_SYMBOL_GPL(pci_bus_add_device);
|
|
|
|
EXPORT_SYMBOL(pci_bus_add_devices);
|