2019-05-29 21:17:58 +07:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2015-01-08 06:47:44 +07:00
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/*
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* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
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*/
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#ifndef __EDP_CONNECTOR_H__
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#define __EDP_CONNECTOR_H__
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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2019-08-26 22:26:29 +07:00
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#include <drm/drm_bridge.h>
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2017-04-24 11:50:28 +07:00
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#include <drm/drm_crtc.h>
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#include <drm/drm_dp_helper.h>
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2015-01-08 06:47:44 +07:00
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#include "msm_drv.h"
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#define edp_read(offset) msm_readl((offset))
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#define edp_write(offset, data) msm_writel((data), (offset))
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struct edp_ctrl;
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struct edp_aux;
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struct edp_phy;
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struct msm_edp {
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struct drm_device *dev;
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struct platform_device *pdev;
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struct drm_connector *connector;
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struct drm_bridge *bridge;
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/* the encoder we are hooked to (outside of eDP block) */
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struct drm_encoder *encoder;
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struct edp_ctrl *ctrl;
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int irq;
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};
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/* eDP bridge */
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struct drm_bridge *msm_edp_bridge_init(struct msm_edp *edp);
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void edp_bridge_destroy(struct drm_bridge *bridge);
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/* eDP connector */
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struct drm_connector *msm_edp_connector_init(struct msm_edp *edp);
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/* AUX */
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void *msm_edp_aux_init(struct device *dev, void __iomem *regbase,
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struct drm_dp_aux **drm_aux);
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void msm_edp_aux_destroy(struct device *dev, struct edp_aux *aux);
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irqreturn_t msm_edp_aux_irq(struct edp_aux *aux, u32 isr);
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void msm_edp_aux_ctrl(struct edp_aux *aux, int enable);
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/* Phy */
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bool msm_edp_phy_ready(struct edp_phy *phy);
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void msm_edp_phy_ctrl(struct edp_phy *phy, int enable);
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void msm_edp_phy_vm_pe_init(struct edp_phy *phy);
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void msm_edp_phy_vm_pe_cfg(struct edp_phy *phy, u32 v0, u32 v1);
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void msm_edp_phy_lane_power_ctrl(struct edp_phy *phy, bool up, u32 max_lane);
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void *msm_edp_phy_init(struct device *dev, void __iomem *regbase);
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/* Ctrl */
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irqreturn_t msm_edp_ctrl_irq(struct edp_ctrl *ctrl);
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void msm_edp_ctrl_power(struct edp_ctrl *ctrl, bool on);
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int msm_edp_ctrl_init(struct msm_edp *edp);
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void msm_edp_ctrl_destroy(struct edp_ctrl *ctrl);
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bool msm_edp_ctrl_panel_connected(struct edp_ctrl *ctrl);
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int msm_edp_ctrl_get_panel_info(struct edp_ctrl *ctrl,
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struct drm_connector *connector, struct edid **edid);
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int msm_edp_ctrl_timing_cfg(struct edp_ctrl *ctrl,
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const struct drm_display_mode *mode,
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const struct drm_display_info *info);
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/* @pixel_rate is in kHz */
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bool msm_edp_ctrl_pixel_clock_valid(struct edp_ctrl *ctrl,
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u32 pixel_rate, u32 *pm, u32 *pn);
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#endif /* __EDP_CONNECTOR_H__ */
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