drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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/*
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2015-01-08 04:27:27 +07:00
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* Copyright (c) 2014 The Linux Foundation. All rights reserved.
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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drm/msm/mdp5: use irqdomains
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
mdp block. In order to decouple hdmi/eDP/etc, register an irq domain
in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup
their irqs in their DT nodes as normal. When used with mdp5, instead
set the mdp device as the interrupt-parent, as in:
mdp: qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
interrupt-controller;
#interrupt-cells = <1>;
...
};
hdmi: qcom,hdmi_tx@fd922100 {
compatible = "qcom,hdmi-tx-8074";
interrupt-parent = <&mdp>;
interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */
...
};
There is a slight awkwardness, in that we cannot disable child irqs
at the mdp level, they can only be cleared in the child block. So
you must not use threaded irq handlers in the child. I'm not sure
if there is a better way to deal with that.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-18 03:28:07 +07:00
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#include <linux/of_irq.h>
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2015-10-30 14:05:55 +07:00
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#include <linux/of_gpio.h>
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2016-06-10 16:45:56 +07:00
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#include <sound/hdmi-codec.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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#include "hdmi.h"
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2016-02-23 04:08:35 +07:00
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void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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{
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uint32_t ctrl = 0;
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2015-04-03 04:49:01 +07:00
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unsigned long flags;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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2015-04-03 04:49:01 +07:00
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spin_lock_irqsave(&hdmi->reg_lock, flags);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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if (power_on) {
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ctrl |= HDMI_CTRL_ENABLE;
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if (!hdmi->hdmi_mode) {
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ctrl |= HDMI_CTRL_HDMI;
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hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
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ctrl &= ~HDMI_CTRL_HDMI;
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} else {
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ctrl |= HDMI_CTRL_HDMI;
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}
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} else {
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ctrl = HDMI_CTRL_HDMI;
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}
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hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
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2015-04-03 04:49:01 +07:00
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spin_unlock_irqrestore(&hdmi->reg_lock, flags);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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DBG("HDMI Core: %s, HDMI_CTRL=0x%08x",
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power_on ? "Enable" : "Disable", ctrl);
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}
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2016-02-23 04:08:35 +07:00
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static irqreturn_t msm_hdmi_irq(int irq, void *dev_id)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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{
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struct hdmi *hdmi = dev_id;
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/* Process HPD: */
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2016-02-23 04:08:35 +07:00
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msm_hdmi_connector_irq(hdmi->connector);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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/* Process DDC: */
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2016-02-23 04:08:35 +07:00
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msm_hdmi_i2c_irq(hdmi->i2c);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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2015-04-03 04:49:01 +07:00
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/* Process HDCP: */
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if (hdmi->hdcp_ctrl)
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2016-02-23 04:08:35 +07:00
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msm_hdmi_hdcp_irq(hdmi->hdcp_ctrl);
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2015-04-03 04:49:01 +07:00
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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/* TODO audio.. */
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return IRQ_HANDLED;
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}
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2016-02-23 04:08:35 +07:00
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static void msm_hdmi_destroy(struct hdmi *hdmi)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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{
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2015-04-03 04:49:01 +07:00
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/*
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* at this point, hpd has been disabled,
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* after flush workq, it's safe to deinit hdcp
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*/
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if (hdmi->workq) {
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flush_workqueue(hdmi->workq);
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destroy_workqueue(hdmi->workq);
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}
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2016-02-23 04:08:35 +07:00
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msm_hdmi_hdcp_destroy(hdmi);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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2016-02-25 12:52:40 +07:00
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if (hdmi->phy_dev) {
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put_device(hdmi->phy_dev);
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hdmi->phy = NULL;
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hdmi->phy_dev = NULL;
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}
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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if (hdmi->i2c)
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2016-02-23 04:08:35 +07:00
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msm_hdmi_i2c_destroy(hdmi->i2c);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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2013-12-12 02:44:02 +07:00
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platform_set_drvdata(hdmi->pdev, NULL);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
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|
}
|
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|
2016-02-23 04:08:35 +07:00
|
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static int msm_hdmi_get_phy(struct hdmi *hdmi)
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2016-02-25 12:52:40 +07:00
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{
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struct platform_device *pdev = hdmi->pdev;
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struct platform_device *phy_pdev;
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struct device_node *phy_node;
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phy_node = of_parse_phandle(pdev->dev.of_node, "phys", 0);
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if (!phy_node) {
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|
|
dev_err(&pdev->dev, "cannot find phy device\n");
|
|
|
|
return -ENXIO;
|
|
|
|
}
|
|
|
|
|
|
|
|
phy_pdev = of_find_device_by_node(phy_node);
|
|
|
|
if (phy_pdev)
|
|
|
|
hdmi->phy = platform_get_drvdata(phy_pdev);
|
|
|
|
|
|
|
|
of_node_put(phy_node);
|
|
|
|
|
|
|
|
if (!phy_pdev || !hdmi->phy) {
|
|
|
|
dev_err(&pdev->dev, "phy driver is not ready\n");
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
}
|
|
|
|
|
|
|
|
hdmi->phy_dev = get_device(&phy_pdev->dev);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-11-05 01:33:14 +07:00
|
|
|
/* construct hdmi at bind/probe time, grab all the resources. If
|
|
|
|
* we are to EPROBE_DEFER we want to do it here, rather than later
|
|
|
|
* at modeset_init() time
|
|
|
|
*/
|
2016-02-23 04:08:35 +07:00
|
|
|
static struct hdmi *msm_hdmi_init(struct platform_device *pdev)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
{
|
2014-11-05 01:33:14 +07:00
|
|
|
struct hdmi_platform_config *config = pdev->dev.platform_data;
|
2013-08-31 00:02:15 +07:00
|
|
|
struct hdmi *hdmi = NULL;
|
2015-04-03 04:49:01 +07:00
|
|
|
struct resource *res;
|
2013-12-02 00:12:54 +07:00
|
|
|
int i, ret;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2014-11-05 01:33:14 +07:00
|
|
|
hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
|
2013-08-31 00:02:15 +07:00
|
|
|
if (!hdmi) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
hdmi->pdev = pdev;
|
2013-12-02 00:12:54 +07:00
|
|
|
hdmi->config = config;
|
2015-04-03 04:49:01 +07:00
|
|
|
spin_lock_init(&hdmi->reg_lock);
|
2013-12-12 02:44:02 +07:00
|
|
|
|
2013-12-02 00:12:54 +07:00
|
|
|
hdmi->mmio = msm_ioremap(pdev, config->mmio_name, "HDMI");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
if (IS_ERR(hdmi->mmio)) {
|
|
|
|
ret = PTR_ERR(hdmi->mmio);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2015-04-03 04:49:01 +07:00
|
|
|
/* HDCP needs physical address of hdmi register */
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
|
|
|
config->mmio_name);
|
|
|
|
hdmi->mmio_phy_addr = res->start;
|
|
|
|
|
|
|
|
hdmi->qfprom_mmio = msm_ioremap(pdev,
|
|
|
|
config->qfprom_mmio_name, "HDMI_QFPROM");
|
|
|
|
if (IS_ERR(hdmi->qfprom_mmio)) {
|
|
|
|
dev_info(&pdev->dev, "can't find qfprom resource\n");
|
|
|
|
hdmi->qfprom_mmio = NULL;
|
|
|
|
}
|
|
|
|
|
2015-01-14 02:33:40 +07:00
|
|
|
hdmi->hpd_regs = devm_kzalloc(&pdev->dev, sizeof(hdmi->hpd_regs[0]) *
|
|
|
|
config->hpd_reg_cnt, GFP_KERNEL);
|
|
|
|
if (!hdmi->hpd_regs) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
2013-12-02 00:12:54 +07:00
|
|
|
for (i = 0; i < config->hpd_reg_cnt; i++) {
|
|
|
|
struct regulator *reg;
|
|
|
|
|
2014-08-02 00:08:11 +07:00
|
|
|
reg = devm_regulator_get(&pdev->dev,
|
2013-12-16 04:23:05 +07:00
|
|
|
config->hpd_reg_names[i]);
|
2013-12-02 00:12:54 +07:00
|
|
|
if (IS_ERR(reg)) {
|
|
|
|
ret = PTR_ERR(reg);
|
2014-11-05 01:33:14 +07:00
|
|
|
dev_err(&pdev->dev, "failed to get hpd regulator: %s (%d)\n",
|
2013-12-02 00:12:54 +07:00
|
|
|
config->hpd_reg_names[i], ret);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
hdmi->hpd_regs[i] = reg;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
}
|
|
|
|
|
2015-01-14 02:33:40 +07:00
|
|
|
hdmi->pwr_regs = devm_kzalloc(&pdev->dev, sizeof(hdmi->pwr_regs[0]) *
|
|
|
|
config->pwr_reg_cnt, GFP_KERNEL);
|
|
|
|
if (!hdmi->pwr_regs) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
2013-12-02 00:12:54 +07:00
|
|
|
for (i = 0; i < config->pwr_reg_cnt; i++) {
|
|
|
|
struct regulator *reg;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2014-08-02 00:08:11 +07:00
|
|
|
reg = devm_regulator_get(&pdev->dev,
|
2013-12-16 04:23:05 +07:00
|
|
|
config->pwr_reg_names[i]);
|
2013-12-02 00:12:54 +07:00
|
|
|
if (IS_ERR(reg)) {
|
|
|
|
ret = PTR_ERR(reg);
|
2014-11-05 01:33:14 +07:00
|
|
|
dev_err(&pdev->dev, "failed to get pwr regulator: %s (%d)\n",
|
2013-12-02 00:12:54 +07:00
|
|
|
config->pwr_reg_names[i], ret);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
hdmi->pwr_regs[i] = reg;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
}
|
|
|
|
|
2015-01-14 02:33:40 +07:00
|
|
|
hdmi->hpd_clks = devm_kzalloc(&pdev->dev, sizeof(hdmi->hpd_clks[0]) *
|
|
|
|
config->hpd_clk_cnt, GFP_KERNEL);
|
|
|
|
if (!hdmi->hpd_clks) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
2013-12-02 00:12:54 +07:00
|
|
|
for (i = 0; i < config->hpd_clk_cnt; i++) {
|
|
|
|
struct clk *clk;
|
|
|
|
|
2017-10-17 03:56:28 +07:00
|
|
|
clk = msm_clk_get(pdev, config->hpd_clk_names[i]);
|
2013-12-02 00:12:54 +07:00
|
|
|
if (IS_ERR(clk)) {
|
|
|
|
ret = PTR_ERR(clk);
|
2014-11-05 01:33:14 +07:00
|
|
|
dev_err(&pdev->dev, "failed to get hpd clk: %s (%d)\n",
|
2013-12-02 00:12:54 +07:00
|
|
|
config->hpd_clk_names[i], ret);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
hdmi->hpd_clks[i] = clk;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
}
|
|
|
|
|
2015-01-14 02:33:40 +07:00
|
|
|
hdmi->pwr_clks = devm_kzalloc(&pdev->dev, sizeof(hdmi->pwr_clks[0]) *
|
|
|
|
config->pwr_clk_cnt, GFP_KERNEL);
|
|
|
|
if (!hdmi->pwr_clks) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
2013-12-02 00:12:54 +07:00
|
|
|
for (i = 0; i < config->pwr_clk_cnt; i++) {
|
|
|
|
struct clk *clk;
|
|
|
|
|
2017-10-17 03:56:28 +07:00
|
|
|
clk = msm_clk_get(pdev, config->pwr_clk_names[i]);
|
2013-12-02 00:12:54 +07:00
|
|
|
if (IS_ERR(clk)) {
|
|
|
|
ret = PTR_ERR(clk);
|
2014-11-05 01:33:14 +07:00
|
|
|
dev_err(&pdev->dev, "failed to get pwr clk: %s (%d)\n",
|
2013-12-02 00:12:54 +07:00
|
|
|
config->pwr_clk_names[i], ret);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
hdmi->pwr_clks[i] = clk;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
}
|
|
|
|
|
2017-07-28 17:47:02 +07:00
|
|
|
pm_runtime_enable(&pdev->dev);
|
|
|
|
|
2015-04-03 04:49:01 +07:00
|
|
|
hdmi->workq = alloc_ordered_workqueue("msm_hdmi", 0);
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
hdmi->i2c = msm_hdmi_i2c_init(hdmi);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
if (IS_ERR(hdmi->i2c)) {
|
|
|
|
ret = PTR_ERR(hdmi->i2c);
|
2014-11-05 01:33:14 +07:00
|
|
|
dev_err(&pdev->dev, "failed to get i2c: %d\n", ret);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
hdmi->i2c = NULL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
ret = msm_hdmi_get_phy(hdmi);
|
2016-02-25 12:52:40 +07:00
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "failed to get phy\n");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
hdmi->hdcp_ctrl = msm_hdmi_hdcp_init(hdmi);
|
2015-04-03 04:49:01 +07:00
|
|
|
if (IS_ERR(hdmi->hdcp_ctrl)) {
|
|
|
|
dev_warn(&pdev->dev, "failed to init hdcp: disabled\n");
|
|
|
|
hdmi->hdcp_ctrl = NULL;
|
|
|
|
}
|
|
|
|
|
2014-11-05 01:33:14 +07:00
|
|
|
return hdmi;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
if (hdmi)
|
2016-02-23 04:08:35 +07:00
|
|
|
msm_hdmi_destroy(hdmi);
|
2014-11-05 01:33:14 +07:00
|
|
|
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Second part of initialization, the drm/kms level modeset_init,
|
|
|
|
* constructs/initializes mode objects, etc, is called from master
|
|
|
|
* driver (not hdmi sub-device's probe/bind!)
|
|
|
|
*
|
|
|
|
* Any resource (regulator/clk/etc) which could be missing at boot
|
2016-02-23 04:08:35 +07:00
|
|
|
* should be handled in msm_hdmi_init() so that failure happens from
|
2014-11-05 01:33:14 +07:00
|
|
|
* hdmi sub-device's probe.
|
|
|
|
*/
|
2016-02-23 04:08:35 +07:00
|
|
|
int msm_hdmi_modeset_init(struct hdmi *hdmi,
|
2014-11-05 01:33:14 +07:00
|
|
|
struct drm_device *dev, struct drm_encoder *encoder)
|
|
|
|
{
|
|
|
|
struct msm_drm_private *priv = dev->dev_private;
|
|
|
|
struct platform_device *pdev = hdmi->pdev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
hdmi->dev = dev;
|
|
|
|
hdmi->encoder = encoder;
|
|
|
|
|
|
|
|
hdmi_audio_infoframe_init(&hdmi->audio.infoframe);
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
hdmi->bridge = msm_hdmi_bridge_init(hdmi);
|
2013-08-31 00:02:15 +07:00
|
|
|
if (IS_ERR(hdmi->bridge)) {
|
|
|
|
ret = PTR_ERR(hdmi->bridge);
|
|
|
|
dev_err(dev->dev, "failed to create HDMI bridge: %d\n", ret);
|
|
|
|
hdmi->bridge = NULL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
hdmi->connector = msm_hdmi_connector_init(hdmi);
|
2013-08-31 00:02:15 +07:00
|
|
|
if (IS_ERR(hdmi->connector)) {
|
|
|
|
ret = PTR_ERR(hdmi->connector);
|
|
|
|
dev_err(dev->dev, "failed to create HDMI connector: %d\n", ret);
|
|
|
|
hdmi->connector = NULL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
drm/msm/mdp5: use irqdomains
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
mdp block. In order to decouple hdmi/eDP/etc, register an irq domain
in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup
their irqs in their DT nodes as normal. When used with mdp5, instead
set the mdp device as the interrupt-parent, as in:
mdp: qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
interrupt-controller;
#interrupt-cells = <1>;
...
};
hdmi: qcom,hdmi_tx@fd922100 {
compatible = "qcom,hdmi-tx-8074";
interrupt-parent = <&mdp>;
interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */
...
};
There is a slight awkwardness, in that we cannot disable child irqs
at the mdp level, they can only be cleared in the child block. So
you must not use threaded irq handlers in the child. I'm not sure
if there is a better way to deal with that.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-18 03:28:07 +07:00
|
|
|
hdmi->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
|
|
|
|
if (hdmi->irq < 0) {
|
|
|
|
ret = hdmi->irq;
|
|
|
|
dev_err(dev->dev, "failed to get irq: %d\n", ret);
|
|
|
|
goto fail;
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
drm/msm/mdp5: use irqdomains
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
mdp block. In order to decouple hdmi/eDP/etc, register an irq domain
in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup
their irqs in their DT nodes as normal. When used with mdp5, instead
set the mdp device as the interrupt-parent, as in:
mdp: qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
interrupt-controller;
#interrupt-cells = <1>;
...
};
hdmi: qcom,hdmi_tx@fd922100 {
compatible = "qcom,hdmi-tx-8074";
interrupt-parent = <&mdp>;
interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */
...
};
There is a slight awkwardness, in that we cannot disable child irqs
at the mdp level, they can only be cleared in the child block. So
you must not use threaded irq handlers in the child. I'm not sure
if there is a better way to deal with that.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-18 03:28:07 +07:00
|
|
|
ret = devm_request_irq(&pdev->dev, hdmi->irq,
|
2016-02-23 04:08:35 +07:00
|
|
|
msm_hdmi_irq, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
|
drm/msm/mdp5: use irqdomains
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
mdp block. In order to decouple hdmi/eDP/etc, register an irq domain
in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup
their irqs in their DT nodes as normal. When used with mdp5, instead
set the mdp device as the interrupt-parent, as in:
mdp: qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
interrupt-controller;
#interrupt-cells = <1>;
...
};
hdmi: qcom,hdmi_tx@fd922100 {
compatible = "qcom,hdmi-tx-8074";
interrupt-parent = <&mdp>;
interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */
...
};
There is a slight awkwardness, in that we cannot disable child irqs
at the mdp level, they can only be cleared in the child block. So
you must not use threaded irq handlers in the child. I'm not sure
if there is a better way to deal with that.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-18 03:28:07 +07:00
|
|
|
"hdmi_isr", hdmi);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(dev->dev, "failed to request IRQ%u: %d\n",
|
|
|
|
hdmi->irq, ret);
|
|
|
|
goto fail;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
}
|
|
|
|
|
2013-08-31 00:02:15 +07:00
|
|
|
encoder->bridge = hdmi->bridge;
|
|
|
|
|
|
|
|
priv->bridges[priv->num_bridges++] = hdmi->bridge;
|
|
|
|
priv->connectors[priv->num_connectors++] = hdmi->connector;
|
|
|
|
|
2013-12-12 02:44:02 +07:00
|
|
|
platform_set_drvdata(pdev, hdmi);
|
|
|
|
|
2014-11-05 01:33:14 +07:00
|
|
|
return 0;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
|
|
|
fail:
|
2015-01-20 23:38:44 +07:00
|
|
|
/* bridge is normally destroyed by drm: */
|
2014-11-05 01:33:14 +07:00
|
|
|
if (hdmi->bridge) {
|
2016-02-23 04:08:35 +07:00
|
|
|
msm_hdmi_bridge_destroy(hdmi->bridge);
|
2014-11-05 01:33:14 +07:00
|
|
|
hdmi->bridge = NULL;
|
|
|
|
}
|
|
|
|
if (hdmi->connector) {
|
|
|
|
hdmi->connector->funcs->destroy(hdmi->connector);
|
|
|
|
hdmi->connector = NULL;
|
2013-08-31 00:02:15 +07:00
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
|
2014-11-05 01:33:14 +07:00
|
|
|
return ret;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The hdmi device:
|
|
|
|
*/
|
|
|
|
|
2015-01-08 04:27:27 +07:00
|
|
|
#define HDMI_CFG(item, entry) \
|
|
|
|
.item ## _names = item ##_names_ ## entry, \
|
|
|
|
.item ## _cnt = ARRAY_SIZE(item ## _names_ ## entry)
|
|
|
|
|
2015-09-15 19:41:49 +07:00
|
|
|
static const char *pwr_reg_names_none[] = {};
|
|
|
|
static const char *hpd_reg_names_none[] = {};
|
|
|
|
|
2016-02-25 12:52:41 +07:00
|
|
|
static struct hdmi_platform_config hdmi_tx_8660_config;
|
2015-01-08 04:27:27 +07:00
|
|
|
|
|
|
|
static const char *hpd_reg_names_8960[] = {"core-vdda", "hdmi-mux"};
|
2017-10-17 03:56:28 +07:00
|
|
|
static const char *hpd_clk_names_8960[] = {"core", "master_iface", "slave_iface"};
|
2015-01-08 04:27:27 +07:00
|
|
|
|
|
|
|
static struct hdmi_platform_config hdmi_tx_8960_config = {
|
|
|
|
HDMI_CFG(hpd_reg, 8960),
|
|
|
|
HDMI_CFG(hpd_clk, 8960),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const char *pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"};
|
|
|
|
static const char *hpd_reg_names_8x74[] = {"hpd-gdsc", "hpd-5v"};
|
2017-10-17 03:56:28 +07:00
|
|
|
static const char *pwr_clk_names_8x74[] = {"extp", "alt_iface"};
|
|
|
|
static const char *hpd_clk_names_8x74[] = {"iface", "core", "mdp_core"};
|
2015-01-08 04:27:27 +07:00
|
|
|
static unsigned long hpd_clk_freq_8x74[] = {0, 19200000, 0};
|
|
|
|
|
2015-07-28 07:52:50 +07:00
|
|
|
static struct hdmi_platform_config hdmi_tx_8974_config = {
|
2015-01-08 04:27:27 +07:00
|
|
|
HDMI_CFG(pwr_reg, 8x74),
|
|
|
|
HDMI_CFG(hpd_reg, 8x74),
|
|
|
|
HDMI_CFG(pwr_clk, 8x74),
|
|
|
|
HDMI_CFG(hpd_clk, 8x74),
|
|
|
|
.hpd_freq = hpd_clk_freq_8x74,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const char *hpd_reg_names_8084[] = {"hpd-gdsc", "hpd-5v", "hpd-5v-en"};
|
|
|
|
|
|
|
|
static struct hdmi_platform_config hdmi_tx_8084_config = {
|
|
|
|
HDMI_CFG(pwr_reg, 8x74),
|
|
|
|
HDMI_CFG(hpd_reg, 8084),
|
|
|
|
HDMI_CFG(pwr_clk, 8x74),
|
|
|
|
HDMI_CFG(hpd_clk, 8x74),
|
|
|
|
.hpd_freq = hpd_clk_freq_8x74,
|
|
|
|
};
|
|
|
|
|
2015-07-28 07:52:50 +07:00
|
|
|
static struct hdmi_platform_config hdmi_tx_8994_config = {
|
2015-06-20 03:04:47 +07:00
|
|
|
HDMI_CFG(pwr_reg, 8x74),
|
2015-09-15 19:41:49 +07:00
|
|
|
HDMI_CFG(hpd_reg, none),
|
|
|
|
HDMI_CFG(pwr_clk, 8x74),
|
|
|
|
HDMI_CFG(hpd_clk, 8x74),
|
|
|
|
.hpd_freq = hpd_clk_freq_8x74,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct hdmi_platform_config hdmi_tx_8996_config = {
|
|
|
|
HDMI_CFG(pwr_reg, none),
|
|
|
|
HDMI_CFG(hpd_reg, none),
|
2015-06-20 03:04:47 +07:00
|
|
|
HDMI_CFG(pwr_clk, 8x74),
|
|
|
|
HDMI_CFG(hpd_clk, 8x74),
|
|
|
|
.hpd_freq = hpd_clk_freq_8x74,
|
|
|
|
};
|
|
|
|
|
2016-02-25 12:52:36 +07:00
|
|
|
static const struct {
|
|
|
|
const char *name;
|
|
|
|
const bool output;
|
|
|
|
const int value;
|
|
|
|
const char *label;
|
2016-02-23 04:08:35 +07:00
|
|
|
} msm_hdmi_gpio_pdata[] = {
|
2016-02-25 12:52:36 +07:00
|
|
|
{ "qcom,hdmi-tx-ddc-clk", true, 1, "HDMI_DDC_CLK" },
|
|
|
|
{ "qcom,hdmi-tx-ddc-data", true, 1, "HDMI_DDC_DATA" },
|
|
|
|
{ "qcom,hdmi-tx-hpd", false, 1, "HDMI_HPD" },
|
|
|
|
{ "qcom,hdmi-tx-mux-en", true, 1, "HDMI_MUX_EN" },
|
|
|
|
{ "qcom,hdmi-tx-mux-sel", true, 0, "HDMI_MUX_SEL" },
|
|
|
|
{ "qcom,hdmi-tx-mux-lpm", true, 1, "HDMI_MUX_LPM" },
|
|
|
|
};
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static int msm_hdmi_get_gpio(struct device_node *of_node, const char *name)
|
2014-08-30 01:05:50 +07:00
|
|
|
{
|
2016-09-13 22:21:35 +07:00
|
|
|
int gpio;
|
|
|
|
|
|
|
|
/* try with the gpio names as in the table (downstream bindings) */
|
|
|
|
gpio = of_get_named_gpio(of_node, name, 0);
|
2014-08-30 01:05:50 +07:00
|
|
|
if (gpio < 0) {
|
|
|
|
char name2[32];
|
2016-09-13 22:21:35 +07:00
|
|
|
|
|
|
|
/* try with the gpio names as in the upstream bindings */
|
|
|
|
snprintf(name2, sizeof(name2), "%s-gpios", name);
|
2014-08-30 01:05:50 +07:00
|
|
|
gpio = of_get_named_gpio(of_node, name2, 0);
|
2016-09-13 22:21:35 +07:00
|
|
|
if (gpio < 0) {
|
|
|
|
char name3[32];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* try again after stripping out the "qcom,hdmi-tx"
|
|
|
|
* prefix. This is mainly to match "hpd-gpios" used
|
|
|
|
* in the upstream bindings
|
|
|
|
*/
|
|
|
|
if (sscanf(name2, "qcom,hdmi-tx-%s", name3))
|
|
|
|
gpio = of_get_named_gpio(of_node, name3, 0);
|
|
|
|
}
|
|
|
|
|
2014-08-30 01:05:50 +07:00
|
|
|
if (gpio < 0) {
|
2015-06-20 03:04:47 +07:00
|
|
|
DBG("failed to get gpio: %s (%d)", name, gpio);
|
2014-08-30 01:05:50 +07:00
|
|
|
gpio = -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return gpio;
|
|
|
|
}
|
|
|
|
|
2016-06-10 16:45:56 +07:00
|
|
|
/*
|
|
|
|
* HDMI audio codec callbacks
|
|
|
|
*/
|
|
|
|
static int msm_hdmi_audio_hw_params(struct device *dev, void *data,
|
|
|
|
struct hdmi_codec_daifmt *daifmt,
|
|
|
|
struct hdmi_codec_params *params)
|
|
|
|
{
|
|
|
|
struct hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
unsigned int chan;
|
|
|
|
unsigned int channel_allocation = 0;
|
|
|
|
unsigned int rate;
|
|
|
|
unsigned int level_shift = 0; /* 0dB */
|
|
|
|
bool down_mix = false;
|
|
|
|
|
|
|
|
dev_dbg(dev, "%u Hz, %d bit, %d channels\n", params->sample_rate,
|
|
|
|
params->sample_width, params->cea.channels);
|
|
|
|
|
|
|
|
switch (params->cea.channels) {
|
|
|
|
case 2:
|
|
|
|
/* FR and FL speakers */
|
|
|
|
channel_allocation = 0;
|
|
|
|
chan = MSM_HDMI_AUDIO_CHANNEL_2;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
/* FC, LFE, FR and FL speakers */
|
|
|
|
channel_allocation = 0x3;
|
|
|
|
chan = MSM_HDMI_AUDIO_CHANNEL_4;
|
|
|
|
break;
|
|
|
|
case 6:
|
|
|
|
/* RR, RL, FC, LFE, FR and FL speakers */
|
|
|
|
channel_allocation = 0x0B;
|
|
|
|
chan = MSM_HDMI_AUDIO_CHANNEL_6;
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
/* FRC, FLC, RR, RL, FC, LFE, FR and FL speakers */
|
|
|
|
channel_allocation = 0x1F;
|
|
|
|
chan = MSM_HDMI_AUDIO_CHANNEL_8;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (params->sample_rate) {
|
|
|
|
case 32000:
|
|
|
|
rate = HDMI_SAMPLE_RATE_32KHZ;
|
|
|
|
break;
|
|
|
|
case 44100:
|
|
|
|
rate = HDMI_SAMPLE_RATE_44_1KHZ;
|
|
|
|
break;
|
|
|
|
case 48000:
|
|
|
|
rate = HDMI_SAMPLE_RATE_48KHZ;
|
|
|
|
break;
|
|
|
|
case 88200:
|
|
|
|
rate = HDMI_SAMPLE_RATE_88_2KHZ;
|
|
|
|
break;
|
|
|
|
case 96000:
|
|
|
|
rate = HDMI_SAMPLE_RATE_96KHZ;
|
|
|
|
break;
|
|
|
|
case 176400:
|
|
|
|
rate = HDMI_SAMPLE_RATE_176_4KHZ;
|
|
|
|
break;
|
|
|
|
case 192000:
|
|
|
|
rate = HDMI_SAMPLE_RATE_192KHZ;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(dev, "rate[%d] not supported!\n",
|
|
|
|
params->sample_rate);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
msm_hdmi_audio_set_sample_rate(hdmi, rate);
|
|
|
|
msm_hdmi_audio_info_setup(hdmi, 1, chan, channel_allocation,
|
|
|
|
level_shift, down_mix);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void msm_hdmi_audio_shutdown(struct device *dev, void *data)
|
|
|
|
{
|
|
|
|
struct hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
|
|
|
|
msm_hdmi_audio_info_setup(hdmi, 0, 0, 0, 0, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct hdmi_codec_ops msm_hdmi_audio_codec_ops = {
|
|
|
|
.hw_params = msm_hdmi_audio_hw_params,
|
|
|
|
.audio_shutdown = msm_hdmi_audio_shutdown,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct hdmi_codec_pdata codec_data = {
|
|
|
|
.ops = &msm_hdmi_audio_codec_ops,
|
|
|
|
.max_i2s_channels = 8,
|
|
|
|
.i2s = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int msm_hdmi_register_audio_driver(struct hdmi *hdmi, struct device *dev)
|
|
|
|
{
|
|
|
|
hdmi->audio_pdev = platform_device_register_data(dev,
|
|
|
|
HDMI_CODEC_DRV_NAME,
|
|
|
|
PLATFORM_DEVID_AUTO,
|
|
|
|
&codec_data,
|
|
|
|
sizeof(codec_data));
|
2016-07-12 18:06:52 +07:00
|
|
|
return PTR_ERR_OR_ZERO(hdmi->audio_pdev);
|
2016-06-10 16:45:56 +07:00
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static int msm_hdmi_bind(struct device *dev, struct device *master, void *data)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
{
|
2014-11-18 20:40:44 +07:00
|
|
|
struct drm_device *drm = dev_get_drvdata(master);
|
|
|
|
struct msm_drm_private *priv = drm->dev_private;
|
2015-01-08 04:27:27 +07:00
|
|
|
static struct hdmi_platform_config *hdmi_cfg;
|
2014-11-05 01:33:14 +07:00
|
|
|
struct hdmi *hdmi;
|
2014-03-04 02:19:12 +07:00
|
|
|
struct device_node *of_node = dev->of_node;
|
2016-06-10 16:45:56 +07:00
|
|
|
int i, err;
|
2013-12-02 00:12:54 +07:00
|
|
|
|
2015-10-30 14:05:55 +07:00
|
|
|
hdmi_cfg = (struct hdmi_platform_config *)
|
|
|
|
of_device_get_match_data(dev);
|
|
|
|
if (!hdmi_cfg) {
|
|
|
|
dev_err(dev, "unknown hdmi_cfg: %s\n", of_node->name);
|
2015-01-08 04:27:27 +07:00
|
|
|
return -ENXIO;
|
2013-12-16 04:23:05 +07:00
|
|
|
}
|
2013-12-02 00:12:54 +07:00
|
|
|
|
2015-01-08 04:27:27 +07:00
|
|
|
hdmi_cfg->mmio_name = "core_physical";
|
2015-04-03 04:49:01 +07:00
|
|
|
hdmi_cfg->qfprom_mmio_name = "qfprom_physical";
|
2016-02-25 12:52:36 +07:00
|
|
|
|
|
|
|
for (i = 0; i < HDMI_MAX_NUM_GPIO; i++) {
|
2016-02-23 04:08:35 +07:00
|
|
|
hdmi_cfg->gpios[i].num = msm_hdmi_get_gpio(of_node,
|
|
|
|
msm_hdmi_gpio_pdata[i].name);
|
|
|
|
hdmi_cfg->gpios[i].output = msm_hdmi_gpio_pdata[i].output;
|
|
|
|
hdmi_cfg->gpios[i].value = msm_hdmi_gpio_pdata[i].value;
|
|
|
|
hdmi_cfg->gpios[i].label = msm_hdmi_gpio_pdata[i].label;
|
2016-02-25 12:52:36 +07:00
|
|
|
}
|
2013-12-02 00:12:54 +07:00
|
|
|
|
2015-01-08 04:27:27 +07:00
|
|
|
dev->platform_data = hdmi_cfg;
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
hdmi = msm_hdmi_init(to_platform_device(dev));
|
2014-11-05 01:33:14 +07:00
|
|
|
if (IS_ERR(hdmi))
|
|
|
|
return PTR_ERR(hdmi);
|
2014-11-18 20:40:44 +07:00
|
|
|
priv->hdmi = hdmi;
|
2015-01-08 04:27:27 +07:00
|
|
|
|
2016-06-10 16:45:56 +07:00
|
|
|
err = msm_hdmi_register_audio_driver(hdmi, dev);
|
|
|
|
if (err) {
|
|
|
|
DRM_ERROR("Failed to attach an audio codec %d\n", err);
|
|
|
|
hdmi->audio_pdev = NULL;
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static void msm_hdmi_unbind(struct device *dev, struct device *master,
|
2014-03-04 02:19:12 +07:00
|
|
|
void *data)
|
|
|
|
{
|
2014-11-18 20:40:44 +07:00
|
|
|
struct drm_device *drm = dev_get_drvdata(master);
|
|
|
|
struct msm_drm_private *priv = drm->dev_private;
|
|
|
|
if (priv->hdmi) {
|
2016-06-10 16:45:56 +07:00
|
|
|
if (priv->hdmi->audio_pdev)
|
|
|
|
platform_device_unregister(priv->hdmi->audio_pdev);
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
msm_hdmi_destroy(priv->hdmi);
|
2014-11-18 20:40:44 +07:00
|
|
|
priv->hdmi = NULL;
|
|
|
|
}
|
2014-03-04 02:19:12 +07:00
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static const struct component_ops msm_hdmi_ops = {
|
|
|
|
.bind = msm_hdmi_bind,
|
|
|
|
.unbind = msm_hdmi_unbind,
|
2014-03-04 02:19:12 +07:00
|
|
|
};
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static int msm_hdmi_dev_probe(struct platform_device *pdev)
|
2014-03-04 02:19:12 +07:00
|
|
|
{
|
2016-02-23 04:08:35 +07:00
|
|
|
return component_add(&pdev->dev, &msm_hdmi_ops);
|
2014-03-04 02:19:12 +07:00
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static int msm_hdmi_dev_remove(struct platform_device *pdev)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
{
|
2016-02-23 04:08:35 +07:00
|
|
|
component_del(&pdev->dev, &msm_hdmi_ops);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static const struct of_device_id msm_hdmi_dt_match[] = {
|
2015-10-30 14:05:55 +07:00
|
|
|
{ .compatible = "qcom,hdmi-tx-8996", .data = &hdmi_tx_8996_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8994", .data = &hdmi_tx_8994_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8084", .data = &hdmi_tx_8084_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8974", .data = &hdmi_tx_8974_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8960", .data = &hdmi_tx_8960_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8660", .data = &hdmi_tx_8660_config },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
static struct platform_driver msm_hdmi_driver = {
|
|
|
|
.probe = msm_hdmi_dev_probe,
|
|
|
|
.remove = msm_hdmi_dev_remove,
|
2013-12-02 00:12:54 +07:00
|
|
|
.driver = {
|
|
|
|
.name = "hdmi_msm",
|
2016-02-23 04:08:35 +07:00
|
|
|
.of_match_table = msm_hdmi_dt_match,
|
2013-12-02 00:12:54 +07:00
|
|
|
},
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
};
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
void __init msm_hdmi_register(void)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
{
|
2016-02-23 04:08:35 +07:00
|
|
|
msm_hdmi_phy_driver_register();
|
|
|
|
platform_driver_register(&msm_hdmi_driver);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
}
|
|
|
|
|
2016-02-23 04:08:35 +07:00
|
|
|
void __exit msm_hdmi_unregister(void)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
|
|
|
{
|
2016-02-23 04:08:35 +07:00
|
|
|
platform_driver_unregister(&msm_hdmi_driver);
|
|
|
|
msm_hdmi_phy_driver_unregister();
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 23:44:06 +07:00
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