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linux_dsm_epyc7002/Documentation/ABI/testing/sysfs-devices-lpss_ltr

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ACPI / LPSS: Add support for exposing LTR registers to user space Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have registers providing access to LTR (Latency Tolerance Reporting) functionality that allows software to monitor and possibly influence the aggressiveness of the platform's active-state power management. For each LPSS device, there are two modes of operation related to LTR, the auto mode and the software mode. In the auto mode the LTR is set up by the platform firmware and managed by hardware. Software can only read the LTR register values to monitor the platform's behavior. In the software mode it is possible to use LTR to control the extent to which the platform will use its built-in power management features. This changeset adds support for reading the LPSS devices' LTR registers and exposing their values to user space for monitoring and diagnostics purposes. It re-uses the MMIO mappings created to access the LPSS devices' clock registers for reading the values of the LTR registers and exposes them to user space through sysfs device attributes. Namely, a new atrribute group, lpss_ltr, is created for each LPSS device. It contains three new attributes: ltr_mode, auto_ltr, sw_ltr. The value of the ltr_mode attribute reflects the LTR mode being used at the moment (software vs auto) and the other two contain the actual register values (raw) whose meaning depends on the LTR mode. All of these attributes are read-only. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-03-07 05:46:28 +07:00
What: /sys/devices/.../lpss_ltr/
Date: March 2013
Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Description:
The /sys/devices/.../lpss_ltr/ directory is only present for
devices included into the Intel Lynxpoint Low Power Subsystem
(LPSS). If present, it contains attributes containing the LTR
mode and the values of LTR registers of the device.
What: /sys/devices/.../lpss_ltr/ltr_mode
Date: March 2013
Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Description:
The /sys/devices/.../lpss_ltr/ltr_mode attribute contains an
integer number (0 or 1) indicating whether or not the devices'
LTR functionality is working in the software mode (1).
This attribute is read-only. If the device's runtime PM status
is not "active", attempts to read from this attribute cause
-EAGAIN to be returned.
What: /sys/devices/.../lpss_ltr/auto_ltr
Date: March 2013
Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Description:
The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
current value of the device's AUTO_LTR register (raw)
represented as an 8-digit hexadecimal number.
This attribute is read-only. If the device's runtime PM status
is not "active", attempts to read from this attribute cause
-EAGAIN to be returned.
What: /sys/devices/.../lpss_ltr/sw_ltr
Date: March 2013
Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Description:
The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
current value of the device's SW_LTR register (raw) represented
as an 8-digit hexadecimal number.
This attribute is read-only. If the device's runtime PM status
is not "active", attempts to read from this attribute cause
-EAGAIN to be returned.
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