2005-04-17 05:20:36 +07:00
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/*
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* linux/arch/arm/mach-sa1100/assabet.c
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*
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* Author: Nicolas Pitre
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*
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* This file contains all Assabet-specific tweaks.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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2016-08-31 14:49:45 +07:00
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#include <linux/gpio/gpio-reg.h>
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2016-08-31 14:49:47 +07:00
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#include <linux/gpio/machine.h>
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2016-08-31 14:49:50 +07:00
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#include <linux/gpio_keys.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/ioport.h>
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2012-09-21 16:18:58 +07:00
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#include <linux/platform_data/sa11x0-serial.h>
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2016-08-31 14:49:47 +07:00
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/serial_core.h>
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2013-02-15 05:26:50 +07:00
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#include <linux/platform_device.h>
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2012-01-21 05:18:06 +07:00
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#include <linux/mfd/ucb1x00.h>
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2005-04-17 05:20:36 +07:00
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <linux/mm.h>
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2012-03-14 01:22:03 +07:00
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#include <linux/leds.h>
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#include <linux/slab.h>
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2005-04-17 05:20:36 +07:00
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2012-01-14 18:50:04 +07:00
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#include <video/sa1100fb.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/hardware.h>
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2005-04-17 05:20:36 +07:00
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#include <asm/mach-types.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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2006-03-16 21:44:36 +07:00
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#include <asm/pgtable-hwdef.h>
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2005-04-17 05:20:36 +07:00
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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2014-12-24 05:14:14 +07:00
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#include <linux/platform_data/irda-sa11x0.h>
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2005-04-17 05:20:36 +07:00
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#include <asm/mach/map.h>
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2008-08-05 22:14:15 +07:00
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#include <mach/assabet.h>
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2012-08-24 20:17:38 +07:00
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#include <linux/platform_data/mfd-mcp-sa11x0.h>
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2012-02-24 06:06:51 +07:00
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#include <mach/irqs.h>
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2005-04-17 05:20:36 +07:00
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#include "generic.h"
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#define ASSABET_BCR_DB1110 \
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2012-01-22 04:17:06 +07:00
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(ASSABET_BCR_SPK_OFF | \
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2005-04-17 05:20:36 +07:00
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ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
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ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
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ASSABET_BCR_IRDA_MD0)
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#define ASSABET_BCR_DB1111 \
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2012-01-22 04:17:06 +07:00
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(ASSABET_BCR_SPK_OFF | \
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2005-04-17 05:20:36 +07:00
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ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
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ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
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ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
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ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
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unsigned long SCR_value = ASSABET_SCR_INIT;
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EXPORT_SYMBOL(SCR_value);
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2016-08-31 14:49:45 +07:00
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static struct gpio_chip *assabet_bcr_gc;
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static const char *assabet_names[] = {
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"cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel",
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"irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on",
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"audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on",
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"rs232_on", "nred_led", "ngreen_led", "vib_on",
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"com_dtr", "com_rts", "radio_wake_mod", "i2c_enab",
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"tvir_enab", "qmute", "radio_pwr_on", "spkr_off",
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"rs232_valid", "com_dcd", "com_cts", "com_dsr",
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"radio_cts", "radio_dsr", "radio_dcd", "radio_ri",
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};
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2005-04-17 05:20:36 +07:00
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2016-08-31 14:49:45 +07:00
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/* The old deprecated interface */
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2005-04-17 05:20:36 +07:00
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void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
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{
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2016-08-31 14:49:45 +07:00
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unsigned long m = mask, v = val;
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2005-04-17 05:20:36 +07:00
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2016-08-31 14:49:45 +07:00
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assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v);
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2005-04-17 05:20:36 +07:00
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}
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EXPORT_SYMBOL(ASSABET_BCR_frob);
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2016-08-31 14:49:45 +07:00
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static int __init assabet_init_gpio(void __iomem *reg, u32 def_val)
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{
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struct gpio_chip *gc;
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writel_relaxed(def_val, reg);
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gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val,
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assabet_names, NULL, NULL);
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if (IS_ERR(gc))
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return PTR_ERR(gc);
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assabet_bcr_gc = gc;
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2016-08-31 14:49:50 +07:00
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return gc->base;
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2016-08-31 14:49:45 +07:00
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}
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2013-07-09 16:27:12 +07:00
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/*
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* The codec reset goes to three devices, so we need to release
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* the rest when any one of these requests it. However, that
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* causes the ADV7171 to consume around 100mA - more than half
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* the LCD-blanked power.
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*
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* With the ADV7171, LCD and backlight enabled, we go over
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* budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
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* is connected, the Assabet crashes.
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*/
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#define RST_UCB1X00 (1 << 0)
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#define RST_UDA1341 (1 << 1)
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#define RST_ADV7171 (1 << 2)
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#define SDA GPIO_GPIO(15)
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#define SCK GPIO_GPIO(18)
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#define MOD GPIO_GPIO(17)
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static void adv7171_start(void)
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{
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GPSR = SCK;
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udelay(1);
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GPSR = SDA;
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udelay(2);
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GPCR = SDA;
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}
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static void adv7171_stop(void)
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{
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GPSR = SCK;
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udelay(2);
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GPSR = SDA;
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udelay(1);
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}
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static void adv7171_send(unsigned byte)
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{
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unsigned i;
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for (i = 0; i < 8; i++, byte <<= 1) {
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GPCR = SCK;
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udelay(1);
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if (byte & 0x80)
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GPSR = SDA;
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else
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GPCR = SDA;
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udelay(1);
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GPSR = SCK;
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udelay(1);
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}
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GPCR = SCK;
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udelay(1);
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GPSR = SDA;
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udelay(1);
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GPDR &= ~SDA;
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GPSR = SCK;
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udelay(1);
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if (GPLR & SDA)
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printk(KERN_WARNING "No ACK from ADV7171\n");
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udelay(1);
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GPCR = SCK | SDA;
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udelay(1);
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GPDR |= SDA;
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udelay(1);
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}
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static void adv7171_write(unsigned reg, unsigned val)
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{
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unsigned gpdr = GPDR;
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unsigned gplr = GPLR;
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2016-08-31 14:49:45 +07:00
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ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON);
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2013-07-09 16:27:12 +07:00
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udelay(100);
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GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
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GPDR = (GPDR | SCK | MOD) & ~SDA;
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udelay(10);
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if (!(GPLR & SDA))
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printk(KERN_WARNING "Something dragging SDA down?\n");
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GPDR |= SDA;
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adv7171_start();
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adv7171_send(0x54);
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adv7171_send(reg);
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adv7171_send(val);
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adv7171_stop();
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/* Restore GPIO state for L3 bus */
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GPSR = gplr & (SDA | SCK | MOD);
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GPCR = (~gplr) & (SDA | SCK | MOD);
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GPDR = gpdr;
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}
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static void adv7171_sleep(void)
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{
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/* Put the ADV7171 into sleep mode */
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adv7171_write(0x04, 0x40);
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}
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static unsigned codec_nreset;
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static void assabet_codec_reset(unsigned mask, int set)
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{
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unsigned long flags;
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bool old;
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local_irq_save(flags);
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old = !codec_nreset;
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if (set)
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codec_nreset &= ~mask;
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else
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codec_nreset |= mask;
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if (old != !codec_nreset) {
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if (codec_nreset) {
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ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
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adv7171_sleep();
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} else {
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ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
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}
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}
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local_irq_restore(flags);
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}
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2012-01-23 02:23:33 +07:00
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static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
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{
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2013-07-09 16:27:12 +07:00
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int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
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state == UCB_RST_PROBE_FAIL;
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assabet_codec_reset(RST_UCB1X00, set);
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}
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void assabet_uda1341_reset(int set)
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{
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assabet_codec_reset(RST_UDA1341, set);
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2012-01-23 02:23:33 +07:00
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}
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2013-07-09 16:27:12 +07:00
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EXPORT_SYMBOL(assabet_uda1341_reset);
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2012-01-23 02:23:33 +07:00
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2005-04-17 05:20:36 +07:00
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/*
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* Assabet flash support code.
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*/
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#ifdef ASSABET_REV_4
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/*
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* Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
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*/
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static struct mtd_partition assabet_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00020000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bootloader params",
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.size = 0x00020000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "jffs",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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#else
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/*
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* Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
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*/
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static struct mtd_partition assabet_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00040000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bootloader params",
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.size = 0x00040000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "jffs",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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#endif
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static struct flash_platform_data assabet_flash_data = {
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.map_name = "cfi_probe",
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.parts = assabet_partitions,
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.nr_parts = ARRAY_SIZE(assabet_partitions),
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};
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static struct resource assabet_flash_resources[] = {
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2012-01-12 17:25:29 +07:00
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DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
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DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
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2005-04-17 05:20:36 +07:00
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};
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/*
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* Assabet IrDA support code.
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*/
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static int assabet_irda_set_power(struct device *dev, unsigned int state)
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{
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static unsigned int bcr_state[4] = {
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ASSABET_BCR_IRDA_MD0,
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ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
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ASSABET_BCR_IRDA_MD1,
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0
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};
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2013-07-09 16:32:30 +07:00
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if (state < 4)
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ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
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bcr_state[state]);
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2005-04-17 05:20:36 +07:00
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return 0;
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}
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static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
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{
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if (speed < 4000000)
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ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
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else
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|
|
ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct irda_platform_data assabet_irda_data = {
|
|
|
|
.set_power = assabet_irda_set_power,
|
|
|
|
.set_speed = assabet_irda_set_speed,
|
|
|
|
};
|
|
|
|
|
2012-01-21 05:18:06 +07:00
|
|
|
static struct ucb1x00_plat_data assabet_ucb1x00_data = {
|
2012-01-23 02:23:33 +07:00
|
|
|
.reset = assabet_ucb1x00_reset,
|
2012-01-21 05:18:06 +07:00
|
|
|
.gpio_base = -1,
|
2013-07-09 16:31:20 +07:00
|
|
|
.can_wakeup = 1,
|
2012-01-21 05:18:06 +07:00
|
|
|
};
|
|
|
|
|
2005-08-18 16:10:46 +07:00
|
|
|
static struct mcp_plat_data assabet_mcp_data = {
|
|
|
|
.mccr0 = MCCR0_ADM,
|
|
|
|
.sclk_rate = 11981000,
|
2012-01-21 05:18:06 +07:00
|
|
|
.codec_pdata = &assabet_ucb1x00_data,
|
2005-08-18 16:10:46 +07:00
|
|
|
};
|
|
|
|
|
2012-01-14 19:03:22 +07:00
|
|
|
static void assabet_lcd_set_visual(u32 visual)
|
|
|
|
{
|
|
|
|
u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
|
|
|
|
|
|
|
|
if (machine_is_assabet()) {
|
|
|
|
#if 1 // phase 4 or newer Assabet's
|
|
|
|
if (is_true_color)
|
|
|
|
ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
|
|
|
|
else
|
|
|
|
ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
|
|
|
|
#else
|
|
|
|
// older Assabet's
|
|
|
|
if (is_true_color)
|
|
|
|
ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
|
|
|
|
else
|
|
|
|
ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-01-14 18:50:04 +07:00
|
|
|
#ifndef ASSABET_PAL_VIDEO
|
2012-01-14 19:03:22 +07:00
|
|
|
static void assabet_lcd_backlight_power(int on)
|
|
|
|
{
|
|
|
|
if (on)
|
|
|
|
ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
|
|
|
|
else
|
|
|
|
ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Turn on/off the backlight. When turning the backlight on, we wait
|
|
|
|
* 500us after turning it on so we don't cause the supplies to droop
|
|
|
|
* when we enable the LCD controller (and cause a hard reset.)
|
|
|
|
*/
|
|
|
|
static void assabet_lcd_power(int on)
|
|
|
|
{
|
|
|
|
if (on) {
|
|
|
|
ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
|
|
|
|
udelay(500);
|
|
|
|
} else
|
|
|
|
ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
|
|
|
|
}
|
|
|
|
|
2012-01-14 18:50:04 +07:00
|
|
|
/*
|
|
|
|
* The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
|
|
|
|
* takes an RGB666 signal, but we provide it with an RGB565 signal
|
|
|
|
* instead (def_rgb_16).
|
|
|
|
*/
|
|
|
|
static struct sa1100fb_mach_info lq039q2ds54_info = {
|
|
|
|
.pixclock = 171521, .bpp = 16,
|
|
|
|
.xres = 320, .yres = 240,
|
|
|
|
|
|
|
|
.hsync_len = 5, .vsync_len = 1,
|
|
|
|
.left_margin = 61, .upper_margin = 3,
|
|
|
|
.right_margin = 9, .lower_margin = 0,
|
|
|
|
|
|
|
|
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
|
|
|
|
|
|
|
|
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
|
|
|
|
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
|
2012-01-14 19:03:22 +07:00
|
|
|
|
|
|
|
.backlight_power = assabet_lcd_backlight_power,
|
|
|
|
.lcd_power = assabet_lcd_power,
|
|
|
|
.set_visual = assabet_lcd_set_visual,
|
2012-01-14 18:50:04 +07:00
|
|
|
};
|
|
|
|
#else
|
2012-01-14 19:03:22 +07:00
|
|
|
static void assabet_pal_backlight_power(int on)
|
|
|
|
{
|
|
|
|
ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void assabet_pal_power(int on)
|
|
|
|
{
|
|
|
|
ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
|
|
|
|
}
|
|
|
|
|
2012-01-14 18:50:04 +07:00
|
|
|
static struct sa1100fb_mach_info pal_info = {
|
|
|
|
.pixclock = 67797, .bpp = 16,
|
|
|
|
.xres = 640, .yres = 512,
|
|
|
|
|
|
|
|
.hsync_len = 64, .vsync_len = 6,
|
|
|
|
.left_margin = 125, .upper_margin = 70,
|
|
|
|
.right_margin = 115, .lower_margin = 36,
|
|
|
|
|
|
|
|
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
|
|
|
|
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
|
2012-01-14 19:03:22 +07:00
|
|
|
|
|
|
|
.backlight_power = assabet_pal_backlight_power,
|
|
|
|
.lcd_power = assabet_pal_power,
|
|
|
|
.set_visual = assabet_lcd_set_visual,
|
2012-01-14 18:50:04 +07:00
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2012-01-26 18:50:23 +07:00
|
|
|
#ifdef CONFIG_ASSABET_NEPONSET
|
|
|
|
static struct resource neponset_resources[] = {
|
|
|
|
DEFINE_RES_MEM(0x10000000, 0x08000000),
|
|
|
|
DEFINE_RES_MEM(0x18000000, 0x04000000),
|
|
|
|
DEFINE_RES_MEM(0x40000000, SZ_8K),
|
|
|
|
DEFINE_RES_IRQ(IRQ_GPIO25),
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2016-08-31 14:49:47 +07:00
|
|
|
static struct gpiod_lookup_table assabet_cf_gpio_table = {
|
|
|
|
.dev_id = "sa11x0-pcmcia.1",
|
|
|
|
.table = {
|
|
|
|
GPIO_LOOKUP("gpio", 21, "ready", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("gpio", 22, "detect", GPIO_ACTIVE_LOW),
|
|
|
|
GPIO_LOOKUP("gpio", 24, "bvd2", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("gpio", 25, "bvd1", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("assabet", 1, "reset", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("assabet", 7, "bus-enable", GPIO_ACTIVE_LOW),
|
|
|
|
{ },
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct regulator_consumer_supply assabet_cf_vcc_consumers[] = {
|
|
|
|
REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct fixed_voltage_config assabet_cf_vcc_pdata __initdata = {
|
|
|
|
.supply_name = "cf-power",
|
|
|
|
.microvolts = 3300000,
|
|
|
|
};
|
|
|
|
|
2018-09-06 19:24:36 +07:00
|
|
|
static struct gpiod_lookup_table assabet_cf_vcc_gpio_table = {
|
|
|
|
.dev_id = "reg-fixed-voltage.0",
|
|
|
|
.table = {
|
|
|
|
GPIO_LOOKUP("assabet", 0, NULL, GPIO_ACTIVE_HIGH),
|
|
|
|
{ },
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2016-08-31 14:49:50 +07:00
|
|
|
static struct gpio_led assabet_leds[] __initdata = {
|
|
|
|
{
|
|
|
|
.name = "assabet:red",
|
|
|
|
.default_trigger = "cpu0",
|
|
|
|
.active_low = 1,
|
|
|
|
.default_state = LEDS_GPIO_DEFSTATE_KEEP,
|
|
|
|
}, {
|
|
|
|
.name = "assabet:green",
|
|
|
|
.default_trigger = "heartbeat",
|
|
|
|
.active_low = 1,
|
|
|
|
.default_state = LEDS_GPIO_DEFSTATE_KEEP,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct gpio_led_platform_data assabet_leds_pdata __initconst = {
|
|
|
|
.num_leds = ARRAY_SIZE(assabet_leds),
|
|
|
|
.leds = assabet_leds,
|
|
|
|
};
|
|
|
|
|
2016-08-31 14:49:50 +07:00
|
|
|
static struct gpio_keys_button assabet_keys_buttons[] = {
|
|
|
|
{
|
|
|
|
.gpio = 0,
|
|
|
|
.irq = IRQ_GPIO0,
|
|
|
|
.desc = "gpio0",
|
|
|
|
.wakeup = 1,
|
|
|
|
.can_disable = 1,
|
|
|
|
.debounce_interval = 5,
|
|
|
|
}, {
|
|
|
|
.gpio = 1,
|
|
|
|
.irq = IRQ_GPIO1,
|
|
|
|
.desc = "gpio1",
|
|
|
|
.wakeup = 1,
|
|
|
|
.can_disable = 1,
|
|
|
|
.debounce_interval = 5,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct gpio_keys_platform_data assabet_keys_pdata = {
|
|
|
|
.buttons = assabet_keys_buttons,
|
|
|
|
.nbuttons = ARRAY_SIZE(assabet_keys_buttons),
|
|
|
|
.rep = 0,
|
|
|
|
};
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
static void __init assabet_init(void)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Ensure that the power supply is in "high power" mode.
|
|
|
|
*/
|
|
|
|
GPSR = GPIO_GPIO16;
|
2012-01-24 16:23:19 +07:00
|
|
|
GPDR |= GPIO_GPIO16;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Ensure that these pins are set as outputs and are driving
|
|
|
|
* logic 0. This ensures that we won't inadvertently toggle
|
|
|
|
* the WS latch in the CPLD, and we don't float causing
|
|
|
|
* excessive power drain. --rmk
|
|
|
|
*/
|
|
|
|
GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
|
2012-01-24 16:23:19 +07:00
|
|
|
GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2012-01-24 16:25:57 +07:00
|
|
|
/*
|
|
|
|
* Also set GPIO27 as an output; this is used to clock UART3
|
|
|
|
* via the FPGA and as otherwise has no pullups or pulldowns,
|
|
|
|
* so stop it floating.
|
|
|
|
*/
|
|
|
|
GPCR = GPIO_GPIO27;
|
|
|
|
GPDR |= GPIO_GPIO27;
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
/*
|
|
|
|
* Set up registers for sleep mode.
|
|
|
|
*/
|
|
|
|
PWER = PWER_GPIO0;
|
|
|
|
PGSR = 0;
|
|
|
|
PCFR = 0;
|
|
|
|
PSDR = 0;
|
|
|
|
PPDR |= PPC_TXD3 | PPC_TXD1;
|
|
|
|
PPSR |= PPC_TXD3 | PPC_TXD1;
|
|
|
|
|
2012-01-21 05:24:07 +07:00
|
|
|
sa11x0_ppc_configure_mcp();
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
if (machine_has_neponset()) {
|
|
|
|
#ifndef CONFIG_ASSABET_NEPONSET
|
|
|
|
printk( "Warning: Neponset detected but full support "
|
|
|
|
"hasn't been configured in the kernel\n" );
|
2012-01-26 18:50:23 +07:00
|
|
|
#else
|
|
|
|
platform_device_register_simple("neponset", 0,
|
|
|
|
neponset_resources, ARRAY_SIZE(neponset_resources));
|
2005-04-17 05:20:36 +07:00
|
|
|
#endif
|
2016-08-31 14:49:47 +07:00
|
|
|
} else {
|
2018-09-06 19:24:36 +07:00
|
|
|
gpiod_add_lookup_table(&assabet_cf_vcc_gpio_table);
|
2016-08-31 14:49:47 +07:00
|
|
|
sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata,
|
2018-09-06 19:24:36 +07:00
|
|
|
assabet_cf_vcc_consumers,
|
|
|
|
ARRAY_SIZE(assabet_cf_vcc_consumers),
|
|
|
|
true);
|
2016-08-31 14:49:47 +07:00
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
2016-08-31 14:49:50 +07:00
|
|
|
platform_device_register_resndata(NULL, "gpio-keys", 0,
|
|
|
|
NULL, 0,
|
|
|
|
&assabet_keys_pdata,
|
|
|
|
sizeof(assabet_keys_pdata));
|
|
|
|
|
2016-08-31 14:49:50 +07:00
|
|
|
gpio_led_register_device(-1, &assabet_leds_pdata);
|
|
|
|
|
2012-01-14 18:50:04 +07:00
|
|
|
#ifndef ASSABET_PAL_VIDEO
|
|
|
|
sa11x0_register_lcd(&lq039q2ds54_info);
|
|
|
|
#else
|
|
|
|
sa11x0_register_lcd(&pal_video);
|
|
|
|
#endif
|
2009-10-06 20:55:53 +07:00
|
|
|
sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
|
|
|
|
ARRAY_SIZE(assabet_flash_resources));
|
|
|
|
sa11x0_register_irda(&assabet_irda_data);
|
|
|
|
sa11x0_register_mcp(&assabet_mcp_data);
|
2016-08-31 14:49:47 +07:00
|
|
|
|
|
|
|
if (!machine_has_neponset())
|
|
|
|
sa11x0_register_pcmcia(1, &assabet_cf_gpio_table);
|
2005-04-17 05:20:36 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* On Assabet, we must probe for the Neponset board _before_
|
|
|
|
* paging_init() has occurred to actually determine the amount
|
|
|
|
* of RAM available. To do so, we map the appropriate IO section
|
|
|
|
* in the page table here in order to access GPIO registers.
|
|
|
|
*/
|
|
|
|
static void __init map_sa1100_gpio_regs( void )
|
|
|
|
{
|
|
|
|
unsigned long phys = __PREG(GPLR) & PMD_MASK;
|
2012-06-06 17:42:36 +07:00
|
|
|
unsigned long virt = (unsigned long)io_p2v(phys);
|
2005-04-17 05:20:36 +07:00
|
|
|
int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
|
|
|
|
pmd_t *pmd;
|
|
|
|
|
2012-01-14 23:10:53 +07:00
|
|
|
pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
|
2005-04-17 05:20:36 +07:00
|
|
|
*pmd = __pmd(phys | prot);
|
|
|
|
flush_pmd_entry(pmd);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read System Configuration "Register"
|
|
|
|
* (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
|
|
|
|
* User's Guide", section 4.4.1)
|
|
|
|
*
|
|
|
|
* This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
|
|
|
|
* to set up the serial port for decompression status messages. We
|
|
|
|
* repeat it here because the kernel may not be loaded as a zImage, and
|
|
|
|
* also because it's a hassle to communicate the SCR value to the kernel
|
|
|
|
* from the decompressor.
|
|
|
|
*
|
|
|
|
* Note that IRQs are guaranteed to be disabled.
|
|
|
|
*/
|
|
|
|
static void __init get_assabet_scr(void)
|
|
|
|
{
|
2012-04-30 19:41:21 +07:00
|
|
|
unsigned long uninitialized_var(scr), i;
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
|
|
|
|
GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
|
|
|
|
GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
|
2005-11-22 00:01:13 +07:00
|
|
|
for(i = 100; i--; ) /* Read GPIO 9:2 */
|
|
|
|
scr = GPLR;
|
2005-04-17 05:20:36 +07:00
|
|
|
GPDR |= 0x3fc; /* restore correct pin direction */
|
|
|
|
scr &= 0x3fc; /* save as system configuration byte. */
|
|
|
|
SCR_value = scr;
|
|
|
|
}
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|
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|
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|
static void __init
|
2014-04-14 04:54:58 +07:00
|
|
|
fixup_assabet(struct tag *tags, char **cmdline)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
|
|
|
/* This must be done before any call to machine_has_neponset() */
|
|
|
|
map_sa1100_gpio_regs();
|
|
|
|
get_assabet_scr();
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|
|
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|
|
|
if (machine_has_neponset())
|
|
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|
printk("Neponset expansion board detected\n");
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|
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|
}
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|
static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
|
|
|
|
{
|
|
|
|
if (port->mapbase == _Ser1UTCR0) {
|
|
|
|
if (state)
|
|
|
|
ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
|
|
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|
ASSABET_BCR_COM_RTS |
|
|
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|
ASSABET_BCR_COM_DTR);
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|
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|
else
|
|
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|
ASSABET_BCR_set(ASSABET_BCR_RS232EN |
|
|
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|
ASSABET_BCR_COM_RTS |
|
|
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|
ASSABET_BCR_COM_DTR);
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|
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|
}
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}
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|
/*
|
|
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|
* Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
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|
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|
* and UART3 (radio module). We only handle them for UART1 here.
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|
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|
*/
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static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
|
|
|
|
{
|
|
|
|
if (port->mapbase == _Ser1UTCR0) {
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|
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|
u_int set = 0, clear = 0;
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|
|
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|
if (mctrl & TIOCM_RTS)
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|
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|
clear |= ASSABET_BCR_COM_RTS;
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|
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|
else
|
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|
set |= ASSABET_BCR_COM_RTS;
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|
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|
if (mctrl & TIOCM_DTR)
|
|
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|
clear |= ASSABET_BCR_COM_DTR;
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|
|
else
|
|
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|
set |= ASSABET_BCR_COM_DTR;
|
|
|
|
|
|
|
|
ASSABET_BCR_clear(clear);
|
|
|
|
ASSABET_BCR_set(set);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static u_int assabet_get_mctrl(struct uart_port *port)
|
|
|
|
{
|
|
|
|
u_int ret = 0;
|
|
|
|
u_int bsr = ASSABET_BSR;
|
|
|
|
|
|
|
|
/* need 2 reads to read current value */
|
|
|
|
bsr = ASSABET_BSR;
|
|
|
|
|
|
|
|
if (port->mapbase == _Ser1UTCR0) {
|
|
|
|
if (bsr & ASSABET_BSR_COM_DCD)
|
|
|
|
ret |= TIOCM_CD;
|
|
|
|
if (bsr & ASSABET_BSR_COM_CTS)
|
|
|
|
ret |= TIOCM_CTS;
|
|
|
|
if (bsr & ASSABET_BSR_COM_DSR)
|
|
|
|
ret |= TIOCM_DSR;
|
|
|
|
} else if (port->mapbase == _Ser3UTCR0) {
|
|
|
|
if (bsr & ASSABET_BSR_RAD_DCD)
|
|
|
|
ret |= TIOCM_CD;
|
|
|
|
if (bsr & ASSABET_BSR_RAD_CTS)
|
|
|
|
ret |= TIOCM_CTS;
|
|
|
|
if (bsr & ASSABET_BSR_RAD_DSR)
|
|
|
|
ret |= TIOCM_DSR;
|
|
|
|
if (bsr & ASSABET_BSR_RAD_RI)
|
|
|
|
ret |= TIOCM_RI;
|
|
|
|
} else {
|
|
|
|
ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct sa1100_port_fns assabet_port_fns __initdata = {
|
|
|
|
.set_mctrl = assabet_set_mctrl,
|
|
|
|
.get_mctrl = assabet_get_mctrl,
|
|
|
|
.pm = assabet_uart_pm,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct map_desc assabet_io_desc[] __initdata = {
|
2005-10-28 21:19:04 +07:00
|
|
|
{ /* Board Control Register */
|
|
|
|
.virtual = 0xf1000000,
|
|
|
|
.pfn = __phys_to_pfn(0x12000000),
|
|
|
|
.length = 0x00100000,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
}, { /* MQ200 */
|
|
|
|
.virtual = 0xf2800000,
|
|
|
|
.pfn = __phys_to_pfn(0x4b800000),
|
|
|
|
.length = 0x00800000,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
}
|
2005-04-17 05:20:36 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
static void __init assabet_map_io(void)
|
|
|
|
{
|
|
|
|
sa1100_map_io();
|
|
|
|
iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set SUS bit in SDCR0 so serial port 1 functions.
|
|
|
|
* Its called GPCLKR0 in my SA1110 manual.
|
|
|
|
*/
|
|
|
|
Ser1SDCR0 |= SDCR0_SUS;
|
2013-10-16 06:09:02 +07:00
|
|
|
MSC1 = (MSC1 & ~0xffff) |
|
|
|
|
MSC_NonBrst | MSC_32BitStMem |
|
|
|
|
MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
|
2005-04-17 05:20:36 +07:00
|
|
|
|
2012-03-26 05:54:16 +07:00
|
|
|
if (!machine_has_neponset())
|
2005-04-17 05:20:36 +07:00
|
|
|
sa1100_register_uart_fns(&assabet_port_fns);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* When Neponset is attached, the first UART should be
|
|
|
|
* UART3. That's what Angel is doing and many documents
|
|
|
|
* are stating this.
|
|
|
|
*
|
|
|
|
* We do the Neponset mapping even if Neponset support
|
|
|
|
* isn't compiled in so the user will still get something on
|
|
|
|
* the expected physical serial port.
|
|
|
|
*
|
|
|
|
* We no longer do this; not all boot loaders support it,
|
|
|
|
* and UART3 appears to be somewhat unreliable with blob.
|
|
|
|
*/
|
|
|
|
sa1100_register_uart(0, 1);
|
|
|
|
sa1100_register_uart(2, 3);
|
|
|
|
}
|
|
|
|
|
2016-08-31 14:49:45 +07:00
|
|
|
void __init assabet_init_irq(void)
|
|
|
|
{
|
2016-08-31 14:49:50 +07:00
|
|
|
unsigned int assabet_gpio_base;
|
2016-08-31 14:49:45 +07:00
|
|
|
u32 def_val;
|
|
|
|
|
|
|
|
sa1100_init_irq();
|
|
|
|
|
|
|
|
if (machine_has_neponset())
|
|
|
|
def_val = ASSABET_BCR_DB1111;
|
|
|
|
else
|
|
|
|
def_val = ASSABET_BCR_DB1110;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Angel sets this, but other bootloaders may not.
|
|
|
|
*
|
|
|
|
* This must precede any driver calls to BCR_set() or BCR_clear().
|
|
|
|
*/
|
2016-08-31 14:49:50 +07:00
|
|
|
assabet_gpio_base = assabet_init_gpio((void *)&ASSABET_BCR, def_val);
|
|
|
|
|
|
|
|
assabet_leds[0].gpio = assabet_gpio_base + 13;
|
|
|
|
assabet_leds[1].gpio = assabet_gpio_base + 14;
|
2016-08-31 14:49:45 +07:00
|
|
|
}
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
MACHINE_START(ASSABET, "Intel-Assabet")
|
2011-07-06 09:38:17 +07:00
|
|
|
.atag_offset = 0x100,
|
2005-07-03 23:38:58 +07:00
|
|
|
.fixup = fixup_assabet,
|
|
|
|
.map_io = assabet_map_io,
|
2012-02-24 06:06:51 +07:00
|
|
|
.nr_irqs = SA1100_NR_IRQS,
|
2016-08-31 14:49:45 +07:00
|
|
|
.init_irq = assabet_init_irq,
|
2012-11-09 02:40:59 +07:00
|
|
|
.init_time = sa1100_timer_init,
|
2005-04-17 05:20:36 +07:00
|
|
|
.init_machine = assabet_init,
|
2012-04-26 20:22:45 +07:00
|
|
|
.init_late = sa11x0_init_late,
|
2011-07-06 09:28:09 +07:00
|
|
|
#ifdef CONFIG_SA1111
|
|
|
|
.dma_zone_size = SZ_1M,
|
|
|
|
#endif
|
2011-11-05 17:28:50 +07:00
|
|
|
.restart = sa11x0_restart,
|
2005-04-17 05:20:36 +07:00
|
|
|
MACHINE_END
|