2010-04-23 10:30:13 +07:00
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/*
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* Copyright (C) 2010 Google, Inc.
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*
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* Author:
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* Colin Cross <ccross@google.com>
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* Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/sched.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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2010-08-06 07:40:39 +07:00
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#include <linux/suspend.h>
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2010-04-23 10:30:13 +07:00
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static struct cpufreq_frequency_table freq_table[] = {
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2013-05-14 20:38:50 +07:00
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{ .frequency = 216000 },
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{ .frequency = 312000 },
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{ .frequency = 456000 },
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{ .frequency = 608000 },
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{ .frequency = 760000 },
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{ .frequency = 816000 },
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{ .frequency = 912000 },
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{ .frequency = 1000000 },
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{ .frequency = CPUFREQ_TABLE_END },
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2010-04-23 10:30:13 +07:00
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};
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#define NUM_CPUS 2
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static struct clk *cpu_clk;
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2012-09-11 06:05:01 +07:00
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static struct clk *pll_x_clk;
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static struct clk *pll_p_clk;
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2010-11-23 09:54:36 +07:00
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static struct clk *emc_clk;
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2010-04-23 10:30:13 +07:00
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static unsigned long target_cpu_speed[NUM_CPUS];
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2010-08-06 07:40:39 +07:00
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static DEFINE_MUTEX(tegra_cpu_lock);
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static bool is_suspended;
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2010-04-23 10:30:13 +07:00
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2011-10-10 11:57:04 +07:00
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static unsigned int tegra_getspeed(unsigned int cpu)
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2010-04-23 10:30:13 +07:00
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{
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unsigned long rate;
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if (cpu >= NUM_CPUS)
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return 0;
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rate = clk_get_rate(cpu_clk) / 1000;
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return rate;
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}
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2012-09-11 06:05:01 +07:00
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static int tegra_cpu_clk_set_rate(unsigned long rate)
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{
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int ret;
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/*
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* Take an extra reference to the main pll so it doesn't turn
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* off when we move the cpu off of it
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*/
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clk_prepare_enable(pll_x_clk);
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ret = clk_set_parent(cpu_clk, pll_p_clk);
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if (ret) {
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pr_err("Failed to switch cpu to clock pll_p\n");
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goto out;
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}
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if (rate == clk_get_rate(pll_p_clk))
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goto out;
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ret = clk_set_rate(pll_x_clk, rate);
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if (ret) {
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pr_err("Failed to change pll_x to %lu\n", rate);
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goto out;
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}
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ret = clk_set_parent(cpu_clk, pll_x_clk);
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if (ret) {
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pr_err("Failed to switch cpu to clock pll_x\n");
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goto out;
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}
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out:
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clk_disable_unprepare(pll_x_clk);
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return ret;
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}
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2013-03-24 13:26:43 +07:00
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static int tegra_update_cpu_speed(struct cpufreq_policy *policy,
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unsigned long rate)
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2010-04-23 10:30:13 +07:00
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{
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int ret = 0;
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2013-08-14 21:08:24 +07:00
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if (tegra_getspeed(0) == rate)
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2010-04-23 10:30:13 +07:00
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return ret;
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2010-11-23 09:54:36 +07:00
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/*
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* Vote on memory bus frequency based on cpu frequency
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* This sets the minimum frequency, display or avp may request higher
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*/
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if (rate >= 816000)
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clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */
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else if (rate >= 456000)
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clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */
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else
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clk_set_rate(emc_clk, 100000000); /* emc 50Mhz */
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2013-08-14 21:08:24 +07:00
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ret = tegra_cpu_clk_set_rate(rate * 1000);
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if (ret)
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pr_err("cpu-tegra: Failed to set cpu frequency to %lu kHz\n",
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rate);
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2010-04-23 10:30:13 +07:00
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2013-06-19 12:48:20 +07:00
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return ret;
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2010-04-23 10:30:13 +07:00
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}
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2010-08-06 07:40:39 +07:00
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static unsigned long tegra_cpu_highest_speed(void)
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{
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unsigned long rate = 0;
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int i;
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for_each_online_cpu(i)
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rate = max(rate, target_cpu_speed[i]);
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return rate;
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}
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2013-10-25 21:15:48 +07:00
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static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
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2010-04-23 10:30:13 +07:00
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{
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unsigned int freq;
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2010-08-06 07:40:39 +07:00
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int ret = 0;
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mutex_lock(&tegra_cpu_lock);
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2013-11-21 04:06:22 +07:00
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if (is_suspended)
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2010-08-06 07:40:39 +07:00
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goto out;
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2010-04-23 10:30:13 +07:00
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2013-10-25 21:15:48 +07:00
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freq = freq_table[index].frequency;
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2010-04-23 10:30:13 +07:00
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target_cpu_speed[policy->cpu] = freq;
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2013-03-24 13:26:43 +07:00
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ret = tegra_update_cpu_speed(policy, tegra_cpu_highest_speed());
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2010-08-06 07:40:39 +07:00
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out:
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mutex_unlock(&tegra_cpu_lock);
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return ret;
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2010-04-23 10:30:13 +07:00
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}
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2010-08-06 07:40:39 +07:00
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static int tegra_pm_notify(struct notifier_block *nb, unsigned long event,
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void *dummy)
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{
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mutex_lock(&tegra_cpu_lock);
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if (event == PM_SUSPEND_PREPARE) {
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2013-03-24 13:26:43 +07:00
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struct cpufreq_policy *policy = cpufreq_cpu_get(0);
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2010-08-06 07:40:39 +07:00
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is_suspended = true;
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pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n",
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freq_table[0].frequency);
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2013-03-24 13:26:43 +07:00
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tegra_update_cpu_speed(policy, freq_table[0].frequency);
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cpufreq_cpu_put(policy);
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2010-08-06 07:40:39 +07:00
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} else if (event == PM_POST_SUSPEND) {
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is_suspended = false;
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}
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mutex_unlock(&tegra_cpu_lock);
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return NOTIFY_OK;
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}
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static struct notifier_block tegra_cpu_pm_notifier = {
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.notifier_call = tegra_pm_notify,
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};
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2010-04-23 10:30:13 +07:00
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static int tegra_cpu_init(struct cpufreq_policy *policy)
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{
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2013-10-03 22:12:11 +07:00
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int ret;
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2010-04-23 10:30:13 +07:00
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if (policy->cpu >= NUM_CPUS)
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return -EINVAL;
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2012-06-05 11:29:35 +07:00
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clk_prepare_enable(emc_clk);
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clk_prepare_enable(cpu_clk);
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2010-10-21 07:47:59 +07:00
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2013-10-03 21:59:05 +07:00
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target_cpu_speed[policy->cpu] = tegra_getspeed(policy->cpu);
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2010-04-23 10:30:13 +07:00
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/* FIXME: what's the actual transition time? */
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2013-10-03 22:12:11 +07:00
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ret = cpufreq_generic_init(policy, freq_table, 300 * 1000);
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if (ret) {
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clk_disable_unprepare(cpu_clk);
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clk_disable_unprepare(emc_clk);
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return ret;
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}
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2010-04-23 10:30:13 +07:00
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2010-08-06 07:40:39 +07:00
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if (policy->cpu == 0)
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register_pm_notifier(&tegra_cpu_pm_notifier);
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2010-04-23 10:30:13 +07:00
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return 0;
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}
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static int tegra_cpu_exit(struct cpufreq_policy *policy)
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{
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2013-09-16 20:26:40 +07:00
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cpufreq_frequency_table_put_attr(policy->cpu);
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2013-10-03 22:12:11 +07:00
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clk_disable_unprepare(cpu_clk);
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2012-06-05 11:29:35 +07:00
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clk_disable_unprepare(emc_clk);
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2010-04-23 10:30:13 +07:00
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return 0;
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}
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static struct cpufreq_driver tegra_cpufreq_driver = {
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2013-10-03 21:58:29 +07:00
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.verify = cpufreq_generic_frequency_table_verify,
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2013-10-25 21:15:48 +07:00
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.target_index = tegra_target,
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2010-04-23 10:30:13 +07:00
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.get = tegra_getspeed,
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.init = tegra_cpu_init,
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.exit = tegra_cpu_exit,
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.name = "tegra",
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2013-10-03 21:58:29 +07:00
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.attr = cpufreq_generic_attr,
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2010-04-23 10:30:13 +07:00
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};
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static int __init tegra_cpufreq_init(void)
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{
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2013-08-23 08:43:58 +07:00
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cpu_clk = clk_get_sys(NULL, "cclk");
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2012-12-21 07:09:55 +07:00
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if (IS_ERR(cpu_clk))
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return PTR_ERR(cpu_clk);
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pll_x_clk = clk_get_sys(NULL, "pll_x");
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if (IS_ERR(pll_x_clk))
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return PTR_ERR(pll_x_clk);
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2013-08-23 08:43:58 +07:00
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pll_p_clk = clk_get_sys(NULL, "pll_p");
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2012-12-21 07:09:55 +07:00
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if (IS_ERR(pll_p_clk))
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return PTR_ERR(pll_p_clk);
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emc_clk = clk_get_sys("cpu", "emc");
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if (IS_ERR(emc_clk)) {
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clk_put(cpu_clk);
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return PTR_ERR(emc_clk);
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}
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2010-04-23 10:30:13 +07:00
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return cpufreq_register_driver(&tegra_cpufreq_driver);
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}
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static void __exit tegra_cpufreq_exit(void)
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{
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cpufreq_unregister_driver(&tegra_cpufreq_driver);
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2012-12-21 07:09:55 +07:00
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clk_put(emc_clk);
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clk_put(cpu_clk);
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2010-04-23 10:30:13 +07:00
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}
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MODULE_AUTHOR("Colin Cross <ccross@android.com>");
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MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2");
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MODULE_LICENSE("GPL");
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module_init(tegra_cpufreq_init);
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module_exit(tegra_cpufreq_exit);
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