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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides clock numbers for the ingenic,x1000-cgu DT binding.
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*
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* They are roughly ordered as:
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* - external clocks
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* - PLLs
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* - muxes/dividers in the order they appear in the x1000 programmers manual
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* - gates in order of their bit in the CLKGR* registers
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*/
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#ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__
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#define __DT_BINDINGS_CLOCK_X1000_CGU_H__
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#define X1000_CLK_EXCLK 0
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#define X1000_CLK_RTCLK 1
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#define X1000_CLK_APLL 2
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#define X1000_CLK_MPLL 3
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#define X1000_CLK_SCLKA 4
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#define X1000_CLK_CPUMUX 5
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#define X1000_CLK_CPU 6
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#define X1000_CLK_L2CACHE 7
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#define X1000_CLK_AHB0 8
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#define X1000_CLK_AHB2PMUX 9
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#define X1000_CLK_AHB2 10
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#define X1000_CLK_PCLK 11
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#define X1000_CLK_DDR 12
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#define X1000_CLK_MAC 13
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#define X1000_CLK_MSCMUX 14
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#define X1000_CLK_MSC0 15
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#define X1000_CLK_MSC1 16
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#define X1000_CLK_SSIPLL 17
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#define X1000_CLK_SSIMUX 18
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#define X1000_CLK_SFC 19
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#define X1000_CLK_I2C0 20
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#define X1000_CLK_I2C1 21
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#define X1000_CLK_I2C2 22
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#define X1000_CLK_UART0 23
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#define X1000_CLK_UART1 24
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#define X1000_CLK_UART2 25
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#define X1000_CLK_SSI 26
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#define X1000_CLK_PDMA 27
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#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */
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