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linux_dsm_epyc7002/include/dt-bindings/clock/hi3516cv300-clock.h

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details [based] [from] [clk] [highbank] [c] you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 355 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-19 20:51:43 +07:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
clk: hisilicon: add CRG driver for Hi3516CV300 SoC Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset Generator) module generates clock and reset signals used by other module blocks on SoC. Signed-off-by: Pan Wen <wenpan@hisilicon.com> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-14 09:49:54 +07:00
/*
* Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
*/
#ifndef __DTS_HI3516CV300_CLOCK_H
#define __DTS_HI3516CV300_CLOCK_H
/* hi3516CV300 core CRG */
#define HI3516CV300_APB_CLK 0
#define HI3516CV300_UART0_CLK 1
#define HI3516CV300_UART1_CLK 2
#define HI3516CV300_UART2_CLK 3
#define HI3516CV300_SPI0_CLK 4
#define HI3516CV300_SPI1_CLK 5
#define HI3516CV300_FMC_CLK 6
#define HI3516CV300_MMC0_CLK 7
#define HI3516CV300_MMC1_CLK 8
#define HI3516CV300_MMC2_CLK 9
#define HI3516CV300_MMC3_CLK 10
#define HI3516CV300_ETH_CLK 11
#define HI3516CV300_ETH_MACIF_CLK 12
#define HI3516CV300_DMAC_CLK 13
#define HI3516CV300_PWM_CLK 14
#define HI3516CV300_USB2_BUS_CLK 15
#define HI3516CV300_USB2_OHCI48M_CLK 16
#define HI3516CV300_USB2_OHCI12M_CLK 17
#define HI3516CV300_USB2_OTG_UTMI_CLK 18
#define HI3516CV300_USB2_HST_PHY_CLK 19
#define HI3516CV300_USB2_UTMI0_CLK 20
#define HI3516CV300_USB2_PHY_CLK 21
/* hi3516CV300 sysctrl CRG */
#define HI3516CV300_WDT_CLK 1
#endif /* __DTS_HI3516CV300_CLOCK_H */
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