linux_dsm_epyc7002/arch/powerpc/include/asm/pte-fsl-booke.h

#ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H
#define _ASM_POWERPC_PTE_FSL_BOOKE_H
#ifdef __KERNEL__

/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
 * processors
 *
   MMU Assist Register 3:

   32 33 34 35 36  ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
   RPN......................  0  0 U0 U1 U2 U3 UX SX UW SW UR SR

   - PRESENT *must* be in the bottom three bits because swap cache
     entries use the top 29 bits.

   - FILE *must* be in the bottom three bits because swap cache
     entries use the top 29 bits.
*/

/* Definitions for FSL Book-E Cores */
#define _PAGE_PRESENT	0x00001	/* S: PTE contains a translation */
#define _PAGE_USER	0x00002	/* S: User page (maps to UR) */
#define _PAGE_FILE	0x00002	/* S: when !present: nonlinear file mapping */
#define _PAGE_RW	0x00004	/* S: Write permission (SW) */
#define _PAGE_DIRTY	0x00008	/* S: Page dirty */
#define _PAGE_EXEC	0x00010	/* H: SX permission */
#define _PAGE_ACCESSED	0x00020	/* S: Page referenced */

#define _PAGE_ENDIAN	0x00040	/* H: E bit */
#define _PAGE_GUARDED	0x00080	/* H: G bit */
#define _PAGE_COHERENT	0x00100	/* H: M bit */
#define _PAGE_NO_CACHE	0x00200	/* H: I bit */
#define _PAGE_WRITETHRU	0x00400	/* H: W bit */
#define _PAGE_SPECIAL	0x00800 /* S: Special page */

#define _PMD_PRESENT	0
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD	(~PAGE_MASK)

#endif /* __KERNEL__ */
#endif /*  _ASM_POWERPC_PTE_FSL_BOOKE_H */
powerpc/mm: Split the various pgtable-* headers based on MMU type This patch moves the definition of the PTE format for each MMU type to separate files instead of all in one file. This improves overall maintainability and will make it easier to add new types. On 64-bit, additionally, I've separated the headers relative to the format of the page table tree (3 vs. 4 levels for 64K vs 4K pages) from the headers specific to the PTE format for hash based processors, this will make it easier to add support for Book3 "E" 64-bit implementations. There are still some type-related ifdef's in the generic headers, we might remove them in the long run, but this patch shouldn't result in any code change, -hopefully- just definitions being moved around. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> 2009-03-11 00:53:29 +07:00			`#ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H`
			`#define _ASM_POWERPC_PTE_FSL_BOOKE_H`
			`#ifdef __KERNEL__`

			`/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based`
			`* processors`
			`*`
			`MMU Assist Register 3:`

			`32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63`
			`RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR`

			`- PRESENT must be in the bottom three bits because swap cache`
			`entries use the top 29 bits.`

			`- FILE must be in the bottom three bits because swap cache`
			`entries use the top 29 bits.`
			`*/`

			`/* Definitions for FSL Book-E Cores */`
			`#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */`
			`#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */`
			`#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */`
			`#define _PAGE_RW 0x00004 /* S: Write permission (SW) */`
			`#define _PAGE_DIRTY 0x00008 /* S: Page dirty */`
powerpc/mm: Cleanup handling of execute permission This is an attempt at cleaning up a bit the way we handle execute permission on powerpc. _PAGE_HWEXEC is gone, _PAGE_EXEC is now only defined by CPUs that can do something with it, and the myriad of #ifdef's in the I$/D$ coherency code is reduced to 2 cases that hopefully should cover everything. The logic on BookE is a little bit different than what it was though not by much. Since now, _PAGE_EXEC will be set by the generic code for executable pages, we need to filter out if they are unclean and recover it. However, I don't expect the code to be more bloated than it already was in that area due to that change. I could boast that this brings proper enforcing of per-page execute permissions to all BookE and 40x but in fact, we've had that now for some time as a side effect of my previous rework in that area (and I didn't even know it :-) We would only enable execute permission if the page was cache clean and we would only cache clean it if we took and exec fault. Since we now enforce that the later only work if VM_EXEC is part of the VMA flags, we de-fact already enforce per-page execute permissions... Unless I missed something Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> 2009-08-19 02:00:34 +07:00			`#define _PAGE_EXEC 0x00010 /* H: SX permission */`
powerpc/mm: Split the various pgtable-* headers based on MMU type This patch moves the definition of the PTE format for each MMU type to separate files instead of all in one file. This improves overall maintainability and will make it easier to add new types. On 64-bit, additionally, I've separated the headers relative to the format of the page table tree (3 vs. 4 levels for 64K vs 4K pages) from the headers specific to the PTE format for hash based processors, this will make it easier to add support for Book3 "E" 64-bit implementations. There are still some type-related ifdef's in the generic headers, we might remove them in the long run, but this patch shouldn't result in any code change, -hopefully- just definitions being moved around. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> 2009-03-11 00:53:29 +07:00			`#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */`

			`#define _PAGE_ENDIAN 0x00040 /* H: E bit */`
			`#define _PAGE_GUARDED 0x00080 /* H: G bit */`
			`#define _PAGE_COHERENT 0x00100 /* H: M bit */`
			`#define _PAGE_NO_CACHE 0x00200 /* H: I bit */`
			`#define _PAGE_WRITETHRU 0x00400 /* H: W bit */`
			`#define _PAGE_SPECIAL 0x00800 /* S: Special page */`

			`#define _PMD_PRESENT 0`
			`#define _PMD_PRESENT_MASK (PAGE_MASK)`
			`#define _PMD_BAD (~PAGE_MASK)`

			`#endif /* __KERNEL__ */`
			`#endif /* _ASM_POWERPC_PTE_FSL_BOOKE_H */`