2009-06-05 19:42:42 +07:00
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/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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2012-05-09 20:34:58 +07:00
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* Christian König
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2009-06-05 19:42:42 +07:00
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*/
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2012-10-03 00:01:07 +07:00
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#include <drm/drmP.h>
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2009-06-05 19:42:42 +07:00
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#include "radeon.h"
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2012-05-02 20:11:12 +07:00
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2009-06-05 19:42:42 +07:00
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/*
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2012-07-18 01:02:38 +07:00
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* Rings
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* Most engines on the GPU are fed via ring buffers. Ring
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* buffers are areas of GPU accessible memory that the host
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* writes commands into and the GPU reads commands out of.
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* There is a rptr (read pointer) that determines where the
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* GPU is currently reading, and a wptr (write pointer)
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* which determines where the host has written. When the
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* pointers are equal, the ring is idle. When the host
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* writes commands to the ring buffer, it increments the
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* wptr. The GPU then starts fetching commands and executes
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* them until the pointers are equal again.
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2009-06-05 19:42:42 +07:00
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*/
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2012-09-01 00:43:50 +07:00
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static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
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2012-05-09 20:34:58 +07:00
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_supports_scratch_reg - check if the ring supports
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* writing to scratch registers
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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*
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* Check if a specific ring supports writing to scratch registers (all asics).
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* Returns true if the ring supports writing to scratch regs, false if not.
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*/
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2012-07-18 01:02:31 +07:00
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bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev,
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struct radeon_ring *ring)
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{
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switch (ring->idx) {
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case RADEON_RING_TYPE_GFX_INDEX:
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case CAYMAN_RING_TYPE_CP1_INDEX:
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case CAYMAN_RING_TYPE_CP2_INDEX:
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return true;
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default:
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return false;
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}
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}
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_free_size - update the free size
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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*
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* Update the free dw slots in the ring buffer (all asics).
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*/
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2011-10-23 17:56:27 +07:00
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void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
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2009-06-05 19:42:42 +07:00
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{
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2014-02-18 20:52:33 +07:00
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uint32_t rptr = radeon_ring_get_rptr(rdev, ring);
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2009-06-05 19:42:42 +07:00
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/* This works because ring_size is a power of 2 */
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2014-02-18 20:52:33 +07:00
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ring->ring_free_dw = rptr + (ring->ring_size / 4);
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2011-10-23 17:56:27 +07:00
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ring->ring_free_dw -= ring->wptr;
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ring->ring_free_dw &= ring->ptr_mask;
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if (!ring->ring_free_dw) {
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2014-02-18 21:03:22 +07:00
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/* this is an empty ring */
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2011-10-23 17:56:27 +07:00
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ring->ring_free_dw = ring->ring_size / 4;
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2014-02-18 21:03:22 +07:00
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/* update lockup info to avoid false positive */
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radeon_ring_lockup_update(rdev, ring);
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2009-06-05 19:42:42 +07:00
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}
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}
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_alloc - allocate space on the ring buffer
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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* @ndw: number of dwords to allocate in the ring buffer
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*
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* Allocate @ndw dwords in the ring buffer (all asics).
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* Returns 0 on success, error on failure.
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*/
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2011-10-23 17:56:27 +07:00
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int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
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2009-06-05 19:42:42 +07:00
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{
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int r;
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2013-01-31 02:24:09 +07:00
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/* make sure we aren't trying to allocate more space than there is on the ring */
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if (ndw > (ring->ring_size / 4))
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return -ENOMEM;
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2009-06-05 19:42:42 +07:00
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/* Align requested size with padding so unlock_commit can
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* pad safely */
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2013-06-19 21:02:28 +07:00
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radeon_ring_free_size(rdev, ring);
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2011-10-23 17:56:27 +07:00
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ndw = (ndw + ring->align_mask) & ~ring->align_mask;
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while (ndw > (ring->ring_free_dw - 1)) {
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radeon_ring_free_size(rdev, ring);
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if (ndw < ring->ring_free_dw) {
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2009-06-05 19:42:42 +07:00
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break;
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}
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2014-02-18 21:58:31 +07:00
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r = radeon_fence_wait_next(rdev, ring->idx);
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2010-05-01 02:24:17 +07:00
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if (r)
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2009-06-05 19:42:42 +07:00
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return r;
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}
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2011-10-23 17:56:27 +07:00
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ring->count_dw = ndw;
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ring->wptr_old = ring->wptr;
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2009-06-05 19:42:42 +07:00
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return 0;
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}
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_lock - lock the ring and allocate space on it
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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* @ndw: number of dwords to allocate in the ring buffer
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*
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* Lock the ring and allocate @ndw dwords in the ring buffer
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* (all asics).
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* Returns 0 on success, error on failure.
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*/
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2011-10-23 17:56:27 +07:00
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int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
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2010-05-01 02:24:17 +07:00
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{
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int r;
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2012-05-09 20:34:45 +07:00
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mutex_lock(&rdev->ring_lock);
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2011-10-23 17:56:27 +07:00
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r = radeon_ring_alloc(rdev, ring, ndw);
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2010-05-01 02:24:17 +07:00
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if (r) {
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2012-05-09 20:34:45 +07:00
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mutex_unlock(&rdev->ring_lock);
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2010-05-01 02:24:17 +07:00
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return r;
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}
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return 0;
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}
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_commit - tell the GPU to execute the new
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* commands on the ring buffer
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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2014-08-18 15:34:55 +07:00
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* @hdp_flush: Whether or not to perform an HDP cache flush
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2012-07-18 01:02:38 +07:00
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*
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* Update the wptr (write pointer) to tell the GPU to
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* execute new commands on the ring buffer (all asics).
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*/
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2014-08-18 15:34:55 +07:00
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void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring,
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bool hdp_flush)
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2009-06-05 19:42:42 +07:00
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{
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2014-07-31 16:43:49 +07:00
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/* If we are emitting the HDP flush via the ring buffer, we need to
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* do it before padding.
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*/
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2014-08-18 15:34:55 +07:00
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if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush)
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2014-07-31 16:43:49 +07:00
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rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring);
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2009-06-05 19:42:42 +07:00
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/* We pad to match fetch size */
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2012-07-07 17:11:32 +07:00
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while (ring->wptr & ring->align_mask) {
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2011-11-18 02:25:56 +07:00
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radeon_ring_write(ring, ring->nop);
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2009-06-05 19:42:42 +07:00
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}
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2013-12-11 17:34:45 +07:00
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mb();
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2014-07-31 16:43:49 +07:00
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/* If we are emitting the HDP flush via MMIO, we need to do it after
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* all CPU writes to VRAM finished.
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*/
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2014-08-18 15:34:55 +07:00
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if (hdp_flush && rdev->asic->mmio_hdp_flush)
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2014-07-31 16:43:49 +07:00
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rdev->asic->mmio_hdp_flush(rdev);
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2013-01-30 02:10:56 +07:00
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radeon_ring_set_wptr(rdev, ring);
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2010-05-01 02:24:17 +07:00
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}
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_unlock_commit - tell the GPU to execute the new
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* commands on the ring buffer and unlock it
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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2014-08-18 15:34:55 +07:00
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* @hdp_flush: Whether or not to perform an HDP cache flush
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2012-07-18 01:02:38 +07:00
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*
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* Call radeon_ring_commit() then unlock the ring (all asics).
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*/
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2014-08-18 15:34:55 +07:00
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void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring,
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bool hdp_flush)
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2010-05-01 02:24:17 +07:00
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{
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2014-08-18 15:34:55 +07:00
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radeon_ring_commit(rdev, ring, hdp_flush);
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2012-05-09 20:34:45 +07:00
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mutex_unlock(&rdev->ring_lock);
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2009-06-05 19:42:42 +07:00
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}
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_undo - reset the wptr
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*
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* @ring: radeon_ring structure holding ring information
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*
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2012-11-21 04:31:06 +07:00
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* Reset the driver's copy of the wptr (all asics).
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2012-07-18 01:02:38 +07:00
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*/
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2012-05-09 20:34:45 +07:00
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void radeon_ring_undo(struct radeon_ring *ring)
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2009-06-05 19:42:42 +07:00
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{
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2011-10-23 17:56:27 +07:00
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ring->wptr = ring->wptr_old;
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2012-05-09 20:34:45 +07:00
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}
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2012-07-18 01:02:38 +07:00
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/**
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* radeon_ring_unlock_undo - reset the wptr and unlock the ring
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*
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* @ring: radeon_ring structure holding ring information
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*
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* Call radeon_ring_undo() then unlock the ring (all asics).
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*/
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2012-05-09 20:34:45 +07:00
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void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
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{
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radeon_ring_undo(ring);
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mutex_unlock(&rdev->ring_lock);
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2009-06-05 19:42:42 +07:00
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}
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2012-07-18 01:02:38 +07:00
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/**
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2012-11-21 04:31:06 +07:00
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* radeon_ring_lockup_update - update lockup variables
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2012-07-18 01:02:38 +07:00
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*
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* @ring: radeon_ring structure holding ring information
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*
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* Update the last rptr value and timestamp (all asics).
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*/
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2014-02-18 20:52:33 +07:00
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void radeon_ring_lockup_update(struct radeon_device *rdev,
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struct radeon_ring *ring)
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2012-05-02 20:11:20 +07:00
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{
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2014-02-18 21:24:06 +07:00
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atomic_set(&ring->last_rptr, radeon_ring_get_rptr(rdev, ring));
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atomic64_set(&ring->last_activity, jiffies_64);
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2012-05-02 20:11:20 +07:00
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}
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/**
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* radeon_ring_test_lockup() - check if ring is lockedup by recording information
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* @rdev: radeon device structure
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* @ring: radeon_ring structure holding ring information
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*
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2014-02-18 18:37:50 +07:00
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*/
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2012-05-02 20:11:20 +07:00
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bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
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{
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2014-02-18 20:52:33 +07:00
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uint32_t rptr = radeon_ring_get_rptr(rdev, ring);
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2014-02-18 21:24:06 +07:00
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uint64_t last = atomic64_read(&ring->last_activity);
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uint64_t elapsed;
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2012-05-02 20:11:20 +07:00
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2014-02-18 21:24:06 +07:00
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if (rptr != atomic_read(&ring->last_rptr)) {
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/* ring is still working, no lockup */
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2014-02-18 20:52:33 +07:00
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radeon_ring_lockup_update(rdev, ring);
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2012-05-02 20:11:20 +07:00
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return false;
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}
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2014-02-18 21:24:06 +07:00
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elapsed = jiffies_to_msecs(jiffies_64 - last);
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2012-05-02 20:11:21 +07:00
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if (radeon_lockup_timeout && elapsed >= radeon_lockup_timeout) {
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2014-02-18 21:24:06 +07:00
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dev_err(rdev->dev, "ring %d stalled for more than %llumsec\n",
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ring->idx, elapsed);
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2012-05-02 20:11:20 +07:00
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return true;
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}
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/* give a chance to the GPU ... */
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return false;
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}
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2012-07-09 16:52:44 +07:00
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/**
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* radeon_ring_backup - Back up the content of a ring
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*
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* @rdev: radeon_device pointer
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* @ring: the ring we want to back up
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*
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* Saves all unprocessed commits from a ring, returns the number of dwords saved.
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*/
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unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring,
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uint32_t **data)
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{
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unsigned size, ptr, i;
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/* just in case lock the ring */
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mutex_lock(&rdev->ring_lock);
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*data = NULL;
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|
2012-07-18 01:02:31 +07:00
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if (ring->ring_obj == NULL) {
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2012-07-09 16:52:44 +07:00
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mutex_unlock(&rdev->ring_lock);
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return 0;
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}
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/* it doesn't make sense to save anything if all fences are signaled */
|
2012-07-18 01:02:30 +07:00
|
|
|
if (!radeon_fence_count_emitted(rdev, ring->idx)) {
|
2012-07-09 16:52:44 +07:00
|
|
|
mutex_unlock(&rdev->ring_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* calculate the number of dw on the ring */
|
2012-07-18 01:02:31 +07:00
|
|
|
if (ring->rptr_save_reg)
|
|
|
|
ptr = RREG32(ring->rptr_save_reg);
|
|
|
|
else if (rdev->wb.enabled)
|
|
|
|
ptr = le32_to_cpu(*ring->next_rptr_cpu_addr);
|
|
|
|
else {
|
|
|
|
/* no way to read back the next rptr */
|
|
|
|
mutex_unlock(&rdev->ring_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-07-09 16:52:44 +07:00
|
|
|
size = ring->wptr + (ring->ring_size / 4);
|
|
|
|
size -= ptr;
|
|
|
|
size &= ring->ptr_mask;
|
|
|
|
if (size == 0) {
|
|
|
|
mutex_unlock(&rdev->ring_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* and then save the content of the ring */
|
2014-10-20 16:40:54 +07:00
|
|
|
*data = drm_malloc_ab(size, sizeof(uint32_t));
|
2012-07-20 18:17:00 +07:00
|
|
|
if (!*data) {
|
|
|
|
mutex_unlock(&rdev->ring_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
2012-07-09 16:52:44 +07:00
|
|
|
for (i = 0; i < size; ++i) {
|
|
|
|
(*data)[i] = ring->ring[ptr++];
|
|
|
|
ptr &= ring->ptr_mask;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_unlock(&rdev->ring_lock);
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* radeon_ring_restore - append saved commands to the ring again
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ring: ring to append commands to
|
|
|
|
* @size: number of dwords we want to write
|
|
|
|
* @data: saved commands
|
|
|
|
*
|
|
|
|
* Allocates space on the ring and restore the previously saved commands.
|
|
|
|
*/
|
|
|
|
int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring,
|
|
|
|
unsigned size, uint32_t *data)
|
|
|
|
{
|
|
|
|
int i, r;
|
|
|
|
|
|
|
|
if (!size || !data)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* restore the saved ring content */
|
|
|
|
r = radeon_ring_lock(rdev, ring, size);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
|
|
|
|
for (i = 0; i < size; ++i) {
|
|
|
|
radeon_ring_write(ring, data[i]);
|
|
|
|
}
|
|
|
|
|
2014-08-18 15:34:55 +07:00
|
|
|
radeon_ring_unlock_commit(rdev, ring, false);
|
2014-10-20 16:40:54 +07:00
|
|
|
drm_free_large(data);
|
2012-07-09 16:52:44 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-07-18 01:02:38 +07:00
|
|
|
/**
|
|
|
|
* radeon_ring_init - init driver ring struct.
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ring: radeon_ring structure holding ring information
|
|
|
|
* @ring_size: size of the ring
|
|
|
|
* @rptr_offs: offset of the rptr writeback location in the WB buffer
|
|
|
|
* @nop: nop packet for this ring
|
|
|
|
*
|
|
|
|
* Initialize the driver information for the selected ring (all asics).
|
|
|
|
* Returns 0 on success, error on failure.
|
|
|
|
*/
|
2011-10-23 17:56:27 +07:00
|
|
|
int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
|
2013-12-10 07:44:30 +07:00
|
|
|
unsigned rptr_offs, u32 nop)
|
2009-06-05 19:42:42 +07:00
|
|
|
{
|
|
|
|
int r;
|
|
|
|
|
2011-10-23 17:56:27 +07:00
|
|
|
ring->ring_size = ring_size;
|
|
|
|
ring->rptr_offs = rptr_offs;
|
2011-11-18 02:25:56 +07:00
|
|
|
ring->nop = nop;
|
2009-06-05 19:42:42 +07:00
|
|
|
/* Allocate ring buffer */
|
2011-10-23 17:56:27 +07:00
|
|
|
if (ring->ring_obj == NULL) {
|
|
|
|
r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
|
2014-09-18 19:11:56 +07:00
|
|
|
RADEON_GEM_DOMAIN_GTT, 0, NULL,
|
2012-05-11 05:33:13 +07:00
|
|
|
NULL, &ring->ring_obj);
|
2009-06-05 19:42:42 +07:00
|
|
|
if (r) {
|
2009-11-20 20:29:23 +07:00
|
|
|
dev_err(rdev->dev, "(%d) ring create failed\n", r);
|
2009-06-05 19:42:42 +07:00
|
|
|
return r;
|
|
|
|
}
|
2011-10-23 17:56:27 +07:00
|
|
|
r = radeon_bo_reserve(ring->ring_obj, false);
|
2009-11-20 20:29:23 +07:00
|
|
|
if (unlikely(r != 0))
|
|
|
|
return r;
|
2011-10-23 17:56:27 +07:00
|
|
|
r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
|
|
|
|
&ring->gpu_addr);
|
2009-06-05 19:42:42 +07:00
|
|
|
if (r) {
|
2011-10-23 17:56:27 +07:00
|
|
|
radeon_bo_unreserve(ring->ring_obj);
|
2009-11-20 20:29:23 +07:00
|
|
|
dev_err(rdev->dev, "(%d) ring pin failed\n", r);
|
2009-06-05 19:42:42 +07:00
|
|
|
return r;
|
|
|
|
}
|
2011-10-23 17:56:27 +07:00
|
|
|
r = radeon_bo_kmap(ring->ring_obj,
|
|
|
|
(void **)&ring->ring);
|
|
|
|
radeon_bo_unreserve(ring->ring_obj);
|
2009-06-05 19:42:42 +07:00
|
|
|
if (r) {
|
2009-11-20 20:29:23 +07:00
|
|
|
dev_err(rdev->dev, "(%d) ring map failed\n", r);
|
2009-06-05 19:42:42 +07:00
|
|
|
return r;
|
|
|
|
}
|
|
|
|
}
|
2011-10-23 17:56:27 +07:00
|
|
|
ring->ptr_mask = (ring->ring_size / 4) - 1;
|
|
|
|
ring->ring_free_dw = ring->ring_size / 4;
|
2012-07-18 01:02:31 +07:00
|
|
|
if (rdev->wb.enabled) {
|
|
|
|
u32 index = RADEON_WB_RING0_NEXT_RPTR + (ring->idx * 4);
|
|
|
|
ring->next_rptr_gpu_addr = rdev->wb.gpu_addr + index;
|
|
|
|
ring->next_rptr_cpu_addr = &rdev->wb.wb[index/4];
|
|
|
|
}
|
2012-05-02 20:11:11 +07:00
|
|
|
if (radeon_debugfs_ring_init(rdev, ring)) {
|
|
|
|
DRM_ERROR("Failed to register debugfs file for rings !\n");
|
|
|
|
}
|
2014-02-18 20:52:33 +07:00
|
|
|
radeon_ring_lockup_update(rdev, ring);
|
2009-06-05 19:42:42 +07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-07-18 01:02:38 +07:00
|
|
|
/**
|
|
|
|
* radeon_ring_fini - tear down the driver ring struct.
|
|
|
|
*
|
|
|
|
* @rdev: radeon_device pointer
|
|
|
|
* @ring: radeon_ring structure holding ring information
|
|
|
|
*
|
|
|
|
* Tear down the driver information for the selected ring (all asics).
|
|
|
|
*/
|
2011-10-23 17:56:27 +07:00
|
|
|
void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
|
2009-06-05 19:42:42 +07:00
|
|
|
{
|
2009-11-20 20:29:23 +07:00
|
|
|
int r;
|
2010-05-06 22:02:24 +07:00
|
|
|
struct radeon_bo *ring_obj;
|
2009-11-20 20:29:23 +07:00
|
|
|
|
2012-05-09 20:34:45 +07:00
|
|
|
mutex_lock(&rdev->ring_lock);
|
2011-10-23 17:56:27 +07:00
|
|
|
ring_obj = ring->ring_obj;
|
2012-05-09 20:34:45 +07:00
|
|
|
ring->ready = false;
|
2011-10-23 17:56:27 +07:00
|
|
|
ring->ring = NULL;
|
|
|
|
ring->ring_obj = NULL;
|
2012-05-09 20:34:45 +07:00
|
|
|
mutex_unlock(&rdev->ring_lock);
|
2010-05-06 22:02:24 +07:00
|
|
|
|
|
|
|
if (ring_obj) {
|
|
|
|
r = radeon_bo_reserve(ring_obj, false);
|
2009-11-20 20:29:23 +07:00
|
|
|
if (likely(r == 0)) {
|
2010-05-06 22:02:24 +07:00
|
|
|
radeon_bo_kunmap(ring_obj);
|
|
|
|
radeon_bo_unpin(ring_obj);
|
|
|
|
radeon_bo_unreserve(ring_obj);
|
2009-11-20 20:29:23 +07:00
|
|
|
}
|
2010-05-06 22:02:24 +07:00
|
|
|
radeon_bo_unref(&ring_obj);
|
2009-06-05 19:42:42 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Debugfs info
|
|
|
|
*/
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
2011-10-24 22:08:44 +07:00
|
|
|
|
|
|
|
static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
|
|
|
|
{
|
|
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
|
|
struct drm_device *dev = node->minor->dev;
|
|
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
|
|
int ridx = *(int*)node->info_ent->data;
|
|
|
|
struct radeon_ring *ring = &rdev->ring[ridx];
|
2013-12-12 15:42:37 +07:00
|
|
|
|
|
|
|
uint32_t rptr, wptr, rptr_next;
|
2011-10-24 22:08:44 +07:00
|
|
|
unsigned count, i, j;
|
|
|
|
|
|
|
|
radeon_ring_free_size(rdev, ring);
|
|
|
|
count = (ring->ring_size / 4) - ring->ring_free_dw;
|
2013-12-12 15:42:37 +07:00
|
|
|
|
|
|
|
wptr = radeon_ring_get_wptr(rdev, ring);
|
2013-12-10 07:44:30 +07:00
|
|
|
seq_printf(m, "wptr: 0x%08x [%5d]\n",
|
|
|
|
wptr, wptr);
|
2013-12-12 15:42:37 +07:00
|
|
|
|
|
|
|
rptr = radeon_ring_get_rptr(rdev, ring);
|
2013-12-10 07:44:30 +07:00
|
|
|
seq_printf(m, "rptr: 0x%08x [%5d]\n",
|
|
|
|
rptr, rptr);
|
2013-12-12 15:42:37 +07:00
|
|
|
|
2012-07-06 21:22:55 +07:00
|
|
|
if (ring->rptr_save_reg) {
|
2013-12-12 15:42:37 +07:00
|
|
|
rptr_next = RREG32(ring->rptr_save_reg);
|
|
|
|
seq_printf(m, "rptr next(0x%04x): 0x%08x [%5d]\n",
|
|
|
|
ring->rptr_save_reg, rptr_next, rptr_next);
|
|
|
|
} else
|
|
|
|
rptr_next = ~0;
|
|
|
|
|
|
|
|
seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n",
|
|
|
|
ring->wptr, ring->wptr);
|
|
|
|
seq_printf(m, "last semaphore signal addr : 0x%016llx\n",
|
|
|
|
ring->last_semaphore_signal_addr);
|
|
|
|
seq_printf(m, "last semaphore wait addr : 0x%016llx\n",
|
|
|
|
ring->last_semaphore_wait_addr);
|
2011-10-24 22:08:44 +07:00
|
|
|
seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
|
|
|
|
seq_printf(m, "%u dwords in ring\n", count);
|
2013-12-12 15:42:37 +07:00
|
|
|
|
2015-03-23 17:32:59 +07:00
|
|
|
if (!ring->ring)
|
2013-12-12 15:42:37 +07:00
|
|
|
return 0;
|
|
|
|
|
2013-01-03 05:30:34 +07:00
|
|
|
/* print 8 dw before current rptr as often it's the last executed
|
|
|
|
* packet that is the root issue
|
|
|
|
*/
|
2013-12-12 15:42:37 +07:00
|
|
|
i = (rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask;
|
|
|
|
for (j = 0; j <= (count + 32); j++) {
|
|
|
|
seq_printf(m, "r[%5d]=0x%08x", i, ring->ring[i]);
|
|
|
|
if (rptr == i)
|
|
|
|
seq_puts(m, " *");
|
|
|
|
if (rptr_next == i)
|
|
|
|
seq_puts(m, " #");
|
|
|
|
seq_puts(m, "\n");
|
|
|
|
i = (i + 1) & ring->ptr_mask;
|
2011-10-24 22:08:44 +07:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-08 17:41:29 +07:00
|
|
|
static int radeon_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
|
|
|
|
static int cayman_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
|
|
|
|
static int cayman_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
|
|
|
|
static int radeon_dma1_index = R600_RING_TYPE_DMA_INDEX;
|
|
|
|
static int radeon_dma2_index = CAYMAN_RING_TYPE_DMA1_INDEX;
|
|
|
|
static int r600_uvd_index = R600_RING_TYPE_UVD_INDEX;
|
2013-05-23 17:10:04 +07:00
|
|
|
static int si_vce1_index = TN_RING_TYPE_VCE1_INDEX;
|
|
|
|
static int si_vce2_index = TN_RING_TYPE_VCE2_INDEX;
|
2011-10-24 22:08:44 +07:00
|
|
|
|
|
|
|
static struct drm_info_list radeon_debugfs_ring_info_list[] = {
|
2013-04-08 17:41:29 +07:00
|
|
|
{"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_gfx_index},
|
|
|
|
{"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_cp1_index},
|
|
|
|
{"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_cp2_index},
|
|
|
|
{"radeon_ring_dma1", radeon_debugfs_ring_info, 0, &radeon_dma1_index},
|
|
|
|
{"radeon_ring_dma2", radeon_debugfs_ring_info, 0, &radeon_dma2_index},
|
|
|
|
{"radeon_ring_uvd", radeon_debugfs_ring_info, 0, &r600_uvd_index},
|
2013-05-23 17:10:04 +07:00
|
|
|
{"radeon_ring_vce1", radeon_debugfs_ring_info, 0, &si_vce1_index},
|
|
|
|
{"radeon_ring_vce2", radeon_debugfs_ring_info, 0, &si_vce2_index},
|
2011-10-24 22:08:44 +07:00
|
|
|
};
|
|
|
|
|
2009-06-05 19:42:42 +07:00
|
|
|
#endif
|
|
|
|
|
2012-09-01 00:43:50 +07:00
|
|
|
static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
|
2011-10-24 22:08:44 +07:00
|
|
|
{
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
2012-05-02 20:11:11 +07:00
|
|
|
unsigned i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {
|
|
|
|
struct drm_info_list *info = &radeon_debugfs_ring_info_list[i];
|
|
|
|
int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;
|
|
|
|
unsigned r;
|
|
|
|
|
|
|
|
if (&rdev->ring[ridx] != ring)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
r = radeon_debugfs_add_files(rdev, info, 1);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
}
|
2011-10-24 22:08:44 +07:00
|
|
|
#endif
|
2012-05-02 20:11:11 +07:00
|
|
|
return 0;
|
2011-10-24 22:08:44 +07:00
|
|
|
}
|