2020-07-19 14:25:21 +07:00
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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2016-01-23 04:00:15 +07:00
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/*
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IB/{hfi1, rdmavt, qib}: Implement CQ completion vector support
Currently the driver doesn't support completion vectors. These
are used to indicate which sets of CQs should be grouped together
into the same vector. A vector is a CQ processing thread that
runs on a specific CPU.
If an application has several CQs bound to different completion
vectors, and each completion vector runs on different CPUs, then
the completion queue workload is balanced. This helps scale as more
nodes are used.
Implement CQ completion vector support using a global workqueue
where a CQ entry is queued to the CPU corresponding to the CQ's
completion vector. Since the workqueue is global, it's guaranteed
to always be there when queueing CQ entries; Therefore, the RCU
locking for cq->rdi->worker in the hot path is superfluous.
Each completion vector is assigned to a different CPU. The number of
completion vectors available is computed by taking the number of
online, physical CPUs from the local NUMA node and subtracting the
CPUs used for kernel receive queues and the general interrupt.
Special use cases:
* If there are no CPUs left for completion vectors, the same CPU
for the general interrupt is used; Therefore, there would only
be one completion vector available.
* For multi-HFI systems, the number of completion vectors available
for each device is the total number of completion vectors in
the local NUMA node divided by the number of devices in the same
NUMA node. If there's a division remainder, the first device to
get initialized gets an extra completion vector.
Upon a CQ creation, an invalid completion vector could be specified.
Handle it as follows:
* If the completion vector is less than 0, set it to 0.
* Set the completion vector to the result of the passed completion
vector moded with the number of device completion vectors
available.
Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-05-02 20:43:55 +07:00
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* Copyright(c) 2016 - 2018 Intel Corporation.
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2016-01-23 04:00:15 +07:00
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*/
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2020-07-19 14:25:21 +07:00
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#ifndef DEF_RDMAVT_INCCQ_H
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#define DEF_RDMAVT_INCCQ_H
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2016-01-23 04:00:15 +07:00
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#include <linux/kthread.h>
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#include <rdma/ib_user_verbs.h>
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2019-07-23 00:01:30 +07:00
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#include <rdma/ib_verbs.h>
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2016-01-23 04:00:15 +07:00
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/*
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* Define an ib_cq_notify value that is not valid so we know when CQ
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* notifications are armed.
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*/
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#define RVT_CQ_NONE (IB_CQ_NEXT_COMP + 1)
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2019-06-29 01:04:17 +07:00
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/*
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* Define read macro that apply smp_load_acquire memory barrier
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* when reading indice of circular buffer that mmaped to user space.
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*/
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#define RDMA_READ_UAPI_ATOMIC(member) smp_load_acquire(&(member).val)
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/*
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* Define write macro that uses smp_store_release memory barrier
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* when writing indice of circular buffer that mmaped to user space.
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*/
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#define RDMA_WRITE_UAPI_ATOMIC(member, x) smp_store_release(&(member).val, x)
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#include <rdma/rvt-abi.h>
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2016-01-23 04:00:15 +07:00
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/*
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* This structure is used to contain the head pointer, tail pointer,
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* and completion queue entries as a single memory allocation so
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* it can be mmap'ed into user space.
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*/
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2019-06-29 01:04:17 +07:00
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struct rvt_k_cq_wc {
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2016-01-23 04:00:15 +07:00
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u32 head; /* index of next entry to fill */
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u32 tail; /* index of next ib_poll_cq() entry */
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2019-06-29 01:04:17 +07:00
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struct ib_wc kqueue[];
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2016-01-23 04:00:15 +07:00
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};
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/*
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* The completion queue structure.
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*/
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struct rvt_cq {
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struct ib_cq ibcq;
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IB/{hfi1, rdmavt, qib}: Implement CQ completion vector support
Currently the driver doesn't support completion vectors. These
are used to indicate which sets of CQs should be grouped together
into the same vector. A vector is a CQ processing thread that
runs on a specific CPU.
If an application has several CQs bound to different completion
vectors, and each completion vector runs on different CPUs, then
the completion queue workload is balanced. This helps scale as more
nodes are used.
Implement CQ completion vector support using a global workqueue
where a CQ entry is queued to the CPU corresponding to the CQ's
completion vector. Since the workqueue is global, it's guaranteed
to always be there when queueing CQ entries; Therefore, the RCU
locking for cq->rdi->worker in the hot path is superfluous.
Each completion vector is assigned to a different CPU. The number of
completion vectors available is computed by taking the number of
online, physical CPUs from the local NUMA node and subtracting the
CPUs used for kernel receive queues and the general interrupt.
Special use cases:
* If there are no CPUs left for completion vectors, the same CPU
for the general interrupt is used; Therefore, there would only
be one completion vector available.
* For multi-HFI systems, the number of completion vectors available
for each device is the total number of completion vectors in
the local NUMA node divided by the number of devices in the same
NUMA node. If there's a division remainder, the first device to
get initialized gets an extra completion vector.
Upon a CQ creation, an invalid completion vector could be specified.
Handle it as follows:
* If the completion vector is less than 0, set it to 0.
* Set the completion vector to the result of the passed completion
vector moded with the number of device completion vectors
available.
Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-05-02 20:43:55 +07:00
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struct work_struct comptask;
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2016-01-23 04:00:15 +07:00
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spinlock_t lock; /* protect changes in this struct */
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u8 notify;
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u8 triggered;
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2019-06-29 01:21:52 +07:00
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u8 cq_full;
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IB/{hfi1, rdmavt, qib}: Implement CQ completion vector support
Currently the driver doesn't support completion vectors. These
are used to indicate which sets of CQs should be grouped together
into the same vector. A vector is a CQ processing thread that
runs on a specific CPU.
If an application has several CQs bound to different completion
vectors, and each completion vector runs on different CPUs, then
the completion queue workload is balanced. This helps scale as more
nodes are used.
Implement CQ completion vector support using a global workqueue
where a CQ entry is queued to the CPU corresponding to the CQ's
completion vector. Since the workqueue is global, it's guaranteed
to always be there when queueing CQ entries; Therefore, the RCU
locking for cq->rdi->worker in the hot path is superfluous.
Each completion vector is assigned to a different CPU. The number of
completion vectors available is computed by taking the number of
online, physical CPUs from the local NUMA node and subtracting the
CPUs used for kernel receive queues and the general interrupt.
Special use cases:
* If there are no CPUs left for completion vectors, the same CPU
for the general interrupt is used; Therefore, there would only
be one completion vector available.
* For multi-HFI systems, the number of completion vectors available
for each device is the total number of completion vectors in
the local NUMA node divided by the number of devices in the same
NUMA node. If there's a division remainder, the first device to
get initialized gets an extra completion vector.
Upon a CQ creation, an invalid completion vector could be specified.
Handle it as follows:
* If the completion vector is less than 0, set it to 0.
* Set the completion vector to the result of the passed completion
vector moded with the number of device completion vectors
available.
Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
2018-05-02 20:43:55 +07:00
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int comp_vector_cpu;
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2016-01-23 04:00:15 +07:00
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struct rvt_dev_info *rdi;
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struct rvt_cq_wc *queue;
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struct rvt_mmap_info *ip;
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2019-06-29 01:04:17 +07:00
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struct rvt_k_cq_wc *kqueue;
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2016-01-23 04:00:15 +07:00
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};
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static inline struct rvt_cq *ibcq_to_rvtcq(struct ib_cq *ibcq)
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{
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return container_of(ibcq, struct rvt_cq, ibcq);
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}
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2019-06-29 01:21:52 +07:00
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bool rvt_cq_enter(struct rvt_cq *cq, struct ib_wc *entry, bool solicited);
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2016-01-23 04:00:15 +07:00
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#endif /* DEF_RDMAVT_INCCQH */
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