2019-05-27 13:55:01 +07:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2017-03-31 08:43:21 +07:00
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/*
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* Distributed Switch Architecture loopback driver
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*
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* Copyright (C) 2016, Florian Fainelli <f.fainelli@gmail.com>
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*/
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#include <linux/platform_device.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <linux/phy_fixed.h>
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#include <linux/export.h>
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2017-06-16 00:15:53 +07:00
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#include <linux/ethtool.h>
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2017-03-31 08:43:21 +07:00
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#include <linux/workqueue.h>
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#include <linux/module.h>
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#include <linux/if_bridge.h>
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#include <net/dsa.h>
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#include "dsa_loop.h"
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struct dsa_loop_vlan {
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u16 members;
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u16 untagged;
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};
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2017-06-16 00:15:53 +07:00
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struct dsa_loop_mib_entry {
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char name[ETH_GSTRING_LEN];
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unsigned long val;
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};
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enum dsa_loop_mib_counters {
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DSA_LOOP_PHY_READ_OK,
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DSA_LOOP_PHY_READ_ERR,
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DSA_LOOP_PHY_WRITE_OK,
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DSA_LOOP_PHY_WRITE_ERR,
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__DSA_LOOP_CNT_MAX,
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};
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static struct dsa_loop_mib_entry dsa_loop_mibs[] = {
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[DSA_LOOP_PHY_READ_OK] = { "phy_read_ok", },
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[DSA_LOOP_PHY_READ_ERR] = { "phy_read_err", },
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[DSA_LOOP_PHY_WRITE_OK] = { "phy_write_ok", },
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[DSA_LOOP_PHY_WRITE_ERR] = { "phy_write_err", },
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};
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struct dsa_loop_port {
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struct dsa_loop_mib_entry mib[__DSA_LOOP_CNT_MAX];
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};
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2017-03-31 08:43:21 +07:00
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#define DSA_LOOP_VLANS 5
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struct dsa_loop_priv {
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struct mii_bus *bus;
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unsigned int port_base;
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struct dsa_loop_vlan vlans[DSA_LOOP_VLANS];
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struct net_device *netdev;
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2017-06-16 00:15:53 +07:00
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struct dsa_loop_port ports[DSA_MAX_PORTS];
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2017-03-31 08:43:21 +07:00
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u16 pvid;
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};
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static struct phy_device *phydevs[PHY_MAX_ADDR];
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2017-11-11 06:22:52 +07:00
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static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds,
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int port)
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2017-03-31 08:43:21 +07:00
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{
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d\n", __func__, port);
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2017-03-31 08:43:21 +07:00
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return DSA_TAG_PROTO_NONE;
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}
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static int dsa_loop_setup(struct dsa_switch *ds)
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{
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2017-06-16 00:15:53 +07:00
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struct dsa_loop_priv *ps = ds->priv;
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unsigned int i;
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for (i = 0; i < ds->num_ports; i++)
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memcpy(ps->ports[i].mib, dsa_loop_mibs,
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sizeof(dsa_loop_mibs));
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2017-03-31 08:43:21 +07:00
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dev_dbg(ds->dev, "%s\n", __func__);
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return 0;
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}
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2018-04-26 02:12:50 +07:00
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static int dsa_loop_get_sset_count(struct dsa_switch *ds, int port, int sset)
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2017-06-16 00:15:53 +07:00
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{
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2018-04-26 02:12:54 +07:00
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if (sset != ETH_SS_STATS && sset != ETH_SS_PHY_STATS)
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2018-04-26 02:12:50 +07:00
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return 0;
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2017-06-16 00:15:53 +07:00
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return __DSA_LOOP_CNT_MAX;
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}
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2018-04-26 02:12:50 +07:00
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static void dsa_loop_get_strings(struct dsa_switch *ds, int port,
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u32 stringset, uint8_t *data)
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2017-06-16 00:15:53 +07:00
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{
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struct dsa_loop_priv *ps = ds->priv;
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unsigned int i;
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2018-04-26 02:12:54 +07:00
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if (stringset != ETH_SS_STATS && stringset != ETH_SS_PHY_STATS)
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2018-04-26 02:12:50 +07:00
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return;
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2017-06-16 00:15:53 +07:00
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for (i = 0; i < __DSA_LOOP_CNT_MAX; i++)
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memcpy(data + i * ETH_GSTRING_LEN,
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ps->ports[port].mib[i].name, ETH_GSTRING_LEN);
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}
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static void dsa_loop_get_ethtool_stats(struct dsa_switch *ds, int port,
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uint64_t *data)
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{
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struct dsa_loop_priv *ps = ds->priv;
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unsigned int i;
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for (i = 0; i < __DSA_LOOP_CNT_MAX; i++)
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data[i] = ps->ports[port].mib[i].val;
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}
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2017-03-31 08:43:21 +07:00
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static int dsa_loop_phy_read(struct dsa_switch *ds, int port, int regnum)
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{
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struct dsa_loop_priv *ps = ds->priv;
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struct mii_bus *bus = ps->bus;
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2017-06-16 00:15:53 +07:00
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int ret;
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2017-03-31 08:43:21 +07:00
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2017-06-16 00:15:53 +07:00
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ret = mdiobus_read_nested(bus, ps->port_base + port, regnum);
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if (ret < 0)
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ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++;
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else
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ps->ports[port].mib[DSA_LOOP_PHY_READ_OK].val++;
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return ret;
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2017-03-31 08:43:21 +07:00
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}
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static int dsa_loop_phy_write(struct dsa_switch *ds, int port,
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int regnum, u16 value)
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{
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struct dsa_loop_priv *ps = ds->priv;
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struct mii_bus *bus = ps->bus;
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2017-06-16 00:15:53 +07:00
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int ret;
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2017-03-31 08:43:21 +07:00
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2017-06-16 00:15:53 +07:00
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ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value);
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if (ret < 0)
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ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++;
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else
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ps->ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++;
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return ret;
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2017-03-31 08:43:21 +07:00
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}
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static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port,
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struct net_device *bridge)
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{
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n",
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__func__, port, bridge->name);
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2017-03-31 08:43:21 +07:00
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return 0;
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}
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static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port,
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struct net_device *bridge)
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{
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n",
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__func__, port, bridge->name);
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2017-03-31 08:43:21 +07:00
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}
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static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port,
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u8 state)
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{
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d, state: %d\n",
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__func__, port, state);
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2017-03-31 08:43:21 +07:00
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}
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static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port,
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bool vlan_filtering)
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{
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d, vlan_filtering: %d\n",
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__func__, port, vlan_filtering);
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2017-03-31 08:43:21 +07:00
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return 0;
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}
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2017-11-30 23:23:57 +07:00
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static int
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dsa_loop_port_vlan_prepare(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_vlan *vlan)
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2017-03-31 08:43:21 +07:00
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{
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struct dsa_loop_priv *ps = ds->priv;
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struct mii_bus *bus = ps->bus;
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d, vlan: %d-%d",
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__func__, port, vlan->vid_begin, vlan->vid_end);
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2017-03-31 08:43:21 +07:00
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/* Just do a sleeping operation to make lockdep checks effective */
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mdiobus_read(bus, ps->port_base + port, MII_BMSR);
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if (vlan->vid_end > DSA_LOOP_VLANS)
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return -ERANGE;
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return 0;
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}
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static void dsa_loop_port_vlan_add(struct dsa_switch *ds, int port,
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2017-11-30 23:23:57 +07:00
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const struct switchdev_obj_port_vlan *vlan)
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2017-03-31 08:43:21 +07:00
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{
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bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
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bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
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struct dsa_loop_priv *ps = ds->priv;
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struct mii_bus *bus = ps->bus;
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struct dsa_loop_vlan *vl;
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u16 vid;
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/* Just do a sleeping operation to make lockdep checks effective */
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mdiobus_read(bus, ps->port_base + port, MII_BMSR);
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for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) {
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vl = &ps->vlans[vid];
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vl->members |= BIT(port);
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if (untagged)
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vl->untagged |= BIT(port);
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else
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vl->untagged &= ~BIT(port);
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n",
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__func__, port, vid, untagged ? "un" : "", pvid);
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2017-03-31 08:43:21 +07:00
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}
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if (pvid)
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ps->pvid = vid;
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}
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static int dsa_loop_port_vlan_del(struct dsa_switch *ds, int port,
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const struct switchdev_obj_port_vlan *vlan)
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{
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bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
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struct dsa_loop_priv *ps = ds->priv;
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struct mii_bus *bus = ps->bus;
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struct dsa_loop_vlan *vl;
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2017-04-06 01:19:30 +07:00
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u16 vid, pvid = ps->pvid;
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2017-03-31 08:43:21 +07:00
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/* Just do a sleeping operation to make lockdep checks effective */
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mdiobus_read(bus, ps->port_base + port, MII_BMSR);
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for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) {
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vl = &ps->vlans[vid];
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vl->members &= ~BIT(port);
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if (untagged)
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vl->untagged &= ~BIT(port);
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if (pvid == vid)
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pvid = 1;
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2018-05-25 10:52:14 +07:00
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dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n",
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__func__, port, vid, untagged ? "un" : "", pvid);
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2017-03-31 08:43:21 +07:00
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}
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ps->pvid = pvid;
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return 0;
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}
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2017-08-09 12:04:15 +07:00
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static const struct dsa_switch_ops dsa_loop_driver = {
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2017-03-31 08:43:21 +07:00
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.get_tag_protocol = dsa_loop_get_protocol,
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.setup = dsa_loop_setup,
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2017-06-16 00:15:53 +07:00
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.get_strings = dsa_loop_get_strings,
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.get_ethtool_stats = dsa_loop_get_ethtool_stats,
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.get_sset_count = dsa_loop_get_sset_count,
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2018-04-26 02:12:54 +07:00
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.get_ethtool_phy_stats = dsa_loop_get_ethtool_stats,
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2017-03-31 08:43:21 +07:00
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.phy_read = dsa_loop_phy_read,
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.phy_write = dsa_loop_phy_write,
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.port_bridge_join = dsa_loop_port_bridge_join,
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.port_bridge_leave = dsa_loop_port_bridge_leave,
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.port_stp_state_set = dsa_loop_port_stp_state_set,
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.port_vlan_filtering = dsa_loop_port_vlan_filtering,
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.port_vlan_prepare = dsa_loop_port_vlan_prepare,
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.port_vlan_add = dsa_loop_port_vlan_add,
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.port_vlan_del = dsa_loop_port_vlan_del,
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};
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static int dsa_loop_drv_probe(struct mdio_device *mdiodev)
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{
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struct dsa_loop_pdata *pdata = mdiodev->dev.platform_data;
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struct dsa_loop_priv *ps;
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struct dsa_switch *ds;
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if (!pdata)
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return -ENODEV;
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dev_info(&mdiodev->dev, "%s: 0x%0x\n",
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pdata->name, pdata->enabled_ports);
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ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS);
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if (!ds)
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return -ENOMEM;
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ps = devm_kzalloc(&mdiodev->dev, sizeof(*ps), GFP_KERNEL);
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2017-05-06 12:29:45 +07:00
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if (!ps)
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return -ENOMEM;
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2017-03-31 08:43:21 +07:00
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ps->netdev = dev_get_by_name(&init_net, pdata->netdev);
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if (!ps->netdev)
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return -EPROBE_DEFER;
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pdata->cd.netdev[DSA_LOOP_CPU_PORT] = &ps->netdev->dev;
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ds->dev = &mdiodev->dev;
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ds->ops = &dsa_loop_driver;
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ds->priv = ps;
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ps->bus = mdiodev->bus;
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dev_set_drvdata(&mdiodev->dev, ds);
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2017-05-27 05:12:51 +07:00
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return dsa_register_switch(ds);
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2017-03-31 08:43:21 +07:00
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}
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static void dsa_loop_drv_remove(struct mdio_device *mdiodev)
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{
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struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev);
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|
|
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struct dsa_loop_priv *ps = ds->priv;
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|
|
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|
|
|
|
dsa_unregister_switch(ds);
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|
|
|
dev_put(ps->netdev);
|
|
|
|
}
|
|
|
|
|
|
|
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static struct mdio_driver dsa_loop_drv = {
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|
|
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.mdiodrv.driver = {
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|
|
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.name = "dsa-loop",
|
|
|
|
},
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|
|
|
.probe = dsa_loop_drv_probe,
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|
|
|
.remove = dsa_loop_drv_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
#define NUM_FIXED_PHYS (DSA_LOOP_NUM_PORTS - 2)
|
|
|
|
|
|
|
|
static int __init dsa_loop_init(void)
|
|
|
|
{
|
|
|
|
struct fixed_phy_status status = {
|
|
|
|
.link = 1,
|
|
|
|
.speed = SPEED_100,
|
|
|
|
.duplex = DUPLEX_FULL,
|
|
|
|
};
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < NUM_FIXED_PHYS; i++)
|
2019-02-04 17:26:18 +07:00
|
|
|
phydevs[i] = fixed_phy_register(PHY_POLL, &status, NULL);
|
2017-03-31 08:43:21 +07:00
|
|
|
|
|
|
|
return mdio_driver_register(&dsa_loop_drv);
|
|
|
|
}
|
|
|
|
module_init(dsa_loop_init);
|
|
|
|
|
|
|
|
static void __exit dsa_loop_exit(void)
|
|
|
|
{
|
2017-06-16 00:15:52 +07:00
|
|
|
unsigned int i;
|
|
|
|
|
2017-03-31 08:43:21 +07:00
|
|
|
mdio_driver_unregister(&dsa_loop_drv);
|
2017-06-16 00:15:52 +07:00
|
|
|
for (i = 0; i < NUM_FIXED_PHYS; i++)
|
2017-09-02 22:56:45 +07:00
|
|
|
if (!IS_ERR(phydevs[i]))
|
2017-06-16 00:15:52 +07:00
|
|
|
fixed_phy_unregister(phydevs[i]);
|
2017-03-31 08:43:21 +07:00
|
|
|
}
|
|
|
|
module_exit(dsa_loop_exit);
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_AUTHOR("Florian Fainelli");
|
|
|
|
MODULE_DESCRIPTION("DSA loopback driver");
|