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32 lines
583 B
Plaintext
32 lines
583 B
Plaintext
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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enable-method = "sigma,tango4-smp";
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cpu0: cpu@0 {
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compatible = "arm,cortex-a9";
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next-level-cache = <&l2cc>;
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device_type = "cpu";
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reg = <0>;
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};
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cpu1: cpu@1 {
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compatible = "arm,cortex-a9";
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next-level-cache = <&l2cc>;
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device_type = "cpu";
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reg = <1>;
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};
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};
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupt-affinity = <&cpu0>, <&cpu1>;
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interrupts =
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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