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linux_dsm_epyc7002/drivers/usb/host/xhci-dbg.c

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USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
/*
* xHCI host controller driver
*
* Copyright (C) 2008 Intel Corp.
*
* Author: Sarah Sharp
* Some code borrowed from the Linux EHCI driver.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software Foundation,
* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "xhci.h"
#define XHCI_INIT_VALUE 0x0
/* Add verbose debugging later, just print everything for now */
void xhci_dbg_regs(struct xhci_hcd *xhci)
{
u32 temp;
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "// xHCI capability registers at %p:\n",
xhci->cap_regs);
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->hc_capbase);
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "// @%p = 0x%x (CAPLENGTH AND HCIVERSION)\n",
&xhci->cap_regs->hc_capbase, temp);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n",
(unsigned int) HC_LENGTH(temp));
xhci_dbg(xhci, "// HCIVERSION: 0x%x\n",
(unsigned int) HC_VERSION(temp));
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->run_regs_off);
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "// @%p = 0x%x RTSOFF\n",
&xhci->cap_regs->run_regs_off,
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
(unsigned int) temp & RTSOFF_MASK);
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "// xHCI runtime registers at %p:\n", xhci->run_regs);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->db_off);
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "// @%p = 0x%x DBOFF\n", &xhci->cap_regs->db_off, temp);
xhci_dbg(xhci, "// Doorbell array at %p:\n", xhci->dba);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
}
USB: xhci: Avoid global namespace pollution. Make all globally visible functions start with xhci_ and mark functions as static if they're only called within the same C file. Fix some long lines while we're at it. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:05:20 +07:00
static void xhci_print_cap_regs(struct xhci_hcd *xhci)
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
{
u32 temp;
xhci: Read and parse new xhci 1.1 capability register xhci 1.1 capable controllers have a new HCCPARAMS2 registers with bits indicating support for new xhci 1.1 capabilities. Also add support for the new xhci 1.1 bits in the config operational opertational register that used to be reserved Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> [modified and left out parts not related to HCCPARAMS2 -Mathias] Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-01 22:40:31 +07:00
u32 hci_version;
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "xHCI capability registers at %p:\n", xhci->cap_regs);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->hc_capbase);
xhci: Read and parse new xhci 1.1 capability register xhci 1.1 capable controllers have a new HCCPARAMS2 registers with bits indicating support for new xhci 1.1 capabilities. Also add support for the new xhci 1.1 bits in the config operational opertational register that used to be reserved Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> [modified and left out parts not related to HCCPARAMS2 -Mathias] Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-01 22:40:31 +07:00
hci_version = HC_VERSION(temp);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:\n",
(unsigned int) temp);
xhci_dbg(xhci, "CAPLENGTH: 0x%x\n",
(unsigned int) HC_LENGTH(temp));
xhci: Read and parse new xhci 1.1 capability register xhci 1.1 capable controllers have a new HCCPARAMS2 registers with bits indicating support for new xhci 1.1 capabilities. Also add support for the new xhci 1.1 bits in the config operational opertational register that used to be reserved Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> [modified and left out parts not related to HCCPARAMS2 -Mathias] Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-01 22:40:31 +07:00
xhci_dbg(xhci, "HCIVERSION: 0x%x\n", hci_version);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->hcs_params1);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "HCSPARAMS 1: 0x%x\n",
(unsigned int) temp);
xhci_dbg(xhci, " Max device slots: %u\n",
(unsigned int) HCS_MAX_SLOTS(temp));
xhci_dbg(xhci, " Max interrupters: %u\n",
(unsigned int) HCS_MAX_INTRS(temp));
xhci_dbg(xhci, " Max ports: %u\n",
(unsigned int) HCS_MAX_PORTS(temp));
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->hcs_params2);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "HCSPARAMS 2: 0x%x\n",
(unsigned int) temp);
xhci_dbg(xhci, " Isoc scheduling threshold: %u\n",
(unsigned int) HCS_IST(temp));
xhci_dbg(xhci, " Maximum allowed segments in event ring: %u\n",
(unsigned int) HCS_ERST_MAX(temp));
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->hcs_params3);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "HCSPARAMS 3 0x%x:\n",
(unsigned int) temp);
xhci_dbg(xhci, " Worst case U1 device exit latency: %u\n",
(unsigned int) HCS_U1_LATENCY(temp));
xhci_dbg(xhci, " Worst case U2 device exit latency: %u\n",
(unsigned int) HCS_U2_LATENCY(temp));
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->hcc_params);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "HCC PARAMS 0x%x:\n", (unsigned int) temp);
xhci_dbg(xhci, " HC generates %s bit addresses\n",
HCC_64BIT_ADDR(temp) ? "64" : "32");
xhci: xHCI 1.1: Contiguous Frame ID Capability (CFC) If the Contiguous Frame ID Capability is supported (CFC = 1), then the xHC shall match the Frame ID in every Isoch TD with SIA = 0 against the Frame Index of the MFINDEX register. This rule ensures resynchronization of Isoch TDs even if some are dropped due to Missed Service Errors or Stopping the endpoint. This patch enables xHCI driver to support CFC by calculating and setting the Frame ID field of an Isoch TRB. [made some dbg messages checkpatch friendly -Mathias] Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-06 23:24:00 +07:00
xhci_dbg(xhci, " HC %s Contiguous Frame ID Capability\n",
HCC_CFC(temp) ? "has" : "hasn't");
xhci: xHCI 1.1: Stopped - Short Packet Capability (SPC) This patch enables xhci driver to support SPC by handling Stopped - Short Packet event in transfer event path. If SPC = '1' and the stop endpoint command is executed, after a Short Packet condition has been detected, but before the end of the TD has been reached, (i.e. the TD is in progress for pipe), then a Transfer Event TRB with its Completion Code set to Stopped - Short Packet and its TRB Transfer Length set to value of the EDTLA shall be forced for the interrupted TRB, irrespective of whether its IOC or ISP flags are set. This Transfer Event TRB will precede the Command Completion Event TRB for the command, and is referred to as a Stopped Transfer Event. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-06 23:24:01 +07:00
xhci_dbg(xhci, " HC %s generate Stopped - Short Package event\n",
HCC_SPC(temp) ? "can" : "can't");
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
/* FIXME */
xhci_dbg(xhci, " FIXME: more HCCPARAMS debugging\n");
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->cap_regs->run_regs_off);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "RTSOFF 0x%x:\n", temp & RTSOFF_MASK);
xhci: Read and parse new xhci 1.1 capability register xhci 1.1 capable controllers have a new HCCPARAMS2 registers with bits indicating support for new xhci 1.1 capabilities. Also add support for the new xhci 1.1 bits in the config operational opertational register that used to be reserved Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> [modified and left out parts not related to HCCPARAMS2 -Mathias] Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-01 22:40:31 +07:00
/* xhci 1.1 controllers have the HCCPARAMS2 register */
usb: host: xhci-dbg: HCIVERSION should be a binary number According to xHCI spec, HCIVERSION containing a BCD encoding of the xHCI specification revision number, 0100h corresponds to xHCI version 1.0. Change "100" as "0x100". Cc: Lu Baolu <baolu.lu@linux.intel.com> Cc: stable <stable@vger.kernel.org> Fixes: 04abb6de2825 ("xhci: Read and parse new xhci 1.1 capability register") Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-03-09 20:39:36 +07:00
if (hci_version > 0x100) {
xhci: Read and parse new xhci 1.1 capability register xhci 1.1 capable controllers have a new HCCPARAMS2 registers with bits indicating support for new xhci 1.1 capabilities. Also add support for the new xhci 1.1 bits in the config operational opertational register that used to be reserved Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> [modified and left out parts not related to HCCPARAMS2 -Mathias] Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-01 22:40:31 +07:00
temp = readl(&xhci->cap_regs->hcc_params2);
xhci_dbg(xhci, "HCC PARAMS2 0x%x:\n", (unsigned int) temp);
xhci_dbg(xhci, " HC %s Force save context capability",
HCC2_FSC(temp) ? "supports" : "doesn't support");
xhci_dbg(xhci, " HC %s Large ESIT Payload Capability",
HCC2_LEC(temp) ? "supports" : "doesn't support");
xhci_dbg(xhci, " HC %s Extended TBC capability",
HCC2_ETC(temp) ? "supports" : "doesn't support");
}
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
}
USB: xhci: Avoid global namespace pollution. Make all globally visible functions start with xhci_ and mark functions as static if they're only called within the same C file. Fix some long lines while we're at it. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:05:20 +07:00
static void xhci_print_command_reg(struct xhci_hcd *xhci)
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
{
u32 temp;
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->op_regs->command);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "USBCMD 0x%x:\n", temp);
xhci_dbg(xhci, " HC is %s\n",
(temp & CMD_RUN) ? "running" : "being stopped");
xhci_dbg(xhci, " HC has %sfinished hard reset\n",
(temp & CMD_RESET) ? "not " : "");
xhci_dbg(xhci, " Event Interrupts %s\n",
(temp & CMD_EIE) ? "enabled " : "disabled");
xhci_dbg(xhci, " Host System Error Interrupts %s\n",
xHCI: correct to print the true HSEE of USBCMD Correct the print of HSEE of USBCMD in xhci-dbg.c. Signed-off-by: Alex He <alex.he@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2012-03-22 14:06:59 +07:00
(temp & CMD_HSEIE) ? "enabled " : "disabled");
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, " HC has %sfinished light reset\n",
(temp & CMD_LRESET) ? "not " : "");
}
USB: xhci: Avoid global namespace pollution. Make all globally visible functions start with xhci_ and mark functions as static if they're only called within the same C file. Fix some long lines while we're at it. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:05:20 +07:00
static void xhci_print_status(struct xhci_hcd *xhci)
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
{
u32 temp;
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->op_regs->status);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_dbg(xhci, "USBSTS 0x%x:\n", temp);
xhci_dbg(xhci, " Event ring is %sempty\n",
(temp & STS_EINT) ? "not " : "");
xhci_dbg(xhci, " %sHost System Error\n",
(temp & STS_FATAL) ? "WARNING: " : "No ");
xhci_dbg(xhci, " HC is %s\n",
(temp & STS_HALT) ? "halted" : "running");
}
USB: xhci: Avoid global namespace pollution. Make all globally visible functions start with xhci_ and mark functions as static if they're only called within the same C file. Fix some long lines while we're at it. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:05:20 +07:00
static void xhci_print_op_regs(struct xhci_hcd *xhci)
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
{
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "xHCI operational registers at %p:\n", xhci->op_regs);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
xhci_print_command_reg(xhci);
xhci_print_status(xhci);
}
USB: xhci: Avoid global namespace pollution. Make all globally visible functions start with xhci_ and mark functions as static if they're only called within the same C file. Fix some long lines while we're at it. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:05:20 +07:00
static void xhci_print_ports(struct xhci_hcd *xhci)
USB: xhci: Root hub support. Add functionality for getting port status and hub descriptor for xHCI root hubs. This is WIP because the USB 3.0 hub descriptor is different from the USB 2.0 hub descriptor. For now, we lie about the root hub descriptor because the changes won't effect how the core talks to the root hub. Later we will need to add the USB 3.0 hub descriptor for real hubs, and this code might change. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:57:12 +07:00
{
xhci: Make xHCI driver endian-safe This patch changes the struct members defining access to xHCI device-visible memory to use __le32/__le64 where appropriate, and then adds swaps where required. Checked with sparse that all accesses are correct. MMIO accesses use readl/writel so already are performed LE, but prototypes now reflect this with __le*. There were a couple of (debug) instances of DMA pointers being truncated to 32bits which have been fixed too. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2011-03-29 09:40:46 +07:00
__le32 __iomem *addr;
USB: xhci: Root hub support. Add functionality for getting port status and hub descriptor for xHCI root hubs. This is WIP because the USB 3.0 hub descriptor is different from the USB 2.0 hub descriptor. For now, we lie about the root hub descriptor because the changes won't effect how the core talks to the root hub. Later we will need to add the USB 3.0 hub descriptor for real hubs, and this code might change. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:57:12 +07:00
int i, j;
int ports;
char *names[NUM_PORT_REGS] = {
"status",
"power",
"link",
"reserved",
};
ports = HCS_MAX_PORTS(xhci->hcs_params1);
addr = &xhci->op_regs->port_status_base;
for (i = 0; i < ports; i++) {
usb: host: xhci: change pre-increments to post-increments This is a cleanup patch only, no functional changes. The idea is just to make sure for loops look the same all over the driver. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-23 19:20:04 +07:00
for (j = 0; j < NUM_PORT_REGS; j++) {
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "%p port %s reg = 0x%x\n",
addr, names[j],
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
(unsigned int) readl(addr));
USB: xhci: Root hub support. Add functionality for getting port status and hub descriptor for xHCI root hubs. This is WIP because the USB 3.0 hub descriptor is different from the USB 2.0 hub descriptor. For now, we lie about the root hub descriptor because the changes won't effect how the core talks to the root hub. Later we will need to add the USB 3.0 hub descriptor for real hubs, and this code might change. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:57:12 +07:00
addr++;
}
}
}
USB: xhci: rework xhci_print_ir_set() to get ir set from xhci itself xhci->ir_set points to __iomem region, but xhci_print_ir_set accepts plain struct xhci_intr_reg * causing multiple sparse warning at call sites and inside the fucntion when we try to read that memory. Instead of adding __iomem qualifier to the argument let's rework the function so it itself gets needed register set from xhci and prints it. Signed-off-by: Dmitry Torokhov <dtor@vmware.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2011-02-09 07:29:33 +07:00
void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num)
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
{
USB: xhci: rework xhci_print_ir_set() to get ir set from xhci itself xhci->ir_set points to __iomem region, but xhci_print_ir_set accepts plain struct xhci_intr_reg * causing multiple sparse warning at call sites and inside the fucntion when we try to read that memory. Instead of adding __iomem qualifier to the argument let's rework the function so it itself gets needed register set from xhci and prints it. Signed-off-by: Dmitry Torokhov <dtor@vmware.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2011-02-09 07:29:33 +07:00
struct xhci_intr_reg __iomem *ir_set = &xhci->run_regs->ir_set[set_num];
void __iomem *addr;
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
u32 temp;
USB: xhci: Represent 64-bit addresses with one u64. There are several xHCI data structures that use two 32-bit fields to represent a 64-bit address. Since some architectures don't support 64-bit PCI writes, the fields need to be written in two 32-bit writes. The xHCI specification says that if a platform is incapable of generating 64-bit writes, software must write the low 32-bits first, then the high 32-bits. Hardware that supports 64-bit addressing will wait for the high 32-bit write before reading the revised value, and hardware that only supports 32-bit writes will ignore the high 32-bit write. Previous xHCI code represented 64-bit addresses with two u32 values. This lead to buggy code that would write the 32-bits in the wrong order, or forget to write the upper 32-bits. Change the two u32s to one u64 and create a function call to write all 64-bit addresses in the proper order. This new function could be modified in the future if all platforms support 64-bit writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-07-28 02:03:31 +07:00
u64 temp_64;
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
addr = &ir_set->irq_pending;
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(addr);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
if (temp == XHCI_INIT_VALUE)
return;
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, " %p: ir_set[%i]\n", ir_set, set_num);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, " %p: ir_set.pending = 0x%x\n", addr,
(unsigned int)temp);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
addr = &ir_set->irq_control;
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(addr);
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, " %p: ir_set.control = 0x%x\n", addr,
(unsigned int)temp);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
addr = &ir_set->erst_size;
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(addr);
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, " %p: ir_set.erst_size = 0x%x\n", addr,
(unsigned int)temp);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
addr = &ir_set->rsvd;
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(addr);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
if (temp != XHCI_INIT_VALUE)
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, " WARN: %p: ir_set.rsvd = 0x%x\n",
addr, (unsigned int)temp);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
USB: xhci: Represent 64-bit addresses with one u64. There are several xHCI data structures that use two 32-bit fields to represent a 64-bit address. Since some architectures don't support 64-bit PCI writes, the fields need to be written in two 32-bit writes. The xHCI specification says that if a platform is incapable of generating 64-bit writes, software must write the low 32-bits first, then the high 32-bits. Hardware that supports 64-bit addressing will wait for the high 32-bit write before reading the revised value, and hardware that only supports 32-bit writes will ignore the high 32-bit write. Previous xHCI code represented 64-bit addresses with two u32 values. This lead to buggy code that would write the 32-bits in the wrong order, or forget to write the upper 32-bits. Change the two u32s to one u64 and create a function call to write all 64-bit addresses in the proper order. This new function could be modified in the future if all platforms support 64-bit writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-07-28 02:03:31 +07:00
addr = &ir_set->erst_base;
Revert "xhci: replace xhci_read_64() with readq()" This reverts commit e8b373326d8efcaf9ec1da8b618556c89bd5ffc4. Many xHCI host controllers can only handle 32-bit addresses, and writing 64-bits at a time causes them to fail. Reading 64-bits at a time may also cause them to return 0xffffffff, so revert this commit as well. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2014-01-31 04:27:49 +07:00
temp_64 = xhci_read_64(xhci, addr);
USB: xhci: Represent 64-bit addresses with one u64. There are several xHCI data structures that use two 32-bit fields to represent a 64-bit address. Since some architectures don't support 64-bit PCI writes, the fields need to be written in two 32-bit writes. The xHCI specification says that if a platform is incapable of generating 64-bit writes, software must write the low 32-bits first, then the high 32-bits. Hardware that supports 64-bit addressing will wait for the high 32-bit write before reading the revised value, and hardware that only supports 32-bit writes will ignore the high 32-bit write. Previous xHCI code represented 64-bit addresses with two u32 values. This lead to buggy code that would write the 32-bits in the wrong order, or forget to write the upper 32-bits. Change the two u32s to one u64 and create a function call to write all 64-bit addresses in the proper order. This new function could be modified in the future if all platforms support 64-bit writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-07-28 02:03:31 +07:00
xhci_dbg(xhci, " %p: ir_set.erst_base = @%08llx\n",
addr, temp_64);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
USB: xhci: Represent 64-bit addresses with one u64. There are several xHCI data structures that use two 32-bit fields to represent a 64-bit address. Since some architectures don't support 64-bit PCI writes, the fields need to be written in two 32-bit writes. The xHCI specification says that if a platform is incapable of generating 64-bit writes, software must write the low 32-bits first, then the high 32-bits. Hardware that supports 64-bit addressing will wait for the high 32-bit write before reading the revised value, and hardware that only supports 32-bit writes will ignore the high 32-bit write. Previous xHCI code represented 64-bit addresses with two u32 values. This lead to buggy code that would write the 32-bits in the wrong order, or forget to write the upper 32-bits. Change the two u32s to one u64 and create a function call to write all 64-bit addresses in the proper order. This new function could be modified in the future if all platforms support 64-bit writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-07-28 02:03:31 +07:00
addr = &ir_set->erst_dequeue;
Revert "xhci: replace xhci_read_64() with readq()" This reverts commit e8b373326d8efcaf9ec1da8b618556c89bd5ffc4. Many xHCI host controllers can only handle 32-bit addresses, and writing 64-bits at a time causes them to fail. Reading 64-bits at a time may also cause them to return 0xffffffff, so revert this commit as well. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2014-01-31 04:27:49 +07:00
temp_64 = xhci_read_64(xhci, addr);
USB: xhci: Represent 64-bit addresses with one u64. There are several xHCI data structures that use two 32-bit fields to represent a 64-bit address. Since some architectures don't support 64-bit PCI writes, the fields need to be written in two 32-bit writes. The xHCI specification says that if a platform is incapable of generating 64-bit writes, software must write the low 32-bits first, then the high 32-bits. Hardware that supports 64-bit addressing will wait for the high 32-bit write before reading the revised value, and hardware that only supports 32-bit writes will ignore the high 32-bit write. Previous xHCI code represented 64-bit addresses with two u32 values. This lead to buggy code that would write the 32-bits in the wrong order, or forget to write the upper 32-bits. Change the two u32s to one u64 and create a function call to write all 64-bit addresses in the proper order. This new function could be modified in the future if all platforms support 64-bit writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-07-28 02:03:31 +07:00
xhci_dbg(xhci, " %p: ir_set.erst_dequeue = @%08llx\n",
addr, temp_64);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
}
void xhci_print_run_regs(struct xhci_hcd *xhci)
{
u32 temp;
int i;
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, "xHCI runtime registers at %p:\n", xhci->run_regs);
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->run_regs->microframe_index);
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, " %p: Microframe index = 0x%x\n",
&xhci->run_regs->microframe_index,
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
(unsigned int) temp);
usb: host: xhci: change pre-increments to post-increments This is a cleanup patch only, no functional changes. The idea is just to make sure for loops look the same all over the driver. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-23 19:20:04 +07:00
for (i = 0; i < 7; i++) {
xhci: replace xhci_readl() with readl() Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-11-15 10:34:06 +07:00
temp = readl(&xhci->run_regs->rsvd[i]);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
if (temp != XHCI_INIT_VALUE)
USB: xhci: fix lots of compiler warnings. Turns out someone never built this code on a 64bit platform. Someone owes me a beer... Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-30 09:14:08 +07:00
xhci_dbg(xhci, " WARN: %p: Rsvd[%i] = 0x%x\n",
&xhci->run_regs->rsvd[i],
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
i, (unsigned int) temp);
}
}
void xhci_print_registers(struct xhci_hcd *xhci)
{
xhci_print_cap_regs(xhci);
xhci_print_op_regs(xhci);
USB: xhci: Root hub support. Add functionality for getting port status and hub descriptor for xHCI root hubs. This is WIP because the USB 3.0 hub descriptor is different from the USB 2.0 hub descriptor. For now, we lie about the root hub descriptor because the changes won't effect how the core talks to the root hub. Later we will need to add the USB 3.0 hub descriptor for real hubs, and this code might change. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:57:12 +07:00
xhci_print_ports(xhci);
USB: xhci: Support xHCI host controllers and USB 3.0 devices. This is the first of many patches to add support for USB 3.0 devices and the hardware that implements the eXtensible Host Controller Interface (xHCI) 0.95 specification. This specification is not yet publicly available, but companies can receive a copy by becoming an xHCI Contributor (see http://www.intel.com/technology/usb/xhcispec.htm). No xHCI hardware has made it onto the market yet, but these patches have been tested under the Fresco Logic host controller prototype. This patch adds the xHCI register sets, which are grouped into five sets: - Generic PCI registers - Host controller "capabilities" registers (cap_regs) short - Host controller "operational" registers (op_regs) - Host controller "runtime" registers (run_regs) - Host controller "doorbell" registers These some of these registers may be virtualized if the Linux driver is running under a VM. Virtualization has not been tested for this patch. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:22 +07:00
}
USB: xhci: Ring allocation and initialization. Allocate basic xHCI host controller data structures. For every xHC, there is a command ring, an event ring, and a doorbell array. The doorbell array is used to notify the host controller that work has been enqueued onto one of the rings. The host controller driver enqueues commands on the command ring. The HW enqueues command completion events on the event ring and interrupts the system (currently using PCI interrupts, although the xHCI HW will use MSI interrupts eventually). All rings and the doorbell array must be allocated by the xHCI host controller driver. Each ring is comprised of one or more segments, which consists of 16-byte Transfer Request Blocks (TRBs) that can be chained to form a Transfer Descriptor (TD) that represents a multiple-buffer request. Segments are linked into a ring using Link TRBs, which means they are dynamically growable. The producer of the ring enqueues a TD by writing one or more TRBs in the ring and toggling the TRB cycle bit for each TRB. The consumer knows it can process the TRB when the cycle bit matches its internal consumer cycle state for the ring. The consumer cycle state is toggled an odd amount of times in the ring. An example ring (a ring must have a minimum of 16 TRBs on it, but that's too big to draw in ASCII art): chain cycle bit bit ------------------------ | TD A TRB 1 | 1 | 1 |<------------- <-- consumer dequeue ptr ------------------------ | consumer cycle state = 1 | TD A TRB 2 | 1 | 1 | | ------------------------ | | TD A TRB 3 | 0 | 1 | segment 1 | ------------------------ | | TD B TRB 1 | 1 | 1 | | ------------------------ | | TD B TRB 2 | 0 | 1 | | ------------------------ | | Link TRB | 0 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD C TRB 1 | 0 | 1 |<---- | ------------------------ | | TD D TRB 1 | 1 | 1 | | ------------------------ | | TD D TRB 2 | 1 | 1 | segment 2 | ------------------------ | | TD D TRB 3 | 1 | 1 | | ------------------------ | | TD D TRB 4 | 1 | 1 | | ------------------------ | | Link TRB | 1 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD D TRB 5 | 1 | 1 |<---- | ------------------------ | | TD D TRB 6 | 0 | 1 | | ------------------------ | | TD E TRB 1 | 0 | 1 | segment 3 | ------------------------ | | | 0 | 0 | | <-- producer enqueue ptr ------------------------ | | | 0 | 0 | | ------------------------ | | Link TRB | 0 | 0 |--------------- ------------------------ Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:34 +07:00
void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
{
xhci: Make xHCI driver endian-safe This patch changes the struct members defining access to xHCI device-visible memory to use __le32/__le64 where appropriate, and then adds swaps where required. Checked with sparse that all accesses are correct. MMIO accesses use readl/writel so already are performed LE, but prototypes now reflect this with __le*. There were a couple of (debug) instances of DMA pointers being truncated to 32bits which have been fixed too. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2011-03-29 09:40:46 +07:00
u64 addr = erst->erst_dma_addr;
USB: xhci: Ring allocation and initialization. Allocate basic xHCI host controller data structures. For every xHC, there is a command ring, an event ring, and a doorbell array. The doorbell array is used to notify the host controller that work has been enqueued onto one of the rings. The host controller driver enqueues commands on the command ring. The HW enqueues command completion events on the event ring and interrupts the system (currently using PCI interrupts, although the xHCI HW will use MSI interrupts eventually). All rings and the doorbell array must be allocated by the xHCI host controller driver. Each ring is comprised of one or more segments, which consists of 16-byte Transfer Request Blocks (TRBs) that can be chained to form a Transfer Descriptor (TD) that represents a multiple-buffer request. Segments are linked into a ring using Link TRBs, which means they are dynamically growable. The producer of the ring enqueues a TD by writing one or more TRBs in the ring and toggling the TRB cycle bit for each TRB. The consumer knows it can process the TRB when the cycle bit matches its internal consumer cycle state for the ring. The consumer cycle state is toggled an odd amount of times in the ring. An example ring (a ring must have a minimum of 16 TRBs on it, but that's too big to draw in ASCII art): chain cycle bit bit ------------------------ | TD A TRB 1 | 1 | 1 |<------------- <-- consumer dequeue ptr ------------------------ | consumer cycle state = 1 | TD A TRB 2 | 1 | 1 | | ------------------------ | | TD A TRB 3 | 0 | 1 | segment 1 | ------------------------ | | TD B TRB 1 | 1 | 1 | | ------------------------ | | TD B TRB 2 | 0 | 1 | | ------------------------ | | Link TRB | 0 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD C TRB 1 | 0 | 1 |<---- | ------------------------ | | TD D TRB 1 | 1 | 1 | | ------------------------ | | TD D TRB 2 | 1 | 1 | segment 2 | ------------------------ | | TD D TRB 3 | 1 | 1 | | ------------------------ | | TD D TRB 4 | 1 | 1 | | ------------------------ | | Link TRB | 1 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD D TRB 5 | 1 | 1 |<---- | ------------------------ | | TD D TRB 6 | 0 | 1 | | ------------------------ | | TD E TRB 1 | 0 | 1 | segment 3 | ------------------------ | | | 0 | 0 | | <-- producer enqueue ptr ------------------------ | | | 0 | 0 | | ------------------------ | | Link TRB | 0 | 0 |--------------- ------------------------ Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:34 +07:00
int i;
struct xhci_erst_entry *entry;
usb: host: xhci: change pre-increments to post-increments This is a cleanup patch only, no functional changes. The idea is just to make sure for loops look the same all over the driver. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-01-23 19:20:04 +07:00
for (i = 0; i < erst->num_entries; i++) {
USB: xhci: Ring allocation and initialization. Allocate basic xHCI host controller data structures. For every xHC, there is a command ring, an event ring, and a doorbell array. The doorbell array is used to notify the host controller that work has been enqueued onto one of the rings. The host controller driver enqueues commands on the command ring. The HW enqueues command completion events on the event ring and interrupts the system (currently using PCI interrupts, although the xHCI HW will use MSI interrupts eventually). All rings and the doorbell array must be allocated by the xHCI host controller driver. Each ring is comprised of one or more segments, which consists of 16-byte Transfer Request Blocks (TRBs) that can be chained to form a Transfer Descriptor (TD) that represents a multiple-buffer request. Segments are linked into a ring using Link TRBs, which means they are dynamically growable. The producer of the ring enqueues a TD by writing one or more TRBs in the ring and toggling the TRB cycle bit for each TRB. The consumer knows it can process the TRB when the cycle bit matches its internal consumer cycle state for the ring. The consumer cycle state is toggled an odd amount of times in the ring. An example ring (a ring must have a minimum of 16 TRBs on it, but that's too big to draw in ASCII art): chain cycle bit bit ------------------------ | TD A TRB 1 | 1 | 1 |<------------- <-- consumer dequeue ptr ------------------------ | consumer cycle state = 1 | TD A TRB 2 | 1 | 1 | | ------------------------ | | TD A TRB 3 | 0 | 1 | segment 1 | ------------------------ | | TD B TRB 1 | 1 | 1 | | ------------------------ | | TD B TRB 2 | 0 | 1 | | ------------------------ | | Link TRB | 0 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD C TRB 1 | 0 | 1 |<---- | ------------------------ | | TD D TRB 1 | 1 | 1 | | ------------------------ | | TD D TRB 2 | 1 | 1 | segment 2 | ------------------------ | | TD D TRB 3 | 1 | 1 | | ------------------------ | | TD D TRB 4 | 1 | 1 | | ------------------------ | | Link TRB | 1 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD D TRB 5 | 1 | 1 |<---- | ------------------------ | | TD D TRB 6 | 0 | 1 | | ------------------------ | | TD E TRB 1 | 0 | 1 | segment 3 | ------------------------ | | | 0 | 0 | | <-- producer enqueue ptr ------------------------ | | | 0 | 0 | | ------------------------ | | Link TRB | 0 | 0 |--------------- ------------------------ Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:34 +07:00
entry = &erst->entries[i];
xhci: Make xHCI driver endian-safe This patch changes the struct members defining access to xHCI device-visible memory to use __le32/__le64 where appropriate, and then adds swaps where required. Checked with sparse that all accesses are correct. MMIO accesses use readl/writel so already are performed LE, but prototypes now reflect this with __le*. There were a couple of (debug) instances of DMA pointers being truncated to 32bits which have been fixed too. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2011-03-29 09:40:46 +07:00
xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n",
addr,
lower_32_bits(le64_to_cpu(entry->seg_addr)),
upper_32_bits(le64_to_cpu(entry->seg_addr)),
xhci: Remove some unnecessary casts and tidy some endian swap code Some of the recently-added cpu_to_leXX and leXX_to_cpu made things somewhat messy; this patch neatens some of these areas, removing unnecessary casts in those parts also. In some places (where Y & Z are constants) a comparison of (leXX_to_cpu(X) & Y) == Z has been replaced with (X & cpu_to_leXX(Y)) == cpu_to_leXX(Z). The endian reversal of the constants should wash out at compile time. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2011-06-01 07:22:55 +07:00
le32_to_cpu(entry->seg_size),
le32_to_cpu(entry->rsvd));
USB: xhci: Ring allocation and initialization. Allocate basic xHCI host controller data structures. For every xHC, there is a command ring, an event ring, and a doorbell array. The doorbell array is used to notify the host controller that work has been enqueued onto one of the rings. The host controller driver enqueues commands on the command ring. The HW enqueues command completion events on the event ring and interrupts the system (currently using PCI interrupts, although the xHCI HW will use MSI interrupts eventually). All rings and the doorbell array must be allocated by the xHCI host controller driver. Each ring is comprised of one or more segments, which consists of 16-byte Transfer Request Blocks (TRBs) that can be chained to form a Transfer Descriptor (TD) that represents a multiple-buffer request. Segments are linked into a ring using Link TRBs, which means they are dynamically growable. The producer of the ring enqueues a TD by writing one or more TRBs in the ring and toggling the TRB cycle bit for each TRB. The consumer knows it can process the TRB when the cycle bit matches its internal consumer cycle state for the ring. The consumer cycle state is toggled an odd amount of times in the ring. An example ring (a ring must have a minimum of 16 TRBs on it, but that's too big to draw in ASCII art): chain cycle bit bit ------------------------ | TD A TRB 1 | 1 | 1 |<------------- <-- consumer dequeue ptr ------------------------ | consumer cycle state = 1 | TD A TRB 2 | 1 | 1 | | ------------------------ | | TD A TRB 3 | 0 | 1 | segment 1 | ------------------------ | | TD B TRB 1 | 1 | 1 | | ------------------------ | | TD B TRB 2 | 0 | 1 | | ------------------------ | | Link TRB | 0 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD C TRB 1 | 0 | 1 |<---- | ------------------------ | | TD D TRB 1 | 1 | 1 | | ------------------------ | | TD D TRB 2 | 1 | 1 | segment 2 | ------------------------ | | TD D TRB 3 | 1 | 1 | | ------------------------ | | TD D TRB 4 | 1 | 1 | | ------------------------ | | Link TRB | 1 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD D TRB 5 | 1 | 1 |<---- | ------------------------ | | TD D TRB 6 | 0 | 1 | | ------------------------ | | TD E TRB 1 | 0 | 1 | segment 3 | ------------------------ | | | 0 | 0 | | <-- producer enqueue ptr ------------------------ | | | 0 | 0 | | ------------------------ | | Link TRB | 0 | 0 |--------------- ------------------------ Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:34 +07:00
addr += sizeof(*entry);
}
}
void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci)
{
USB: xhci: Represent 64-bit addresses with one u64. There are several xHCI data structures that use two 32-bit fields to represent a 64-bit address. Since some architectures don't support 64-bit PCI writes, the fields need to be written in two 32-bit writes. The xHCI specification says that if a platform is incapable of generating 64-bit writes, software must write the low 32-bits first, then the high 32-bits. Hardware that supports 64-bit addressing will wait for the high 32-bit write before reading the revised value, and hardware that only supports 32-bit writes will ignore the high 32-bit write. Previous xHCI code represented 64-bit addresses with two u32 values. This lead to buggy code that would write the 32-bits in the wrong order, or forget to write the upper 32-bits. Change the two u32s to one u64 and create a function call to write all 64-bit addresses in the proper order. This new function could be modified in the future if all platforms support 64-bit writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-07-28 02:03:31 +07:00
u64 val;
USB: xhci: Ring allocation and initialization. Allocate basic xHCI host controller data structures. For every xHC, there is a command ring, an event ring, and a doorbell array. The doorbell array is used to notify the host controller that work has been enqueued onto one of the rings. The host controller driver enqueues commands on the command ring. The HW enqueues command completion events on the event ring and interrupts the system (currently using PCI interrupts, although the xHCI HW will use MSI interrupts eventually). All rings and the doorbell array must be allocated by the xHCI host controller driver. Each ring is comprised of one or more segments, which consists of 16-byte Transfer Request Blocks (TRBs) that can be chained to form a Transfer Descriptor (TD) that represents a multiple-buffer request. Segments are linked into a ring using Link TRBs, which means they are dynamically growable. The producer of the ring enqueues a TD by writing one or more TRBs in the ring and toggling the TRB cycle bit for each TRB. The consumer knows it can process the TRB when the cycle bit matches its internal consumer cycle state for the ring. The consumer cycle state is toggled an odd amount of times in the ring. An example ring (a ring must have a minimum of 16 TRBs on it, but that's too big to draw in ASCII art): chain cycle bit bit ------------------------ | TD A TRB 1 | 1 | 1 |<------------- <-- consumer dequeue ptr ------------------------ | consumer cycle state = 1 | TD A TRB 2 | 1 | 1 | | ------------------------ | | TD A TRB 3 | 0 | 1 | segment 1 | ------------------------ | | TD B TRB 1 | 1 | 1 | | ------------------------ | | TD B TRB 2 | 0 | 1 | | ------------------------ | | Link TRB | 0 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD C TRB 1 | 0 | 1 |<---- | ------------------------ | | TD D TRB 1 | 1 | 1 | | ------------------------ | | TD D TRB 2 | 1 | 1 | segment 2 | ------------------------ | | TD D TRB 3 | 1 | 1 | | ------------------------ | | TD D TRB 4 | 1 | 1 | | ------------------------ | | Link TRB | 1 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD D TRB 5 | 1 | 1 |<---- | ------------------------ | | TD D TRB 6 | 0 | 1 | | ------------------------ | | TD E TRB 1 | 0 | 1 | segment 3 | ------------------------ | | | 0 | 0 | | <-- producer enqueue ptr ------------------------ | | | 0 | 0 | | ------------------------ | | Link TRB | 0 | 0 |--------------- ------------------------ Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:34 +07:00
Revert "xhci: replace xhci_read_64() with readq()" This reverts commit e8b373326d8efcaf9ec1da8b618556c89bd5ffc4. Many xHCI host controllers can only handle 32-bit addresses, and writing 64-bits at a time causes them to fail. Reading 64-bits at a time may also cause them to return 0xffffffff, so revert this commit as well. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2014-01-31 04:27:49 +07:00
val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
USB: xhci: Represent 64-bit addresses with one u64. There are several xHCI data structures that use two 32-bit fields to represent a 64-bit address. Since some architectures don't support 64-bit PCI writes, the fields need to be written in two 32-bit writes. The xHCI specification says that if a platform is incapable of generating 64-bit writes, software must write the low 32-bits first, then the high 32-bits. Hardware that supports 64-bit addressing will wait for the high 32-bit write before reading the revised value, and hardware that only supports 32-bit writes will ignore the high 32-bit write. Previous xHCI code represented 64-bit addresses with two u32 values. This lead to buggy code that would write the 32-bits in the wrong order, or forget to write the upper 32-bits. Change the two u32s to one u64 and create a function call to write all 64-bit addresses in the proper order. This new function could be modified in the future if all platforms support 64-bit writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-07-28 02:03:31 +07:00
xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = @%08x\n",
lower_32_bits(val));
xhci_dbg(xhci, "// xHC command ring deq ptr high bits = @%08x\n",
upper_32_bits(val));
USB: xhci: Ring allocation and initialization. Allocate basic xHCI host controller data structures. For every xHC, there is a command ring, an event ring, and a doorbell array. The doorbell array is used to notify the host controller that work has been enqueued onto one of the rings. The host controller driver enqueues commands on the command ring. The HW enqueues command completion events on the event ring and interrupts the system (currently using PCI interrupts, although the xHCI HW will use MSI interrupts eventually). All rings and the doorbell array must be allocated by the xHCI host controller driver. Each ring is comprised of one or more segments, which consists of 16-byte Transfer Request Blocks (TRBs) that can be chained to form a Transfer Descriptor (TD) that represents a multiple-buffer request. Segments are linked into a ring using Link TRBs, which means they are dynamically growable. The producer of the ring enqueues a TD by writing one or more TRBs in the ring and toggling the TRB cycle bit for each TRB. The consumer knows it can process the TRB when the cycle bit matches its internal consumer cycle state for the ring. The consumer cycle state is toggled an odd amount of times in the ring. An example ring (a ring must have a minimum of 16 TRBs on it, but that's too big to draw in ASCII art): chain cycle bit bit ------------------------ | TD A TRB 1 | 1 | 1 |<------------- <-- consumer dequeue ptr ------------------------ | consumer cycle state = 1 | TD A TRB 2 | 1 | 1 | | ------------------------ | | TD A TRB 3 | 0 | 1 | segment 1 | ------------------------ | | TD B TRB 1 | 1 | 1 | | ------------------------ | | TD B TRB 2 | 0 | 1 | | ------------------------ | | Link TRB | 0 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD C TRB 1 | 0 | 1 |<---- | ------------------------ | | TD D TRB 1 | 1 | 1 | | ------------------------ | | TD D TRB 2 | 1 | 1 | segment 2 | ------------------------ | | TD D TRB 3 | 1 | 1 | | ------------------------ | | TD D TRB 4 | 1 | 1 | | ------------------------ | | Link TRB | 1 | 1 |----- | ------------------------ | | | | chain cycle | | bit bit | | ------------------------ | | | TD D TRB 5 | 1 | 1 |<---- | ------------------------ | | TD D TRB 6 | 0 | 1 | | ------------------------ | | TD E TRB 1 | 0 | 1 | segment 3 | ------------------------ | | | 0 | 0 | | <-- producer enqueue ptr ------------------------ | | | 0 | 0 | | ------------------------ | | Link TRB | 0 | 0 |--------------- ------------------------ Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:52:34 +07:00
}
USB: xhci: Allocate and address USB devices xHCI needs to get a "Slot ID" from the host controller and allocate other data structures for every USB device. Make usb_alloc_dev() and usb_release_dev() allocate and free these device structures. After setting up the xHC device structures, usb_alloc_dev() must wait for the hardware to respond to an Enable Slot command. usb_alloc_dev() fires off a Disable Slot command and does not wait for it to complete. When the USB core wants to choose an address for the device, the xHCI driver must issue a Set Address command and wait for an event for that command. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-28 09:57:38 +07:00
USB: xhci: Fix compile issues with xhci_get_slot_state() Randy Dunlap reported this error when compiling the xHCI driver: linux-next-20100104/drivers/usb/host/xhci.h:1214: sorry, unimplemented: inlining failed in call to 'xhci_get_slot_state': function body not available The xhci_get_slot_state() function belongs in xhci-dbg.c, since it involves debugging internal xHCI structures. However, it is only used in xhci-hcd.c. Some toolchains may have issues since the inlined function body is not in the xhci.h header file. Remove the inline keyword to avoid this. Reported-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-01-05 03:20:17 +07:00
char *xhci_get_slot_state(struct xhci_hcd *xhci,
USB: xhci: Notify the xHC when a device is reset. When a USB device is reset, the xHCI hardware must know, in order to match the device state and disable all endpoints except control endpoint 0. Issue a Reset Device command after a USB device is successfully reset. Wait on the command to finish, and then cache or free the disabled endpoint rings. There are four different USB device states that the xHCI hardware tracks: - disabled/enabled - device connection has just been detected, - default - the device has been reset and has an address of 0, - addressed - the device has a non-zero address but no configuration has been set, - configured - a set configuration succeeded. The USB core may issue a port reset when a device is in any state, but the Reset Device command will fail for a 0.96 xHC if the device is not in the addressed or configured state. Don't consider this failure as an error, but don't free any endpoint rings if this command fails. A storage driver may request that the USB device be reset during error handling, so use GPF_NOIO instead of GPF_KERNEL while allocating memory for the Reset Device command. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-12-10 06:59:13 +07:00
struct xhci_container_ctx *ctx)
{
struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx);
usb: host: xhci: extract xhci_slot_state_string() By extracting and exposing xhci_slot_state_string() in a header file, we can re-use it to print Slot Context State from our tracepoints, which can aid in tracking down problems related to command execution. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-04-07 21:56:56 +07:00
int state = GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state));
USB: xhci: Notify the xHC when a device is reset. When a USB device is reset, the xHCI hardware must know, in order to match the device state and disable all endpoints except control endpoint 0. Issue a Reset Device command after a USB device is successfully reset. Wait on the command to finish, and then cache or free the disabled endpoint rings. There are four different USB device states that the xHCI hardware tracks: - disabled/enabled - device connection has just been detected, - default - the device has been reset and has an address of 0, - addressed - the device has a non-zero address but no configuration has been set, - configured - a set configuration succeeded. The USB core may issue a port reset when a device is in any state, but the Reset Device command will fail for a 0.96 xHC if the device is not in the addressed or configured state. Don't consider this failure as an error, but don't free any endpoint rings if this command fails. A storage driver may request that the USB device be reset during error handling, so use GPF_NOIO instead of GPF_KERNEL while allocating memory for the Reset Device command. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-12-10 06:59:13 +07:00
usb: host: xhci: extract xhci_slot_state_string() By extracting and exposing xhci_slot_state_string() in a header file, we can re-use it to print Slot Context State from our tracepoints, which can aid in tracking down problems related to command execution. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-04-07 21:56:56 +07:00
return xhci_slot_state_string(state);
USB: xhci: Notify the xHC when a device is reset. When a USB device is reset, the xHCI hardware must know, in order to match the device state and disable all endpoints except control endpoint 0. Issue a Reset Device command after a USB device is successfully reset. Wait on the command to finish, and then cache or free the disabled endpoint rings. There are four different USB device states that the xHCI hardware tracks: - disabled/enabled - device connection has just been detected, - default - the device has been reset and has an address of 0, - addressed - the device has a non-zero address but no configuration has been set, - configured - a set configuration succeeded. The USB core may issue a port reset when a device is in any state, but the Reset Device command will fail for a 0.96 xHC if the device is not in the addressed or configured state. Don't consider this failure as an error, but don't free any endpoint rings if this command fails. A storage driver may request that the USB device be reset during error handling, so use GPF_NOIO instead of GPF_KERNEL while allocating memory for the Reset Device command. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-12-10 06:59:13 +07:00
}
xhci: add traces for debug messages in xhci_address_device() This patch declares an event class for trace events that trace messages with variadic arguments, called xhci_log_msg, and defines a trace event for tracing the debug messages in xhci_address_device() function, called xhci_dbg_address. In order to implement this type of trace events, a wrapper function, called xhci_dbg_trace(), was created that records the format string and variadic arguments into a va_format structure which is passed as argument to the tracepoints of the class xhci_log_msg. All the xhci_dbg() calls in xhci_address_device() are replaced with calls to xhci_dbg_trace(). The functionality of xhci_dbg() log messages was not removed though, but it is placed inside xhci_dbg_trace(). This trace event aims to give the ability to the user or the developper to isolate and trace the debug messages generated when an Address Device Command is issued to xHC. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2013-08-06 04:22:15 +07:00
void xhci_dbg_trace(struct xhci_hcd *xhci, void (*trace)(struct va_format *),
const char *fmt, ...)
{
struct va_format vaf;
va_list args;
va_start(args, fmt);
vaf.fmt = fmt;
vaf.va = &args;
xhci_dbg(xhci, "%pV\n", &vaf);
trace(&vaf);
va_end(args);
}
xhci: Export symbols used by host-controller drivers In preparation for allowing the xHCI host controller drivers to be built as separate modules, export symbols from the xHCI core that may be used by the host controller drivers. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-03 15:35:28 +07:00
EXPORT_SYMBOL_GPL(xhci_dbg_trace);
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