2018-03-16 22:14:11 +07:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2006-11-30 22:23:18 +07:00
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/*
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2011-07-15 06:52:05 +07:00
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* drivers/watchdog/at91sam9_wdt.h
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2006-11-30 22:23:18 +07:00
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*
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2008-09-19 03:44:20 +07:00
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* Copyright (C) 2007 Andrew Victor
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* Copyright (C) 2007 Atmel Corporation.
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*
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2006-11-30 22:23:18 +07:00
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* Watchdog Timer (WDT) - System peripherals regsters.
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* Based on AT91SAM9261 datasheet revision D.
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*
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*/
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#ifndef AT91_WDT_H
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#define AT91_WDT_H
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2011-11-02 00:43:31 +07:00
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#define AT91_WDT_CR 0x00 /* Watchdog Control Register */
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2006-11-30 22:23:18 +07:00
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#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
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2007-05-31 16:16:00 +07:00
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#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
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2006-11-30 22:23:18 +07:00
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2011-11-02 00:43:31 +07:00
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#define AT91_WDT_MR 0x04 /* Watchdog Mode Register */
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2006-11-30 22:23:18 +07:00
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#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
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2015-08-06 17:16:46 +07:00
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#define AT91_WDT_SET_WDV(x) ((x) & AT91_WDT_WDV)
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2006-11-30 22:23:18 +07:00
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#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
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#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
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#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */
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#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */
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#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */
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2015-08-06 17:16:46 +07:00
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#define AT91_WDT_SET_WDD(x) (((x) << 16) & AT91_WDT_WDD)
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2006-11-30 22:23:18 +07:00
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#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
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#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
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2011-11-02 00:43:31 +07:00
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#define AT91_WDT_SR 0x08 /* Watchdog Status Register */
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2006-11-30 22:23:18 +07:00
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#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
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#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */
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#endif
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