2005-04-17 05:20:36 +07:00
|
|
|
/*
|
|
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
|
|
* for more details.
|
|
|
|
*
|
|
|
|
* Copyright (C) 1998, 1999, 2003 by Ralf Baechle
|
|
|
|
*/
|
|
|
|
#ifndef _ASM_TIMEX_H
|
|
|
|
#define _ASM_TIMEX_H
|
|
|
|
|
2006-09-06 23:00:22 +07:00
|
|
|
#ifdef __KERNEL__
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
#include <asm/mipsregs.h>
|
|
|
|
|
|
|
|
/*
|
2007-11-01 22:45:37 +07:00
|
|
|
* This is the clock rate of the i8253 PIT. A MIPS system may not have
|
|
|
|
* a PIT by the symbol is used all over the kernel including some APIs.
|
|
|
|
* So keeping it defined to the number for the PIT is the only sane thing
|
|
|
|
* for now.
|
2005-04-17 05:20:36 +07:00
|
|
|
*/
|
2007-11-01 22:45:37 +07:00
|
|
|
#define CLOCK_TICK_RATE 1193182
|
2005-04-17 05:20:36 +07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Standard way to access the cycle counter.
|
|
|
|
* Currently only used on SMP for scheduling.
|
|
|
|
*
|
|
|
|
* Only the low 32 bits are available as a continuously counting entity.
|
|
|
|
* But this only means we'll force a reschedule every 8 seconds or so,
|
|
|
|
* which isn't an evil thing.
|
|
|
|
*
|
|
|
|
* We know that all SMP capable CPUs have cycle counters.
|
|
|
|
*/
|
|
|
|
|
|
|
|
typedef unsigned int cycles_t;
|
|
|
|
|
2007-10-12 05:46:15 +07:00
|
|
|
static inline cycles_t get_cycles(void)
|
2005-04-17 05:20:36 +07:00
|
|
|
{
|
|
|
|
return read_c0_count();
|
|
|
|
}
|
|
|
|
|
2006-09-06 23:00:22 +07:00
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
|
2005-04-17 05:20:36 +07:00
|
|
|
#endif /* _ASM_TIMEX_H */
|