2019-06-01 15:08:33 +07:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2010-03-25 21:12:41 +07:00
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/*
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* Copyright 2000 Deep Blue Solutions Ltd
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* Copyright 2004 ARM Limited
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* Copyright 2008 Cavium Networks
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*/
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#ifndef __CNS3XXX_CORE_H
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#define __CNS3XXX_CORE_H
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2013-07-09 06:01:40 +07:00
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#include <linux/reboot.h>
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2012-11-09 02:40:59 +07:00
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extern void cns3xxx_timer_init(void);
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2010-03-25 21:12:41 +07:00
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2011-07-06 19:45:09 +07:00
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#ifdef CONFIG_CACHE_L2X0
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void __init cns3xxx_l2x0_init(void);
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#else
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static inline void cns3xxx_l2x0_init(void) {}
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#endif /* CONFIG_CACHE_L2X0 */
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2014-09-03 20:18:12 +07:00
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#ifdef CONFIG_PCI
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extern void __init cns3xxx_pcie_init_late(void);
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#else
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static inline void __init cns3xxx_pcie_init_late(void) {}
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#endif
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2010-03-25 21:12:41 +07:00
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void __init cns3xxx_map_io(void);
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void __init cns3xxx_init_irq(void);
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void cns3xxx_power_off(void);
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2013-07-09 06:01:40 +07:00
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void cns3xxx_restart(enum reboot_mode, const char *);
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2010-03-25 21:12:41 +07:00
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#endif /* __CNS3XXX_CORE_H */
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